[Dri-devel] [Bug 314] No 3D support for Radeon IGP chips

2003-08-19 Thread bugzilla-daemon
Please do not reply to this email: if you want to comment on the bug, go to the URL shown below and enter your comments there. http://bugs.xfree86.org/show_bug.cgi?id=314 --- Additional Comments From [EMAIL PROTECTED] 2003-19-08 23:41 --- WOOT!!! Well, I patched the

Re: [Dri-devel] Radeon PCI roundup

2003-08-19 Thread Andreas Stenglein
Am 2003.08.19 22:20:58 +0200 schrieb(en) Michel Dänzer: > > So here it is at last. :) > > http://penguinppc.org/~daenzer/DRI/radeon-pci-roundup.diff > > It ended up quite a bit larger than I initially thought it would, but > most of it is straightforward (and some less straightforward, like a DD

Re: [Dri-devel] Radeon 7500 rather slow

2003-08-19 Thread Michel Dänzer
On Tue, 2003-08-19 at 23:55, Roland Scheidegger wrote: > Felix Kühling wrote: > > I don't think this is a matter of the chip revision but rather what the > > card manufacturer puts around the chip, like DDR vs. SDR RAM and 64-bit > > vs. 128-bit memory interface and at which frequencies the chip an

Re: [Dri-devel] Radeon PCI roundup

2003-08-19 Thread Michel Dänzer
On Wed, 2003-08-20 at 00:10, Andreas Stenglein wrote: > > I havent looked at it really carefully, but suddenly I found a typo, maybe: > radeon_screen.c: > + screen->numTexHeaps = RADEON_NR_TEX_HEAPS - 1; > should look IMHO: > + screen->numTexHeaps = RADEON_NR_TEX_HEAPS; Indeed, this is

[Dri-devel] [Bug 314] No 3D support for Radeon IGP chips

2003-08-19 Thread bugzilla-daemon
Please do not reply to this email: if you want to comment on the bug, go to the URL shown below and enter your comments there. http://bugs.xfree86.org/show_bug.cgi?id=314 --- Additional Comments From [EMAIL PROTECTED] 2003-19-08 14:03 --- The good message: I have dr

[Dri-devel] RE: 2 questions about radeon driver

2003-08-19 Thread Alexander Stohr
CP mode means using an engine on the chip that gets the command data from main memory by itselves, some sort of busmaster DMA stream. MMIO means that the driver does program the chipset directly via its memory mapped registers. DRI means direct rendering and is the most common socket for current

[Dri-devel] 2 questions about radeon driver

2003-08-19 Thread Alex Deucher
I have two questions for you about the radeon driver. the first relates to the CP and accel. I'm attempting to convert the Xv code to use the CP. how do you check to find out if the driver is using CP or MMIO accel? I considered using info->directRenderingEnabled, but as far as I can see the

[Dri-devel] Re: 2 questions about radeon driver

2003-08-19 Thread Michel Dänzer
On Tue, 2003-08-19 at 21:49, Alex Deucher wrote: > > I'm attempting to convert the Xv code to use the CP. how do you check > to find out if the driver is using CP or MMIO accel? I considered > using info->directRenderingEnabled, but as far as I can see the > radeon can use the CP for accel ev

Re: [Dri-devel] Radeon 7500 rather slow

2003-08-19 Thread Roland Scheidegger
Felix Kühling wrote: I don't think this is a matter of the chip revision but rather what the card manufacturer puts around the chip, like DDR vs. SDR RAM and 64-bit vs. 128-bit memory interface and at which frequencies the chip and memory are clocked. Speaking of ram width, would it be possible to

[Dri-devel] Radeon PCI roundup

2003-08-19 Thread Michel Dänzer
So here it is at last. :) http://penguinppc.org/~daenzer/DRI/radeon-pci-roundup.diff It ended up quite a bit larger than I initially thought it would, but most of it is straightforward (and some less straightforward, like a DDX driver option and 3D driver environment variables) renaming. The mai

[Dri-devel] Linux libGL ABI question

2003-08-19 Thread Ian Romanick
I have a question about the libGL ABI. The "OpenGL Application Binary Interface for Linux" document (http://oss.sgi.com/projects/ogl-sample/ABI/index.html#3) says that only GLX entry points that are required to be static are those in the GLX 1.3 standard. Based on that, I recently (i.e., yest

[Dri-devel] [Bug 314] No 3D support for Radeon IGP chips

2003-08-19 Thread bugzilla-daemon
Please do not reply to this email: if you want to comment on the bug, go to the URL shown below and enter your comments there. http://bugs.xfree86.org/show_bug.cgi?id=314 --- Additional Comments From [EMAIL PROTECTED] 2003-19-08 07:11 --- Yes. -- Co

[Dri-devel] [Bug 314] No 3D support for Radeon IGP chips

2003-08-19 Thread bugzilla-daemon
Please do not reply to this email: if you want to comment on the bug, go to the URL shown below and enter your comments there. http://bugs.xfree86.org/show_bug.cgi?id=314 --- Additional Comments From [EMAIL PROTECTED] 2003-19-08 06:40 --- Do I need to apply the same

[Dri-devel] Your Bugzilla buglist needs attention.

2003-08-19 Thread bugadmin
[This e-mail has been automatically generated.Please do not reply to this email- if you want to comment on the bug, go to the URL shown below and enter your comments there.] You have one or more bugs assigned to you in the Bugzilla bugsystem (http://bugs.xfree86.org/) that require attention