On Mar 6, 2009, at 10:46 AM, Peter Clifton wrote:
> Our visibility groups allow toggling of pins / pads, and vias
> separately. Since Vias are presently all-layer constructs, as are
> pins,
> it makes more sense to group those two. Pads are surface layers only,
> and when editing a middle layer
the 50,000 dollar a seat software seems to thing like this as well.
my 2 cents
have color schemes,
base the selection of the color scheme based upon the groups in the
layout.
groups are defined like
[pcb_colors] = {default|override} component: color1, color2, color3,
color4; solder: color
On Mar 2, 2009, at 11:56 AM, DJ Delorie wrote:
>
>>> If we disable it, those footprints won't be available, at least on
>>> Windows, which doesn't have m4. We're trying to get rid of the
>>> runtime dependency on m4.
>>
>> i depend on the runtime M4 for my part library, i hope that, this
>> cou
On Mar 2, 2009, at 7:49 AM, DJ Delorie wrote:
>
>> When building PCB we get for each footprint file *.fp a png image
>> *.png.
>> For what is this image necessary?
>
> We make HTML files also, so you can browse the library with a web
> browser.
>
>> If I remember correctly there was a statement
On Feb 28, 2009, at 11:21 AM, Stuart Brorson wrote:
> Hi --
>
>> How often does the need for single-sided boards arise?
>
> The question about single-sided boards is interesting, but the
> answer depends upon how you intend to fabricate your boards.
>
> If you're sending the boards to a PCB manuf
I like the idea of a command line mode. screen is alright, but the
hex mode looks fantastic.
On Feb 26, 2009, at 4:00 PM, Dr. Michael J. Chudobiak wrote:
> Levente Kovacs wrote:
>>
>> It would be nice if it was gtk based, and not gnome based
>> application. :-) I
>> would be glad if there wa
add a 26.98 meter spool of wire, to wind it, fold in half then spin
around a spool, this is to remove the inductance of the coil.
:-P
-- or --
maxim-ic makes digital delay lines, but they cost some bucks ~10us
for 7.22 @1k
they normally run at 10's of nS.
-- or --
probably your best
On Feb 16, 2009, at 12:11 PM, Stefan Salewski wrote:
> Am Montag, den 16.02.2009, 18:53 + schrieb Kai-Martin Knaak:
>>
>> Some remarks:
>>
>> * 4 Layers will take 12 working days minimum, plus what ever it
>> takes for
>> fedex to ship from china. If you don't register for "open account"
>>
Your not doing anything wrong.
but it is not a bug.
pads do not have the ability to thermal, so you need to manually
thermal the pads.
turn off new lines clear polygons
and then draw some lines from the pads to the plane, the first
connection "assigns" the plane, this is not a hard assign
On Feb 13, 2009, at 4:26 PM, evan foss wrote:
> On Fri, Feb 13, 2009 at 7:14 PM, Steven Michalske > wrote:
>> might add a delay to the add action make it like a human is entering
>> them :-P
>
> I don't think Digikey cares how you are ordering.
>
>>> D
might add a delay to the add action make it like a human is entering
them :-P
hardkrash
On Feb 13, 2009, at 1:59 PM, Tim Hanson wrote:
> Hi All,
>
> I wrote this script yesterday as I needed to enter ~200 parts into
> Digikey, and didn't want to make any mistakes. It reads in a CSV
> file, e
On Feb 13, 2009, at 1:49 PM, Kai-Martin Knaak wrote:
>>
>> ** In the PCB, is there a command to move components to a specific
>> x,y
>> location?
>
> No. (This is one of my favorite feature requests)
type a colon, :
to get the command window
type in the following
MoveObject( x, y, unit )
i agree i did like that too
On Feb 13, 2009, at 9:55 AM, Gareth Edwards wrote:
> Gareth Edwards wrote:
>> Peter Clifton wrote:
>>> Did you use the "master" branch of my repository, rather then the
>>> "before_pours" one?
>>>
>>
>> D'oh. It's the instruction reading blind spot again.
>>
>
> Ok, I'
with the PCB, as stackup information
On Feb 12, 2009, at 11:48 AM, KURT PETERS wrote:
>
> It would be nice to have some defaults already in place like the
> permittivity for FR4 and standard layer thicknesses built-in for the
> user. Metal thicknesses and materials are also pretty standar
On Feb 12, 2009, at 10:27 AM, Stuart Brorson wrote:
>> Are there any plans to add trace impedance calculations to PCB? If
>> not, is there an argument against it or just that no one has time and
>> interest? What alternatives do people use?
>
> As Joe pointed out too, PCB doesn't not know about
Just a tip, when working with mixed parts, i start traces from the
pin, with snap to pin/pad on
and then have the miter take me back to the grid.
if connecting two parts off grid but with miters that work with the
gird, draw up to about the pin but just not all the way there this
will put
We have garchive in utilities, it should suffice.
i don't know it's current status, but i though it's purpose was to
make an archive of a project so that it could be "remade" or shared
easily across many folks
Hardkrash
On Jan 27, 2009, at 2:40 PM, Stefan Salewski wrote:
> Am Montag, den
sorry for the lame numbers, I'm running our bottom of the line cards ;-)
three machines
PPC 4 core 2.5GHz G5 OS X Leopard ( 10.5.6 )
GeForce 6600 with 256MB RAM
17145 frames in 5.0 seconds = 3429.000 FPS
17626 frames in 5.0 seconds = 3525.200 FPS
18489 frames in 5.0 seconds = 3697.800 FPS
18528
On Jan 27, 2009, at 8:02 AM, Peter Clifton wrote:
> On Tue, 2009-01-27 at 09:58 -0600, John Griessen wrote:
>> John Griessen wrote:
>>> Peter Clifton wrote:
>>>
If we had to nail down what it is about gEDA and PCB which make
>> them
feel like different applications, what is it?
>>
gamin even claims to not be portable.
this sounds like we will need to use the OS X native fsevents
It looks like your using python so, these events are contained in
pyObjC 2.0, and it's Included in Leopard!
Hardkrash
On Jan 23, 2009, at 6:06 PM, Ales Hvezda wrote:
>
> [[ I'm forwarding thi
damn log files.
:-P
On Jan 23, 2009, at 10:23 AM, Gary L. Roach wrote:
>As Peter suggested, I ran gschem on the command line and in the /
> usr/bin directory and got:
>Could not open log file: /usr/bin/gschem.log
>Errno was: 13
>Any suggestions as to what I screwed up in the
so is that a pcb as well?
printed circuit ball?
:-P
On Jan 22, 2009, at 3:48 PM, John Doty wrote:
>
> On Jan 22, 2009, at 11:02 AM, DJ Delorie wrote:
>
>> There's no such thing as a one-sided board. Boards always have at
>> least two sides, unless you've invented a mobius pcb.
>
>
> Spherical
On Jan 21, 2009, at 1:10 PM, Peter TB Brett wrote:
> On Wednesday 21 January 2009 21:06:56 Rob Butts wrote:
>> Hi Everyone,
>>
>> Can someone please take a look at the attached datasheet and
>> suggest how
>> you would name and number the pads for this inductor? I'm just not
>> sure
>> how t
So to take this adding too much complexity argument to street and
shoot it.
if we have plugins, this is simplified.
if a plugin can register a hook on a component place, this can call
an interface to the Data On Materials (DOM) database.
For those who only think of mySQL when program
I think that pcb should look for a part with the refdes U1a first
before dropping the a to match U1.
it should also spit out a little blurb about what it did.
that way when someone does name a part Tm and wants it to be called
Tm, pcb sees that part Tm exists and that no part T exists.
we c
January 2009 18:56:08 Steven Michalske wrote:
>> On Jan 17, 2009, at 7:56 AM, Ales Hvezda wrote:
>>>> Currently, running any gEDA suite program leaves behind a log
>>>> file in
>>>> the current working directory. I would like to change the default
>>&
On Jan 17, 2009, at 4:38 PM, Bob Paddock wrote:
>> You don't need to change the schematic. One way to do this is to keep
>> a directory of second source symbols.
>
> That presupposes that you know the second source when you are working
> on the project. Part might be obsoleted years from now.
>
On Jan 17, 2009, at 7:56 AM, Ales Hvezda wrote:
>
>> Currently, running any gEDA suite program leaves behind a log file in
>> the current working directory. I would like to change the default
>> to not
>> generating log files, so that I (and other users who use the default
>> configuration) don
KISS says
key = value \n
next key = its value \n
anything can parse this simple format
an unknown key is a warning,
On Jan 16, 2009, at 2:44 PM, Peter TB Brett wrote:
>
> Currently, the gEDA configuration files are executed by a Scheme
> interpreter. This has a number of flaws:
>
> 1. An erro
I SECOND this one, and THIRD it if I could!
On Jan 16, 2009, at 2:45 PM, Peter TB Brett wrote:
>
> Currently, running any gEDA suite program leaves behind a log file in
> the current working directory. I would like to change the default to
> not
> generating log files, so that I (and other user
Looks like page 13 has lots of rotated text. that probably
confused the auto rotator.
:-)
On Jan 16, 2009, at 11:21 AM, Oliver Lehmann wrote:
> Steven Michalske wrote:
>
>> -dAutoRotatePages=/None
>
> I used -dAutoRotatePages=/All now
>
> It looks like /All wo
When I was 4 my parents gave me a real screwdriver set for
Christmas.
I took apart the telephone in the basement 2 or three times before
they found out I was taking it apart and putting it back together.
They only found out that I was taking it apart, when i decided to use
dad's wire cu
it should be this option
-dAutoRotatePages=/None
On Jan 16, 2009, at 11:00 AM, DJ Delorie wrote:
I'm not sure how to "fix" the ps2pdf step, but the latest acroread
knows how to auto-rotate pages to fit the printed paper. I suspect
ps2pdf looks for which way text is oriented... pcb d
The auto rotate tries to use the orientation of text the most of the
test on the page, auto rotate may want to be turned off for your runs
I have hit this problem with postscripts files before, so i usually
force the pages to landscape in ps2pdf
here are some tips. i also hit similar pr
it's called the knack.
http://www.youtube.com/watch?v=CmYDgncMhXw
:-)
On Jan 15, 2009, at 8:50 PM, Steve Meier wrote:
> or in DJ's case I
> think he just can't help but be creative
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On Jan 14, 2009, at 2:52 PM, John Doty wrote:
>
>> When adding a slotted or multi part component it should have an
>> attribute of an unique instantiation ID (UIID) that gets matched With
>> the other symbols of that device instance.
>
> The way gnetlist works, the refdes is the identifier. Changi
On Jan 14, 2009, at 2:06 PM, Joerg wrote:
> Steven Michalske wrote:
>> Hey gang,
>>
>> This is a proposal that seems to have gotten lost in a debate if gEDA
>> is the right toolkit for someone.
>>
>> So here is a technical discussion on how we could I
Hey gang,
This is a proposal that seems to have gotten lost in a debate if gEDA
is the right toolkit for someone.
So here is a technical discussion on how we could IMPROVE gEDA.
The proposal, please comment on lapses of functionality, and one
sidedness as I use gEDA in PCB and spice 'n frie
On Jan 12, 2009, at 5:26 PM, Joerg wrote:
> Peter Clifton wrote:
>> On Mon, 2009-01-12 at 17:01 -0800, Joerg wrote:
>>
>>> Ok, done. I hope it's acceptable that I did it without login. It
>>> called
>>> me "nobody" (probably I did something wrong there) but I've
>>> included my
>>> email addr
I looked at the site, but where do I specify which aspect to donate or
which has received funding. like if I wanted to donate to the feature
closest to being issued.
Steve
On Jan 12, 2009, at 5:23 PM, Stuart Brorson wrote:
>>> I'd like to add some non-silk graphics to my pcb layout (Dimensi
Susan,
Great example files!
I believe that you are the First person ever that has made the
decision to have only one copper layer in your stackup.
Usually, when I do a one layer board, it's a two layer design and
just don't use the second side.
What might be causing a issue for understandi
I have to say that i would not equate a CAD package mouse usage the
same as a file manager.
I come from HI before all land... Mac OS X and I don't expect a CAD
package to behave the same as my OS X HI guide lines
I also have 5 easy to access mouse buttons and 3 more a touch
harder...
On Nov 21, 2008, at 7:52 PM, Kai-Martin Knaak wrote:
> 2) pcb feature request: The ability put all postscript and png exports
> into a dedicated directory "print".
Workaround:
1 - create the "print" directory
2 - when printing or exporting name file as such "print/foo"
this will cause the outp
On Nov 20, 2008, at 5:16 PM, Kai-Martin Knaak wrote:
> On Thu, 20 Nov 2008 16:34:27 -0800, Yamazaki R2 wrote:
>
>> Does anybody know of any decent waveform viewers? Even ones that
>> aren't
>> free? I really don't like the fact that there are no gridlines or
>> labels
>> on either axis and th
I have had this happen with interrupted IMAP transfers, when my
mailing application wants to delete the message off the server, and
that fails. so the mail client redownloads the message. thinking
that you never got it in the first place, so it might be that... .if
it is intermittent
a
sheet three of 11 from the molex drawing @
http://www.molex.com/pdm_docs/sd/877159108_sd.pdf
Steve
On Nov 12, 2008, at 2:00 PM, Ethan Swint wrote:
> Slightly OT, as it isn't specific to gaf, but I'm planning on
> mounting a
> DSP/MCU on a daughter card so I can change brains without messing wi
Looks good, but the PNG of the top is of the old design.
It looks like at least one person on google has ported Free RTOS to
the R8C, they have ethernet demos and such, happy hacking.
Steve
On Nov 11, 2008, at 8:24 PM, DJ Delorie wrote:
>
> http://www.delorie.com/electronics/powermeter/
>
>
o the peice of copper, that specifies the
netname attached, with an optional max net connections.
CopperNet Netname[:number of connections]
CopperNet Netname2[:number of connections]
CopperNet Netname3[:number of connections]
cont.
real example
# release: pcb 1.99w
# date:Wed Nov 5
On Nov 4, 2008, at 4:28 PM, DJ Delorie wrote:
>
>> Theoretically you could use a doorbell transformer,
>
> Hmmm... theoretically, I could use the doorbell transformer I already
> have, on that panel at least. The other two panels don't already have
> that. But I need to get the data off the boa
wouldn't the pick and place files offer the same information with out
having to OCR and not depend on that part having silkscreen?
I see at least two issues with silk screen OCR:
- requiring silk to for that component
- having the silk not be at the location of the part.
- back side, or
nice board,
Why did you connect the vias attach to the planes with thermals
instead of a solid "thermal" connection?
Steve
On Oct 30, 2008, at 10:26 PM, DJ Delorie wrote:
>
> http://www.delorie.com/electronics/powermeter/
>
> I merged the three ground planes into one, and draw AVdd from DVdd f
Were you trying to format them with HTML?
I bet the HTML filters on the mailing list were cutting out the links.
On Oct 30, 2008, at 2:44 PM, Eric Winsor wrote:
> Steve,
>
> I don't see these other attempts.
>
> Eric Winsor
>
> Steve Meier wrote:
>> Dave,
>>
>> No I struggled three times to get
http://www.analog.com/en/interface/digital-isolators/ADUM5401/products/product.html
DONE
On Oct 27, 2008, at 8:39 AM, Stefan Salewski wrote:
> Sometimes it is necessary/recommended to partition (separate) power or
> ground planes, i.e. for ADC or DC/DC-Converters, see page 16 and 17 in
>
> http:
i hit this bug too on my PPC and intel pcb installs under OSX Leopard
Steve
On Oct 23, 2008, at 12:56 PM, Stefan Salewski wrote:
> Am Donnerstag, den 23.10.2008, 15:01 +0200 schrieb Stefan Salewski:
>> pcb version 20080202 GTK
>>
>> When I click in the drawing area with active line tool nothing
I would vote for having a board stack that defines styles.
on each layer have the ability to define types of lines.
good ole width
wcalc assisted ( needs board information )
50 Ohm single strip
120 Ohm multiline strip ( This might need the ability to
have a key mapped to add selected/over to current routing net.
this way you add the via, sub trace, plane to the current net.
have this key also update the auto-drc to allow that freshly added
component to be not avoided.
Hardkrash
On Oct 15, 2008, at 11:20 AM, Ben Jackson wrote:
> On Wed, O
to build the board and schematics are tracked
as well
Steve
On Oct 6, 2008, at 1:50 PM, David Kuehling wrote:
>>>>>> "Steven" == Steven Michalske <[EMAIL PROTECTED]> writes:
>
>> i put mine into source control, so that i can go back in time
i put mine into source control, so that i can go back in time and work
on old files easily enough
when schematics reference a symbol you used years ago and you have
updated it, you may need the older one for the schematic.
you checkout a copy from that date. and it works.
On Oct 5, 2
>
> Not having a good laptop week.
>
May I suggest looking into an Apple laptop, I put loving care into
each one I work on :-P
> --
> Peter Clifton
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the pins are named PD+ and the like in the foot print
the pins are "numbered" 1 2 3. and the like in the symbol
so the net list is looking for pins named 1 2 3
but the footprint is named PD+ PD-
change either the symbol or the footprint to match.
i used the quotes on "numbered" be
just goes to show i should read all of the messages in a thread before
responding to a thread
On Oct 2, 2008, at 3:59 PM, Peter Clifton wrote:
> On Thu, 2008-10-02 at 14:48 -0700, Kingston Co. wrote:
>
>> Also, you can fix this by editing your *.pcb file manually and adding
>> the "clearline" fl
the polygon can have a setting where it will attach to most
anything.
hit the S key while on the polygon
send us a copy of the PCB, even if it is just a private message for
us to look at.
Steve
On Oct 2, 2008, at 2:48 PM, Kingston Co. wrote:
> Here are my answers:
>
> What version of
>>
> Anyway, thank you all once again for your help and support! And I'm
> sure
> to give something back to OSS real soon (albeit not in the realm of
> gEDA).
>
Bug reports and constructive criticism are always good ways to start.
> Thanks again, best regards,
>
> Richard Rasker
>
>
>
> ___
I patched my own copy to give me back the center snap. it was
screwing up some pads I was laying out.
I'll see if i can dig up that patch when I get home.
Steve
On Oct 1, 2008, at 1:48 PM, Stefan Salewski wrote:
> Am Mittwoch, den 01.10.2008, 22:02 +0200 schrieb Stefan Salewski:
>> pcb 2
ld come up with more
Steve M.
On Sep 19, 2008, at 3:12 PM, John Griessen wrote:
> Steven Michalske wrote:
>> Can this handle trace pairs / busses? If not, is it too late to get
>> routed diff pairs?
>>
> Anthony says he is still working on it even though his Google
&g
Woo Hoo, I love the output! great work, i might just try this baby
out soon
Can this handle trace pairs / busses? If not, is it too late to get
routed diff pairs?
Steve
On Sep 19, 2008, at 1:58 PM, DJ Delorie wrote:
>
>> You mentioned this new router (Google Summer of code) some months
get an IR pass filter, they often look like a mirror, and use a nikon
D70, you typically don't need to take the cut filter off.
do a quick search on digital IR photography.
Happy Hacking
On Aug 23, 2008, at 10:52 AM, Dave N6NZ wrote:
> Mark Rages wrote:
>> On Sat, Aug 23, 2008 at 12:04 PM,
photorealistic comes to mind, paintings painted to look like
photographs.
2 detailed visual representation, like that obtained in a photograph,
in anonphotographic medium such as animation or computer graphics.
:-)
On Aug 16, 2008, at 10:04 PM, Ben Jackson wrote
Tried to send this to DJ
What if you have an outline layer that you hang the parts over the outline?
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On Jul 25, 2008, at 7:46 PM, Kai-Martin Knaak wrote:
On Fri, 25 Jul 2008 15:09:14 -0400, Robert Butts wrote:
Will the Pin statement in the footprint definition below give me a
2.1
mm square hole with no copper annulus?
^^
How would a drill for square holes look like? ;-)
<>
:
I like using the other side resistors like caps, there both
white they do the same thing then.
On Jul 18, 2008, at 4:37 PM, DJ Delorie wrote:
>
>> After I dump them on the board near where I'm working, I just pick
>> up the upside-down ones and drop them until they land right-side up.
>
>
On Jul 17, 2008, at 3:10 PM, Traylor Roger wrote:
> Gang,
> I've now finished my third board with gschem/gaf + PCB. I post
> these pictures as an encouragement to others. I was was discouraged
> at times learning the tools but with the help and support available
> I finally pushed out some g
I read this as record a macro, and save that macro to file.
Steve
On Jul 9, 2008, at 5:27 PM, Dan McMahill wrote:
> al davis wrote:
>
>> If you can make the gEDA/PCB/gnucap combination work well enough
>> that 100% schematic driven gives you all the functionality of a
>> command line, you have m
Oh the possibilities with an element browser!
updates, replacements, tuning values, the list goes on and on :-P
hardkrash
On Jun 24, 2008, at 3:17 PM, Ben Jackson wrote:
> On Tue, Jun 24, 2008 at 10:56:25PM +0200, Bert Timmerman wrote:
>> OTOH, if I have 50 or more elements locked and I only w
This is a feature that i have been looking for.
How i cope with this is i use a 0603 or similar footprint and will
route the board, then after DRC passes i will short them with a
copper line between the two pads.
what i would want is a footprint with the capability to have non pin/
pad copp
i draw a slightly larger rectangle and turn off its clearances with s.
Note that this rectangle will not clear for anything!!!
Steve
On Jun 16, 2008, at 5:03 PM, James Johnston wrote:
> The particularly problematic issue I was having is a TSSOP footprint
> that
> has a thermal pad to be hooke
Give me code/instructions, and i'll try it on PPC or Intel macintoshes.
Working for Apple has its benefits :-P
Steve
On Jun 14, 2008, at 10:31 AM, Peter Clifton wrote:
> On Sat, 2008-06-14 at 13:00 -0400, Dave McGuire wrote:
>> On Jun 13, 2008, at 8:04 PM, Kai-Martin Knaak wrote:
>>> Just rende
On Jun 13, 2008, at 2:58 PM, Philipp Klaus Krause wrote:
> DJ Delorie schrieb:
>>> When I try to use the global puller on the attached board pcb
>>> 20080202 exits.
>>
>> Old news, lots of boards make it crash.
>
> How come this is board-specific? I'd rather expect it to crash
> depending
> on
This allows for nm or feet, I like it! add units not confusion!
Remember the high school science teacher docking points for not using
units?
What unit should we define for PCB default units?
They are mill/100, one hundred thousandth of an inch, or a dmil;
deci-mil ha ha a pun for a uni
The newer version of MS office now use docx xlsx there up to 4
letters...
8.3 has been dead for a while, i think i remember windows XP finally
doing it right, win 2k was not bad, but 98 and 98 were awful about it.
On a side note my real operating system, Mac OSX, will have no
probl
On Jun 4, 2008, at 1:36 PM, DJ Delorie wrote:
>
>> That would be *fantastic*. It'd also be nice (though this is
>> somewhat pie-in-the-sky) to have a layer of abstraction between the
>> user
>> coordinate system and the internal coordinate system. Say, allow the
>> user to enter a translati
On Jun 4, 2008, at 2:55 AM, Kai-Martin Knaak wrote:
> I am curious, just how heterogeneous the group of geda users and
> developers is. So I thought, I'd start this little non-random sample
> poll
> in the mailing list:
>
> * What OS do you run geda applications on?
>
Apple OSX Leopard both PPC
On Jun 4, 2008, at 10:16 AM, John Luciani wrote:
On Wed, Jun 4, 2008 at 12:42 PM, Mark Rages <[EMAIL PROTECTED]>
wrote:
On Wed, Jun 4, 2008 at 11:30 AM, Larry Doolittle
<[EMAIL PROTECTED]> wrote:
> Disorganized and questionable quality component libraries.
> This has been discussed to death,
I see all this activity, got a screen shot? i dont have the time to
build now and i'd like instant gratification :-)
Steve
On May 1, 2008, at 5:32 PM, Peter Clifton wrote:
Its still a work in progress, and does very often take the
sledgehammer
approach of redrawing the entire screen, but
Vwhatever 1 0 AC 1 DC biasVoltage
The first thin an AC analysis does is determine it's DC operating
point, then on top of that dc operating point it runs the AC small
signal analysis.
hardkrash
On Apr 21, 2008, at 5:09 AM, Yaniv Hachamo wrote:
Hello,
I`m trying to plot an AC simulatio
We already have database problems. just because we use a non
rational flat file data storage, doesn't mean we don't have a data base.
I now manually manage all of my symbols and footprints, because they
do get broken on gEDA updates.
On Apr 11, 2008, at 2:24 PM, Kai-Martin Knaak wrote
My Favorite is to use this notation
3V3 for positive digital 3.3 volts
A3V3 for analog
AN3V3 analog negative
you get the point, its all about taste and alpha-numeric only :-P
Hardkrash
On Apr 6, 2008, at 6:36 AM, gene wrote:
> Is it ok to name a net "3.3VD", for example, using the "."? I
On Mar 28, 2008, at 10:10 AM, Steve Meier wrote:
> High speed memory is now staggering the transmission of each data line
> to minimize cross talk. High end fpga's can support qdr II memory
> devices to clock speeds of over 500 MHz. The qdr ii has two data buses
> one for read and one for writing
Sorry for the mis-phrasing, when a thermal is auto added, please set
the auto placed flag indicating that it was auto placed.
Hardkrash
On Mar 25, 2008, at 4:31 PM, DJ Delorie wrote:
>
>> I would also add a flag here to say is the via was auto placed or
>> manually placed.
>
> Actually, it ha
jcl,
I have made this the size of 0603 parts so that i can solder ball
them, or stuff them with an 0603 resistor.
Could we make a copper shorted version as well?
It allows for the reverse of the idea, by default it is connects two
nets that an exacto can cut out.
Hardkrash
On Mar 25, 2008,
On Mar 25, 2008, at 10:06 AM, DJ Delorie wrote:
>
>> Did you mean auto-thermal and THERMAL flag, or do each via and pin
>> have a VIA flag which indicates whether it needs a thermal?
>
> Each pin/via has a set of flags, one for each layer, that says if it
> should have a thermal, and what type.
>
John,
I started writing a document today and was wondering if you had
released these.
Hardkrash
On Jan 26, 2008, at 8:51 AM, John Luciani wrote:
> At the 22 January 2008 Freedog Meeting I presented some schematic
> symbols built with filled arrows and filled triangles. My goal is to
> create
if we open a PCB file that doesn't specify an annulus min width then
the annulus min width should be set to the min width of the copper
lines.
I like the idea of expanding the vendor files to provide for the DRC
and drill mappings, making it a file that has the parameters seems
like a goo
On Feb 26, 2008, at 1:03 PM, Dave N6NZ wrote:
>
> Steven Michalske wrote:
>> I see two threads,
>>
>> One on how to add a plugin to gerbv to allow for pick and place auto
>> programming from gerbers.
>>
>> This could be done with or with out the
I see two threads,
One on how to add a plugin to gerbv to allow for pick and place auto
programming from gerbers.
This could be done with or with out the help of an existing pick and
place file.
The second thread is how to make PCB create consistent pick and place
data so that the auto fit
On Mon, Feb 25, 2008 at 7:13 PM, DJ Delorie <[EMAIL PROTECTED]> wrote:
>
> > do square pads work correctly?
>
> Ok, *that* doesn't work. Make them slightly rectangular. The HID
> code has a hook for when we keep track of the angle separately.
Thought about that one, have the code stretch
>
> hmm. Thats a good idea. I don't think it quite gets you 100% there
> because if you compare a typical pad on an SO to something like one of
> the larger smt resistors I think the pads are 90 degrees out. But I do
> think that perhaps combining your idea with the current code might do
>
On Mon, Feb 25, 2008 at 6:17 PM, DJ Delorie <[EMAIL PROTECTED]> wrote:
>
> > If we really want this we might look into fully supporting arbitrary
> > rotations as a first step.
>
> I assume you mean "keeping the rotation separate from the footprint"?
> We already support arbitrary rotations.
>
If we really want this we might look into fully supporting arbitrary
rotations as a first step. the current method is a elegant
hack\b\b\b\b workaround.
adding a rotation field to the data structures would be what is required for
DRC checking ( i believe that it still assumes 90 degree rotations
If Pads expects CR-NL should the netlist generator output CR-NL?
Hardkrash
On Mon, Feb 25, 2008 at 12:20 PM, Steven Taylor
<[EMAIL PROTECTED]> wrote:
> Yes, I ran the file through unix2dos and that fixed the problem. Thanks to
> Dan McMahill and others who gave suggestions for this problem.
>
>
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