[gem5-users] Multi-threading in Gem5

2023-11-13 Thread Aritra Bagchi via gem5-users
Hi, Can anyone share the methodology for running multi-threaded programmes in Gem5 FS mode with the Ruby memory model? To be specific, I am interested in the PARSEC benchmark suite. I have the following doubt: Let 'A' be a programme from the PARSEC suite. Let there be 8 cores in the simulated

[gem5-users] Re: Counters for # DRAM reads, writes, page hits, and page misses

2023-09-08 Thread Aritra Bagchi via gem5-users
, Sep 8, 2023 at 6:06 PM Eliot Moss wrote: > On 9/8/2023 2:55 AM, Aritra Bagchi via gem5-users wrote: > > Hi all, > > > > Can anyone indicate how to extract performance counters such as the > number of DRAM read operations, > > the number of DRAM write operations, t

[gem5-users] Counters for # DRAM reads, writes, page hits, and page misses

2023-09-08 Thread Aritra Bagchi via gem5-users
Hi all, Can anyone indicate how to extract performance counters such as the number of DRAM read operations, the number of DRAM write operations, the number of times a page miss occurs, etc.? Inside src/mem/mem_ctrl.cc, MemCtrl::recvTimingReq( ) method, there are two methods for inserting new

[gem5-users] Benchmark support in gem5 SE mode

2023-01-02 Thread Aritra Bagchi via gem5-users
Hello, I am running gem5 version 21. I use it in SE mode with the classic memory model to run SPEC CPU 2006 benchmarks. I have the following two queries regarding the gem5's benchmark support: 1. Does gem5 SE support running multithreaded benchmarks such as PARSEC? If yes, could someone please

[gem5-users] Re: Load dependency in gem5

2022-10-07 Thread Aritra Bagchi
oad A[ k ] is completed. Is that completion necessary? It seems it isn't. The memory system is underutilised. Thanks and regards, Aritra On Fri, Oct 7, 2022 at 10:48 PM Eliot Moss wrote: > On 10/7/2022 1:13 PM, Eliot Moss wrote: > > On 10/7/2022 1:03 PM, Aritra Bagchi wrote: > &

[gem5-users] Re: Load dependency in gem5

2022-10-07 Thread Aritra Bagchi
Hi all, Any suggestions on this are most helpful. Thanks and regards, Aritra On Thu, Oct 6, 2022 at 6:01 PM Aritra Bagchi wrote: > Hi all, > > *for (i = 0; i < 1000; i++) {* > * j = j + A[ i ]* > *}* > > Suppose such a loop program is executed on gem5 (single-c

[gem5-users] Load dependency in gem5

2022-10-06 Thread Aritra Bagchi
ion is highly appreciated. Thanks and regards, Aritra Bagchi Research Scholar, Department of Computer Science and Engineering, Indian Institute of Technology Delhi ___ gem5-users mailing list -- gem5-users@gem5.org To unsubscribe send an email to gem5-users

[gem5-users] Read Clean Request Packets

2021-12-08 Thread Aritra Bagchi via gem5-users
Hi all, I am observing a lot of *ReadCleanReq* packets in the classic cache of gem5. Could anyone tell me what is the function/significance of these packets? Thanks and regards, Aritra Bagchi Research Scholar, Department of Computer Science and Engineering, Indian Institute of Technology Delhi

[gem5-users] Knowing the number of response packets from the stats generated in gem5 v20+

2021-10-25 Thread Aritra Bagchi via gem5-users
Hi all, I am using the gem5 version 21. I can find stats such as *system.cpu.l2..overall_accesses::total* which indicates the total number of L2 cache accesses of a specific type. Could anyone tell what stats are in the stats.txt file for knowing a) the number of responses reaches "membus" from

[gem5-users] Re: Write Buffer in Classic Cache in gem5

2021-08-06 Thread Aritra Bagchi via gem5-users
Just a gentle reminder. Any comment from anyone? Thanks and regards, Aritra On Fri, Aug 6, 2021 at 11:51 AM Aritra Bagchi wrote: > Hello All, > > Could anyone confirm what all types of requests a cache write-buffer > holds? The documentation claims that a write-buffer stores

[gem5-users] Write Buffer in Classic Cache in gem5

2021-08-06 Thread Aritra Bagchi via gem5-users
Hello All, Could anyone confirm what all types of requests a cache write-buffer holds? The documentation claims that a write-buffer stores a) uncached writes, and b) writeback from evicted () cache lines. Does it also store evicted and *clean* writebacks? Thanks and regards, Aritra Bagchi

[gem5-users] Re: Read request and writebacks in gem5

2021-06-22 Thread Aritra Bagchi via gem5-users
Any help from anyone is appreciated. Thanks! Regards, Aritra On Tue, Jun 22, 2021, 01:18 Aritra Bagchi wrote: > Hi, > > Could anybody help me understand what happens in gem5 when a read request > reaches a cache (say L3) and L2's write queue has a pending writeback > (wri

[gem5-users] Read request and writebacks in gem5

2021-06-21 Thread Aritra Bagchi via gem5-users
Hi, Could anybody help me understand what happens in gem5 when a read request reaches a cache (say L3) and L2's write queue has a pending writeback (writeback that has not yet been written to L3) with the same block as the read request? Is the read request gets serviced from the write queue as

[gem5-users] Re: Handling a cache miss in gem5

2020-09-25 Thread Aritra Bagchi via gem5-users
n decision, or an implementation consequence, > but my guess is the latter - there is no explicit definition of the cache > model pursued by the classic cache. > > Regards, > Daniel > Em sexta-feira, 25 de setembro de 2020 11:00:39 GMT+2, Aritra Bagchi via > gem5-users escreveu: > >

[gem5-users] Re: Handling a cache miss in gem5

2020-09-25 Thread Aritra Bagchi via gem5-users
Just a humble reminder. Any comment would be highly solicited. Thanks, Aritra On Thu, 24 Sep, 2020, 12:22 PM Aritra Bagchi, wrote: > Hi all, > > While experimenting with gem5 classic cache, I tried to find out how an > access miss is handled and with what latency. > > Even

[gem5-users] Handling a cache miss in gem5

2020-09-24 Thread Aritra Bagchi via gem5-users
Hi all, While experimenting with gem5 classic cache, I tried to find out how an access miss is handled and with what latency. Even if in *cache/tags/base_set_assoc.hh*, the access (here a miss) handling latency *"lat"* gets assigned to the *"lookupLatency"*, the actual latency that is used to

[gem5-users] Re: Queries regarding banking and response bypass in gem5 classic cache

2020-09-16 Thread Aritra Bagchi via gem5-users
Hi all, Haven't heard anything from anyone. It would really be appreciated if someone can provide any comment/suggestion/clarification on this. Thanks, Aritra On Tue, 15 Sep, 2020, 3:41 PM Aritra Bagchi, wrote: > Hi all, > > I have two questions regarding the classic cach

[gem5-users] Queries regarding banking and response bypass in gem5 classic cache

2020-09-15 Thread Aritra Bagchi via gem5-users
Hi all, I have two questions regarding the classic cache of gem5. They are as follows: 1. Last-level caches in real hardware are usually not monolithic but are multi-banked. It seems multiple banking can be efficient only if the memory accesses are spread uniformly across all banks. Can such

[gem5-users] Resource contention and queuing delay for timing accesses in gem5

2020-09-10 Thread Aritra Bagchi via gem5-users
Hi all, A monolithic (single bank) single-port cache on a real hardware should ideally block the cache for a request whenever another request is being served in the cache. By "request", I mean both the request from any core to that cache, and the response of that request (responses will cause

[gem5-users] Re: Bypassing the last level cache in the response path

2020-09-09 Thread Aritra Bagchi via gem5-users
some cache designs, this will include the time to fill in but in other > designs the fill will happen in parallel. > > If you wish to model a cache that sends out responses faster then you > can change the response_latency. You could even set it to 0. > > Nikos > > On 09/09/2020

[gem5-users] Re: Bypassing the last level cache in the response path

2020-09-09 Thread Aritra Bagchi via gem5-users
Hi all, I didn't hear from anybody. So this is just a gentle reminder. It would be helpful if someone can respond. Thanks! On Tue, 8 Sep, 2020, 12:00 PM Aritra Bagchi, wrote: > Hi all, > I am using classic cache models in gem5. I have three levels of > caches in the hierarch

[gem5-users] Bypassing the last level cache in the response path

2020-09-08 Thread Aritra Bagchi via gem5-users
happen independently so that the core doesn't have to unnecessarily wait for its data, what do I need to do? I want suggestions to start. Can it be done? What changes need to be made, and where? Can anyone help me with this? Thanks and regards, Aritra Bagchi Research Scholar, CSE Indian Institute

[gem5-users] Regarding "CleanEvict" and "WritebackDirty" in gem5

2020-07-22 Thread Aritra Bagchi via gem5-users
Hi, What is/are the difference(s) between "*CleanEvict*" requests and " *WritebackClean*" requests in gem5 cache? The "*CleanEvict*" is considered to be giving zero for both checks of *isRead( )* and* isWrite()*, whereas, the "*WritebackClean*" is of type *isWrite( )*. What do they actually mean,

[gem5-users] Modelling Non-Volatile Cache in gem5

2020-07-22 Thread Aritra Bagchi via gem5-users
Hi, How can we model a non-volatile cache, with asymmetric read and write latency, into gem5? Which files need to be changed? How could we differentiate between reads and writes? - Aritra ___ gem5-users mailing list -- gem5-users@gem5.org To