W dniu 2012-12-17 18:37, Rob Schramm pisze:
R.S. is correct.
Crypto Express cards can be configured 2 ways... both process handshakes.
When configured as an accelerator... it only processes handshakes.
Actually Crypto Express can be configured 3 ways. Third mode is quite
new one and is
Hi
Maybe Dave can comment this , but with the normal C++compiler and the
HEAPPOOL(ALIGN, .. option we got 5-10% performance improvements.
I would take a DUMP, to see what is going around this address.
On 18.12.2012 04:05, Phil Smith wrote:
Dave Rivers wrote:
The routine in question
Sharon, Depending on how you are able to share things between the LPARS you
will have to consider whether to partition the library. For example, you have
a TCDB - can it be shared by all LPARs that share the library. If not you will
need partitioning.
There are (red)books to help with this.
Thanks for the response.
I now have 2 software vendors who have replicated this problem for me (Phoenix
and CA). I have raised a PMR with IBM but because we don't have a SupportLine
contract I'm waiting authorisation for a PotBill.
Thanks to everybody.
So, in conclusion, in the case of using Certificates, is better (in terms
of CPU) to have the certicate in Racf with the option ICSF, than to use the
utility GsKyman and this way to have the certificate in USS File because in
this case it is not posible to use ICSF
In defense of IBM it does say in the Principle and Operations... The BRANCH AND
LINK instruction (BAL and
BALR) is provided for compatibility purposes. It is recommended that, where
possible, the
BRANCH AND SAVE instruction... All I had to do it read the manual.
On the other hand it would be
I created my own archive system using DFDSS becuase I have a very small system
and DFHSM was an over kill and also I don't have access to tapes. To restore I
needed a way to document the backup file in the DFDSS report. Here is what I
did (using the CBT PDSE program):
// Jobcard
//LISTD EXEC
On 17.12.2012 21:13, Phil Smith wrote:
I'm trying to use APA to grok some performance issues, and I see this in the
output:
AddressSize Location Percent of CPU Time * 10.00% 0.4%
*12345678
1AACF228 64
W dniu 2012-12-18 12:24, Miguel Villar pisze:
Thanks to everybody.
So, in conclusion, in the case of using Certificates, is better (in
terms of CPU) to have the certicate in Racf with the option ICSF,
than to use the utility GsKyman and this way to have the certificate
in USS File because in
Qualitative statements---'BASR is marginally better than BALR' and the
like---are not useless; but measurements are better, in exactly the
sense that 'candy is dandy, but liquor is quicker'.
IBM's ostrich-like failure to provide them does not mean that such
measurements are not taken and used.
Thanks to Mike and Frank for their responses. Very much appreciated.
Sharon
From: Mike Wood mww...@ntlworld.com
To: IBM-MAIN@LISTSERV.UA.EDU
Sent: Tuesday, December 18, 2012 4:14 AM
Subject: Re: IBM 3584/3953
Sharon, Depending on how you are able to
R.S.,
Thanks for the correction.
Rob Schramm
Senior Systems Consultant
Imperium Group
On Tue, Dec 18, 2012 at 3:17 AM, R.S. r.skoru...@bremultibank.com.plwrote:
W dniu 2012-12-17 18:37, Rob Schramm pisze:
R.S. is correct.
Crypto Express cards can be configured 2 ways... both process
Radoslaw, I know the difference between ADRDSSU and HSM. We are a small shop
and I don't see HSM in our future. It would be very difficult to justify, plus
we simply don't need all that functionality. We have daily and weekly backups,
so capturing the data would not be monumental. Other
At 06:11 -0600 on 12/18/2012, Donald Likens wrote about Re: 64 Bit
Common Storage (was Common Data Space Basics):
n defense of IBM it does say in the Principle and Operations... The
BRANCH AND LINK instruction (BAL and
BALR) is provided for compatibility purposes. It is recommended
that,
On 12/18/2012 2:42 AM, Miklos Szigetvari wrote:
Hi
Maybe Dave can comment this , but with the normal C++compiler and the
HEAPPOOL(ALIGN, .. option we got 5-10% performance improvements.
I would take a DUMP, to see what is going around this address.
A SLIP IF (Instruction Fetch) trace
EP11 Mode is only supported on the CEX4S card, not the CEX3. And the CEX4S
card is only available on the zEC12. (You can also bring your current CEX3
cards forward to a zEC12, but you can't order CEX3 cards with a zEC12.)
So if you have a CEX3 you can configure it either coprocessor mode (the
Would the main reason for configuring these cards as an accelerator or
EP11 mode be for maximum performance, or to ensure that only a subset of
the available ICSF API's can be used on that card?
Mark Jacobs
On 12/18/12 12:31, Greg Boyd wrote:
EP11 Mode is only supported on the CEX4S card,
I am only getting part of the first record of the dump
DR2 H ..Á.@IEAVTSDT
CDF4C40056F7CCCEEECEC
4920800005FC200095153243A
The TRS file is 200
Various folks have made helpful suggestions. What I've done for now is to use
AMBLIST to map the load module, then calculate the offset from one of the
modules that APA *did* identify correctly. Now I have the folks who own the
underlying code (which is where the hot spots seem to be) looking
Could the original data set have been truncated before it was tersed? Can
you verify that the original data set was okay before tersing, and that the
PACK step also got return code 0?
On Tue, Dec 18, 2012 at 10:51 AM, Binyamin Dissen
bdis...@dissensoftware.com wrote:
I am only getting part
Hi
I'm using AMATERSE:
** AMA572I STARTING TERSE DECODE UNPACK 18:58:22 12/18/2012
** AMA527I INPUT - DDNAME : SYSUT1 DSNAME:
SYS12353.T185739.RA000.ESAT.TEMPTRS.H01
** AMA528I OUTPUT - DDNAME : SYSUT2 DSNAME: ESA.X.UNTERSED
** AMA555I THE VALUES ARE: BLKSIZE= 27930
Does anyone know what controls sections that appear in a CEEDUMP (COBOL batch)?
We are no longer seeing the WORKING-STORAGE section of a CEEDUMP. I am
thinking this is controlled (maybe) by LE options, but have had no luck finding
it. Any suggestions?
On 12/18/2012 11:09 AM, Peter Ten Eyck wrote:
Does anyone know what controls sections that appear in a CEEDUMP (COBOL
batch)? We are no longer seeing the WORKING-STORAGE section of a CEEDUMP. I am
thinking this is controlled (maybe) by LE options, but have had no luck finding
it. Any
I don't know. The customer is home now.
On Tue, 18 Dec 2012 11:06:54 -0700 Roger Bolan rogerbo...@gmail.com wrote:
:Could the original data set have been truncated before it was tersed? Can
:you verify that the original data set was okay before tersing, and that the
:PACK step also got return
On Tue, 18 Dec 2012 19:08:09 +0100 Miklos Szigetvari
miklos.szigetv...@isis-papyrus.com wrote:
: Hi
:
:I'm using AMATERSE:
:** AMA572I STARTING TERSE DECODE UNPACK 18:58:22 12/18/2012
:** AMA527I INPUT - DDNAME : SYSUT1 DSNAME:
:SYS12353.T185739.RA000.ESAT.TEMPTRS.H01
:**
Running IBM ENTERPRISE COBOL FOR Z/OS 4.2.0 on z/OS 1.13. Was working
(working-storage appeared in dump) under z/OS 1.11, now it does not. That is
what has me looking at a possible change in the LE runtime options betwwen
releases.
On 12/18/2012 11:33 AM, Peter Ten Eyck wrote:
Running IBM ENTERPRISE COBOL FOR Z/OS 4.2.0 on z/OS 1.13. Was working
(working-storage appeared in dump) under z/OS 1.11, now it does not. That is
what has me looking at a possible change in the LE runtime options betwwen
releases.
Right. So,
Found it. TERMTHDACT defaulting to TRACE.
Issued SETCEE CEEDOPT,TERMTHDACT=((UADUMP,,96),OVR), tested and appears to be
working.
Thanks Steve for pointing me in the right direction.
--
For IBM-MAIN subscribe / signoff /
Uploading (from workstation to MVS data set) is a step where unintentional
changes can easily happen. Using either FTP or a terminal emulator like
Personal Communications, you may have to send SITE commands or set values
to control the allocation, both size and DCB attributes) of the host data
On Tue, 18 Dec 2012 20:31:58 +0200, Binyamin Dissen wrote:
On Tue, 18 Dec 2012 19:08:09 +0100 Miklos Szigetvari wrote:
:** AMA583I INPUT DATASET SIZE IN BYTES: 3355648 OUTPUT DATASET SIZE IN
:BYTES: 29072603
:** AMA573I TERSE COMPLETE DECODE UNPACK 18:58:28 12/18/2012
:** AMA504I
W dniu 2012-12-18 18:51, Binyamin Dissen pisze:
I am only getting part of the first record of the dump
DR2 H ..Á.@IEAVTSDT
CDF4C40056F7CCCEEECEC
W dniu 2012-12-18 18:43, Mark Jacobs pisze:
Would the main reason for configuring these cards as an accelerator or
EP11 mode be for maximum performance, or to ensure that only a subset of
the available ICSF API's can be used on that card?
Accelerator works approx. 3 times faster than
Roger,
IND$FILE also has upload issues , include file location and location unless its
per allocated
Scott ford
www.identityforge.com
Tell me and I'll forget; show me and I may remember; involve me and I'll
understand. - Chinese Proverb
On Dec 18, 2012, at 2:11 PM, Roger Bolan
On Tue, 18 Dec 2012 06:11:29 -0600, Donald Likens wrote:
it would be nice to know the relative speed of every instruction.
For example:
C r15,zero
LTR r15,r15
I believe LTR is faster but how much?
It depends.
The LTR probably completes in one clock cycle or less. How much less
depends
In 0334187337131778.wa.dlikensinfosecinc@listserv.ua.edu, on
12/18/2012
at 06:11 AM, Donald Likens dlik...@infosecinc.com said:
On the other hand it would be nice to know the relative speed of
every instruction.
I doubt that there is such a thing. The last time that IBM published
timing
In
CAE1XxDGVf8mXEMYv5GiQV2-q2fqA4ogFJZLSqhqJ=iy5qo6...@mail.gmail.com,
on 12/18/2012
at 09:41 AM, John Gilmore jwgli...@gmail.com said:
IBM's ostrich-like failure to provide them
Is your ill-informed spin; you want a pony. It's up to IBM to decide
what types of timing comparisons are
In p06240801ccf644601639@[192.168.1.11], on 12/18/2012
at 11:09 AM, Robert A. Rosenberg hal9...@panix.com said:
There is also the issue that BAS/BASR does not always produce the
same result as BAL/BALR based on some factors such as AMODE. I
know that in AMODE 24 BAL/BALR will supply
In 4049238816962137.wa.ibmmainsnacons@listserv.ua.edu, on
12/17/2012
at 03:25 PM, Roger Bowler ibm-m...@snacons.com said:
Subject: Re: Phil Payne
I'm getting to the point that I cringe when I see a subject containing
just a name. I at least will miss him.
I never met him in real life
Shmuel,
I would love to meet a lot of folks on the Listserv, not fortunate enough to go
to Share
Scott ford
www.identityforge.com
Tell me and I'll forget; show me and I may remember; involve me and I'll
understand. - Chinese Proverb
On Dec 18, 2012, at 3:30 PM, Shmuel Metz (Seymour J.)
Very sharp individual, traveled, able to tell a good story, suffered no
fools. Offline we traded notes on common acquaintances and Irish folk
songs. I learned about the unfortunate Neil Moss from him... shudder.
Phil's knowledge of the business was remarkable. I found it a bit
surprising that
On 12/18/2012 3:13 PM, Shmuel Metz (Seymour J.) wrote:
Certainly not if IBM has already determined that they would be useless
in the real world.
FSVO useless. Timing information for a single instruction is pretty
meaningless these days, but it is possible to produce a worst time (no
Sent from my iPhone
On Dec 18, 2012, at 2:18 PM, Scott Ford scott_j_f...@yahoo.com wrote:
Shmuel,
I would love to meet a lot of folks on the Listserv, not fortunate enough to
go to Share
Scott ford
www.identityforge.com
Tell me and I'll forget; show me and I may remember; involve me
Phil's knowledge of the business was remarkable. I found it a bit
surprising that he came down on the Hercules community so hard,
considering the grey paths that some of his own IBM information must
have passed through.
I had my disaggreements with the man but I respected him. If we
had ever
Greg Smith wrote:
I had my disaggreements with the man but I respected him. If we
had ever met I would have had no qualms trading pints with him.
Well put. raises a pint to Mr. Payne
--
...phsiii
--
For IBM-MAIN subscribe /
On Tue, 18 Dec 2012 18:19:27 -0500, David Andrews wrote:
Phil's knowledge of the business was remarkable. I found it a bit
surprising that he came down on the Hercules community so hard,
considering the grey paths that some of his own IBM information must
have passed through.
My impression was
Instruction timing varies drastically due to multi-level cache, parallel and
out of order execution, model dependent facilities, etc. You could have
best-case and worst-case formulas. But I expect an average-case formula
would be too data dependent to be useful.
-Original Message-
From:
SHARE or a similar organization, if not IBM, could develop a standard job
stream for different environments (e.g., financial batch, financial online,
It's called LSPR. And, its follow-on, PCR.
As flawed as they are, they are all we've got.
And, they're expensive to maintain.
SHARE couldn't
The decision of coprocessor vs accelerator is performance/capacity based. When
configured as an accelerator you can process significantly more transactions
per second than you can as a coprocessor. The differences depend on which
cards (CEX2, CEX3 or CEX4S) as well as which machines you are
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