Re: [Intel-gfx] [PATCH v2] drm/i915: Avoid GPU hang when coming out of S3 or S4

f Of Daniel Vetter Sent: Monday, May 4, 2015 8:25 PM To: Chris Wilson; Antoine, Peter; Deepak S; S, Deepak; intel-gfx@lists.freedesktop.org; Tian, YeX Subject: Re: [Intel-gfx] [PATCH v2] drm/i915: Avoid GPU hang when coming out of S3 or S4 On Wed, Apr 29, 2015 at 12:39:17PM +0100, Chris Wilson w

Re: [Intel-gfx] [PATCH v2] drm/i915: Avoid GPU hang when coming out of S3 or S4

oine, Peter Cc: intel-gfx@lists.freedesktop.org; S, Deepak; Tian, YeX; Weinehall, David Subject: Re: [Intel-gfx] [PATCH v2] drm/i915: Avoid GPU hang when coming out of S3 or S4 On Tue, Apr 28, 2015 at 08:18:14AM +0100, Peter Antoine wrote: > This patch fixed a timing issue that causes a GPU han

Re: [Intel-gfx] [PATCH 2/5] drm/i915: Read the CCK fuse register from CCK

On 11/11/2014 8:58 PM, Daniel Vetter wrote: On Wed, Nov 12, 2014 at 08:40:47AM +0530, Deepak S wrote: On Saturday 08 November 2014 01:03 AM, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä When reading a CCK register we should obviously read it from CCK not Punit. This problem has b

Re: [Intel-gfx] [PATCH] drm/i915: Wait old forcewake ack to clear on vlv

On 11/5/2014 3:43 PM, Mika Kuoppala wrote: Ville Syrjälä writes: On Wed, Nov 05, 2014 at 10:18:46AM +0200, Mika Kuoppala wrote: Don't rush into getting new fw until the clearing of old one has been acked. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85684 Tested-by: lu hua Signed

Re: [Intel-gfx] [PATCH] drm/i915: Wait old forcewake ack to clear on vlv

On 11/5/2014 2:23 PM, Ville Syrjälä wrote: On Wed, Nov 05, 2014 at 10:18:46AM +0200, Mika Kuoppala wrote: Don't rush into getting new fw until the clearing of old one has been acked. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=85684 Tested-by: lu hua Signed-off-by: Mika Kuoppala

Re: [Intel-gfx] [PATCH] drm/i915: add cherryview specfic forcewake in execlists_elsp_write

9:21 PM To: Daniel Vetter Cc: Jesse Barnes; S, Deepak; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm/i915: add cherryview specfic forcewake in execlists_elsp_write On Wed, Sep 10, 2014 at 05:47:39PM +0200, Daniel Vetter wrote: > Aside if someone gets bored and wants to ap

Re: [Intel-gfx] [PATCH] drm/i915/vlv: drop punit freq staus read after setting idle

On 6/13/2014 12:10 AM, Ville Syrjälä wrote: On Thu, Jun 12, 2014 at 11:45:03PM +0530, S, Deepak wrote: >> I was polling VLV_GTLC_SURVIVABILITY_REG and VLV_GTLC_PW_STATUS to make >> sure both render and media wells and the gfx clock remain off, and I >> was also monit

Re: [Intel-gfx] [PATCH] drm/i915/vlv: drop punit freq staus read after setting idle

>> I was polling VLV_GTLC_SURVIVABILITY_REG and VLV_GTLC_PW_STATUS to make >> sure both render and media wells and the gfx clock remain off, and I >> was also monitoring vnn via svid. While that was going on I just rewrote >> PUNIT_REG_GPU_FREQ_REQ to make Punit change the frequency, and sure >> e

Re: [Intel-gfx] [PATCH] drm/i915/vlv: drop punit freq staus read after setting idle

On 6/11/2014 10:26 PM, Ville Syrjälä wrote: On Fri, Jun 06, 2014 at 08:03:20AM -0700, Jesse Barnes wrote: On Fri, 6 Jun 2014 11:29:24 +0300 Ville Syrjälä wrote: On Thu, Jun 05, 2014 at 01:49:34PM -0700, Jesse Barnes wrote: This may take awhile (~10ms), and we don't need to make noise about

Re: [Intel-gfx] [PATCH 1/2] drm/i915/bdw: Implement a basic PM interrupt handler

On 4/16/2014 2:11 PM, Ville Syrjälä wrote: On Tue, Apr 15, 2014 at 07:43:07PM -0700, Ben Widawsky wrote: On Mon, Apr 14, 2014 at 10:55:53PM +0300, Ville Syrjälä wrote: On Mon, Apr 14, 2014 at 10:41:14PM +0530, deepa...@intel.com wrote: From: Ben Widawsky Almost all of it is reusable from t

Re: [Intel-gfx] [PATCH 1/2] drm/i915/bdw: Implement a basic PM interrupt handler

On 4/16/2014 2:11 PM, Ville Syrjälä wrote: On Tue, Apr 15, 2014 at 07:43:07PM -0700, Ben Widawsky wrote: On Mon, Apr 14, 2014 at 10:55:53PM +0300, Ville Syrjälä wrote: On Mon, Apr 14, 2014 at 10:41:14PM +0530, deepa...@intel.com wrote: From: Ben Widawsky Almost all of it is reusable from t

Re: [Intel-gfx] [PATCH 00/71] drm/i915/chv: Add Cherryview support

On 4/15/2014 9:46 PM, Ville Syrjälä wrote: On Tue, Apr 15, 2014 at 09:19:27PM +0530, S, Deepak wrote: On 4/10/2014 7:34 PM, Ville Syrjälä wrote: On Thu, Apr 10, 2014 at 04:41:10PM +0300, Jani Nikula wrote: On Thu, 10 Apr 2014, Ville Syrjälä wrote: On Thu, Apr 10, 2014 at 09:31:39AM

Re: [Intel-gfx] [PATCH 00/71] drm/i915/chv: Add Cherryview support

On 4/10/2014 7:34 PM, Ville Syrjälä wrote: On Thu, Apr 10, 2014 at 04:41:10PM +0300, Jani Nikula wrote: On Thu, 10 Apr 2014, Ville Syrjälä wrote: On Thu, Apr 10, 2014 at 09:31:39AM +0530, S, Deepak wrote: On 4/10/2014 1:30 AM, Daniel Vetter wrote: On Thu, Apr 10, 2014 at 12:42:42AM

Re: [Intel-gfx] [PATCH 00/71] drm/i915/chv: Add Cherryview support

On 4/10/2014 1:30 AM, Daniel Vetter wrote: On Thu, Apr 10, 2014 at 12:42:42AM +0530, S, Deepak wrote: On 4/9/2014 10:23 PM, Daniel Vetter wrote: On Wed, Apr 09, 2014 at 06:05:27PM +0300, Ville Syrjälä wrote: On Wed, Apr 09, 2014 at 02:30:52PM +, S, Deepak wrote: Hi Ville, I am Ok

Re: [Intel-gfx] [PATCH 00/71] drm/i915/chv: Add Cherryview support

On 4/9/2014 10:23 PM, Daniel Vetter wrote: On Wed, Apr 09, 2014 at 06:05:27PM +0300, Ville Syrjälä wrote: On Wed, Apr 09, 2014 at 02:30:52PM +, S, Deepak wrote: Hi Ville, I am Ok with cleaning up and pushing the Code. Can you please tell me when we need to start pushing the code and

Re: [Intel-gfx] [PATCH 00/71] drm/i915/chv: Add Cherryview support

:52PM +, S, Deepak wrote: Hi Ville, I am Ok with cleaning up and pushing the Code. Can you please tell me when we need to start pushing the code and branch to use (drm-intel-next)? Well you can consider it pushed now that it's in the open. The patches just need a bit of extra polish I

Re: [Intel-gfx] [PATCH 00/71] drm/i915/chv: Add Cherryview support

PM To: intel-gfx@lists.freedesktop.org Cc: S, Deepak; Deak, Imre Subject: Re: [PATCH 00/71] drm/i915/chv: Add Cherryview support As you may have noticed some of this stuf may need a bit of work still to fit in better with the more recent upstream changes. So I think we need a few people to do some

Re: [Intel-gfx] [PATCH 1/6] drm/i915: Bring UP Power Wells before disabling RC6.

On 4/9/2014 9:43 AM, Ben Widawsky wrote: On Tue, Apr 08, 2014 at 06:22:52PM +0530, S, Deepak wrote: On 4/8/2014 6:13 PM, Ville Syrjälä wrote: On Mon, Apr 07, 2014 at 02:36:20PM -0700, Ben Widawsky wrote: On Mon, Apr 07, 2014 at 05:01:46PM -0300, Rodrigo Vivi wrote: From: Deepak S We

Re: [Intel-gfx] [PATCH 1/6] drm/i915: Bring UP Power Wells before disabling RC6.

On 4/8/2014 6:13 PM, Ville Syrjälä wrote: On Mon, Apr 07, 2014 at 02:36:20PM -0700, Ben Widawsky wrote: On Mon, Apr 07, 2014 at 05:01:46PM -0300, Rodrigo Vivi wrote: From: Deepak S We need do forcewake before Disabling RC6, This is what the BIOS expects while going into suspend. v2: update

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Add boot paramter to control rps boost at boot time.

On 3/13/2014 11:46 PM, Ville Syrjälä wrote: On Thu, Mar 13, 2014 at 09:30:18PM +0530, deepa...@linux.intel.com wrote: From: Deepak S We are adding a module paramter to control rps boost. By default, we enable the boost for better performace. Based on the need (perf/power) we can either enabl

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Track the enabled PM interrupts in dev_priv.

On 3/13/2014 11:46 PM, Ville Syrjälä wrote: On Thu, Mar 13, 2014 at 09:30:16PM +0530, deepa...@linux.intel.com wrote: From: Deepak S When we use different rps events for different platform or due to wa, we mgiht end up doing (vs) everywahere. Insted of this, Let's use a variable in dev_priv

Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/vlv: WA for Turbo and RC6 to work together.

On 3/13/2014 11:47 PM, Ville Syrjälä wrote: On Thu, Mar 13, 2014 at 09:30:17PM +0530, deepa...@linux.intel.com wrote: From: Deepak S With RC6 enabled, BYT has an HW issue in determining the right Gfx busyness. WA for Turbo + RC6: Use SW based Gfx busy-ness detection to decide on increasing/d

Re: [Intel-gfx] [PATCH v2] drm/i915/vlv: WA for Turbo and RC6 to work together.

On 3/5/2014 5:41 PM, Ville Syrjälä wrote: On Mon, Mar 03, 2014 at 11:35:50AM +0530, deepa...@intel.com wrote: From: Deepak S With RC6 enabled, BYT has an HW issue in determining the right Gfx busyness. WA for Turbo + RC6: Use SW based Gfx busy-ness detection to decide on increasing/decreasin

Re: [Intel-gfx] [PATCH v2] drm/i915/vlv: WA for Turbo and RC6 to work together.

Hi Ville, Please review the patch and share the comments Thanks Deepak On 3/3/2014 11:35 AM, deepa...@intel.com wrote: From: Deepak S With RC6 enabled, BYT has an HW issue in determining the right Gfx busyness. WA for Turbo + RC6: Use SW based Gfx busy-ness detection to decide on increasing/

Re: [Intel-gfx] [PATCH 3/2] drm/i915: Streamline VLV forcewake handling

On 2/28/2014 1:37 AM, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä It occured to me that when we're trying to wake up both render and media wells on VLV, we might end up calling the low level force_wake_get/put two times even though one call would be enough. Make that happen by fi

Re: [Intel-gfx] Fwd: [PATCH 2/2] drm/i915: Drop the forcewake count inc/dec around register read on VLV

On Wed, Jan 29, 2014 at 9:55 AM, ville syrjala -- Forwarded message -- From: ** mailto:ville.syrj...@linux.intel.com>> Date: Mon, Feb 24, 2014 at 8:32 PM Subject: [Intel-gfx] [PATCH 2/2] drm/i915: Drop the forcewake count inc/dec around register read on VLV To: intel-gfx@lists

Re: [Intel-gfx] Fwd: [PATCH 1/2] drm/i915: Fix VLV forcewake after reset

On Wed, Jan 29, 2014 at 9:55 AM, ville syrjala -- Forwarded message -- From: ** mailto:ville.syrj...@linux.intel.com>> Date: Mon, Feb 24, 2014 at 8:32 PM Subject: [Intel-gfx] [PATCH 1/2] drm/i915: Fix VLV forcewake after reset To: intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] [PATCH 9/9] drm/i915/bdw: Enable RC6

On Wed, Jan 29, 2014 at 9:55 AM, Ben Widawsky mailto:benjamin.widaw...@intel.com>> wrote: It is tested and looking fairly stable now, so turn it on. It wasn't intentionally turned off originally :P Signed-off-by: Ben Widawsky mailto:b...@bwidawsk.net>> --- drivers/gpu/drm/

Re: [Intel-gfx] [PATCH 8/9] drm/i915/bdw: Implement a basic PM interrupt handler

On Wed, Jan 29, 2014 at 9:55 AM, Ben Widawsky mailto:benjamin.widaw...@intel.com>> wrote: Almost all of it is reusable from the existing code. The primary difference is we need to do even less in the interrupt handler, since interrupts are not shared in the same way. The patch i

Re: [Intel-gfx] [PATCH 7/9] drm/i915/bdw: RPS frequency bits are the same as HSW

On Wed, Jan 29, 2014 at 9:55 AM, Ben Widawsky mailto:benjamin.widaw...@intel.com>> wrote: Signed-off-by: Ben Widawsky mailto:b...@bwidawsk.net>> --- drivers/gpu/drm/i915/intel_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/int

Re: [Intel-gfx] [PATCH 5/9] drm/i915/bdw: Set rp_state_caps

On Wed, Jan 29, 2014 at 9:55 AM, Ben Widawsky mailto:benjamin.widaw...@intel.com>> wrote: Signed-off-by: Ben Widawsky mailto:b...@bwidawsk.net>> --- drivers/gpu/drm/i915/intel_pm.c | 20 +--- 1 file changed, 13 insertions(+), 7 deletions(-) diff --git a/d

Re: [Intel-gfx] [PATCH 4/9] drm/i915/bdw: Use centralized rc6 info print

On Wed, Jan 29, 2014 at 9:55 AM, Ben Widawsky mailto:benjamin.widaw...@intel.com>> wrote: Signed-off-by: Ben Widawsky mailto:b...@bwidawsk.net>> --- drivers/gpu/drm/i915/intel_pm.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i

Re: [Intel-gfx] [PATCH 3/9] drm/i915: Just print rc6 facts

On Wed, Jan 29, 2014 at 9:55 AM, Ben Widawsky mailto:benjamin.widaw...@intel.com>> wrote: Everything can be overridden by module parameters, so don't confuse the users that are using them. We have RC6 turned on for all platforms which support it, but Ironlake, so the need to e

Re: [Intel-gfx] [PATCH 2/9] drm/i915: Stop pretending VLV has rc6+

On Wed, Jan 29, 2014 at 9:55 AM, Ben Widawsky mailto:benjamin.widaw...@intel.com>> wrote: It wasn't ever used by the caller anyway with the exception of what we show in sysfs. Signed-off-by: Ben Widawsky mailto:b...@bwidawsk.net>> --- drivers/gpu/drm/i915/intel_pm.c | 2

Re: [Intel-gfx] [PATCH 1/9] drm/i915: Clarify RC6 enabling

On Wed, Jan 29, 2014 at 9:55 AM, Ben Widawsky mailto:benjamin.widaw...@intel.com>> wrote: At one time, we though all future platforms would have the deeper RC6 states. As it turned out, they killed it after Ivybridge, and began using other means to achieve the power savings (the stu

Re: [Intel-gfx] [PATCH v6] drm/i915/vlv: WA to fix Voltage not getting dropped to Vmin when Gfx is power gated.

On 1/31/2014 10:40 PM, Ville Syrjälä wrote: On Thu, Jan 30, 2014 at 11:08:16PM +0530, deepa...@intel.com wrote: From: Deepak S When we enter RC6 and GFX Clocks are off, the voltage remains higher than Vmin. When we try to set the freq to RPn, it might fail since the Gfx clocks are down. So t

Re: [Intel-gfx] [PATCH v5 1/2] drm/i915: Disable/Enable PM Intrrupts based on the current freq.

On 1/30/2014 1:00 AM, Daniel Vetter wrote: On Wed, Jan 29, 2014 at 05:59:23PM +0200, Ville Syrjälä wrote: On Mon, Jan 27, 2014 at 09:35:05PM +0530, deepa...@intel.com wrote: From: Deepak S When current delay is already at max delay, Let's disable the PM UP THRESHOLD INTRRUPTS, so that we wi

Re: [Intel-gfx] [PATCH v5 1/2] drm/i915: Disable/Enable PM Intrrupts based on the current freq.

Hi Ville, Can you please review this patch. If Ok, Can we push this to nightly? Thanks Deepak On 1/29/2014 9:13 PM, S, Deepak wrote: -Original Message- From: S, Deepak Sent: Monday, January 27, 2014 9:35 PM To: intel-gfx@lists.freedesktop.org Cc: S, Deepak Subject: [PATCH v5 1/2

Re: [Intel-gfx] [PATCH v4 2/2] drm/i915/vlv: WA to fix Voltage not getting dropped to Vmin when Gfx is power gated.

On 1/29/2014 1:03 AM, Daniel Vetter wrote: On Tue, Jan 28, 2014 at 08:02:56PM +0530, S, Deepak wrote: On 1/27/2014 10:22 PM, Daniel Vetter wrote: On Mon, Jan 27, 2014 at 09:35:06PM +0530, deepa...@intel.com wrote: From: Deepak S When we enter RC6 and GFX Clocks are off, the voltage

Re: [Intel-gfx] [PATCH v4 2/2] drm/i915/vlv: WA to fix Voltage not getting dropped to Vmin when Gfx is power gated.

On 1/27/2014 10:22 PM, Daniel Vetter wrote: On Mon, Jan 27, 2014 at 09:35:06PM +0530, deepa...@intel.com wrote: From: Deepak S When we enter RC6 and GFX Clocks are off, the voltage remains higher than Vmin. When we try to set the freq to RPn, it might fail since the Gfx clocks are down. So t

Re: [Intel-gfx] [PATCH v4 2/2] drm/i915/vlv: WA to fix Voltage not getting dropped to Vmin when Gfx is power gated.

On 1/27/2014 10:37 PM, Ville Syrjälä wrote: On Mon, Jan 27, 2014 at 09:35:06PM +0530, deepa...@intel.com wrote: From: Deepak S When we enter RC6 and GFX Clocks are off, the voltage remains higher than Vmin. When we try to set the freq to RPn, it might fail since the Gfx clocks are down. So t

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/vlv: WA for Turbo and RC6 to work together.

On 1/22/2014 10:04 PM, Jesse Barnes wrote: On Tue, 21 Jan 2014 17:18:59 +0200 Ville Syrjälä wrote: On Mon, Jan 20, 2014 at 06:40:26PM +0530, deepa...@intel.com wrote: From: Deepak S With RC6 enabled, BYT has an HW issue in determining the right Gfx busyness. WA for Turbo + RC6: Use SW bas

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915/vlv: WA for Turbo and RC6 to work together.

On 1/21/2014 8:48 PM, Ville Syrjälä wrote: On Mon, Jan 20, 2014 at 06:40:26PM +0530, deepa...@intel.com wrote: From: Deepak S With RC6 enabled, BYT has an HW issue in determining the right Gfx busyness. WA for Turbo + RC6: Use SW based Gfx busy-ness detection to decide on increasing/decreasi

Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/vlv: WA to fix Voltage not getting dropped to Vmin when Gfx is power gated.

il client :) -Original Message- From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] Sent: Tuesday, January 21, 2014 8:13 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH v3 2/3] drm/i915/vlv: WA to fix Voltage not getting dropped to Vmin when Gfx is p

Re: [Intel-gfx] [PATCH v4 1/3] drm/i915: Disable/Enable PM Intrrupts based on the current freq.

lto:ville.syrj...@linux.intel.com] Sent: Tuesday, January 21, 2014 8:05 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH v4 1/3] drm/i915: Disable/Enable PM Intrrupts based on the current freq. On Mon, Jan 20, 2014 at 06:40:24PM +0530, deepa...@intel.com wrote: &g

Re: [Intel-gfx] [PATCH v3 1/3] drm/i915: Disable/Enable PM Intrrupts based on the current freq.

Thanks Deepak -Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Tuesday, January 14, 2014 2:52 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org; Chris Wilson Subject: Re: [Intel-gfx] [PATCH v3 1/3] drm/i915: Disable/Enable PM Intrrupts based

Re: [Intel-gfx] [PATCH v3 1/3] drm/i915: Disable/Enable PM Intrrupts based on the current freq.

Thanks Daniel. I will wait for Chris feedback and then address the comments. -Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Tuesday, January 14, 2014 2:52 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org; Chris Wilson Subject

Re: [Intel-gfx] [PATCH v2 2/3] drm/i915/vlv: WA to fix Voltage not getting dropped to Vmin when Gfx is power gated.

>time to potentially hold the mutex and delay any clock boosting or other >activity... Yes agree, we don't need 500ms. I will change the delay to 5ms and submit a new command. Thanks Deepak -Original Message- From: Jesse Barnes [mailto:jbar...@virtuousgeek.org] Sent: Tuesd

Re: [Intel-gfx] [PATCH v2] drm/i915: Bring UP Power Wells before disabling RC6.

9, 2014 7:32 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH v2] drm/i915: Bring UP Power Wells before disabling RC6. On Thu, Jan 09, 2014 at 07:28:27PM +0530, deepa...@intel.com wrote: > From: Deepak S > > We need do forcewake before Disabling RC6

Re: [Intel-gfx] [PATCH v2 2/3] drm/i915: Disable/Enable PM Intrrupts based on the current freq.

, 2013 8:46 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH v2 2/3] drm/i915: Disable/Enable PM Intrrupts based on the current freq. On Tue, Dec 17, 2013 at 08:35:40PM +0530, deepa...@intel.com wrote: > From: Deepak S > > When current delay is already at

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Bring UP Power Wells before disabling RC6.

We faced some issue for not following the sequence. I will add proper commit message and send it for review. -Deepak -Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Monday, December 9, 2013 10:49 PM To: S, Deepak Cc: Daniel

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Disable/Enable PM Intrrupts based on the current freq.

Hi Ville, On VLV, we do get the interrupts when we should not. That is when we already in max_delay we get the up threshold interrupts Thanks Deepak -Original Message- From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] Sent: Monday, December 9, 2013 3:42 PM To: S, Deepak Cc

Re: [Intel-gfx] [PATCH 1/4] drm/i915: update current freq properly before requesting new freq.

I am trying to get more details. I will update the thread once I have some clarification. Thanks for reviewing. -Original Message- From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] Sent: Monday, December 9, 2013 3:34 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Verify address field of PCBR register.

From: Ville Syrjälä [mailto:ville.syrj...@linux.intel.com] Sent: Monday, December 9, 2013 3:05 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 1/3] drm/i915: Verify address field of PCBR register. On Sun, Dec 08, 2013 at 01:52:35PM +0530, deepa...@intel.com w

Re: [Intel-gfx] [PATCH 2/3] drm/i915: Bring UP Power Wells before disabling RC6.

nd/Resume path. -Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Monday, December 9, 2013 1:31 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 2/3] drm/i915: Bring UP Power Wells before disabling RC6.

Re: [Intel-gfx] [PATCH 2/4] drm/i915: set min delay to rpe delay (Efficient frequency) for better performace.

ris Wilson [mailto:ch...@chris-wilson.co.uk] Sent: Sunday, December 8, 2013 9:37 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 2/4] drm/i915: set min delay to rpe delay (Efficient frequency) for better performace. On Sun, Dec 08, 2013 at 02:16:44PM +0530, de

Re: [Intel-gfx] [PATCH v2] drm/i915/vlv: Update Wait for FIFO and wait for 20 free entries. v2

ke hw engineers a bit how they've thought the driver should run this exactly? Thanks, Daniel On Wed, Dec 4, 2013 at 10:48 AM, S, Deepak wrote: > Agreed. But if we don't have a threshold, we might hit a high probability of > dropping writes if HW or SW uses all 64 entries right?.

Re: [Intel-gfx] [PATCH v2] drm/i915/vlv: Update Wait for FIFO and wait for 20 free entries. v2

Thanks Daniel. -Original Message- From: daniel.vet...@ffwll.ch [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Wednesday, December 4, 2013 2:10 PM To: S, Deepak Cc: Chris Wilson; intel-gfx Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/vlv: Update Wait for FIFO and wait

Re: [Intel-gfx] [PATCH v2] drm/i915/vlv: Update Wait for FIFO and wait for 20 free entries. v2

Sure Chris, I will recheck the spec and change the commit accordingly. -Original Message- From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] Sent: Friday, November 29, 2013 5:07 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/vlv

Re: [Intel-gfx] [PATCH v2] drm/i915/vlv: Update Wait for FIFO and wait for 20 free entries. v2

[mailto:ch...@chris-wilson.co.uk] Sent: Friday, November 29, 2013 4:09 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH v2] drm/i915/vlv: Update Wait for FIFO and wait for 20 free entries. v2 On Fri, Nov 29, 2013 at 03:44:31PM +0530, deepa...@intel.com wrote

Re: [Intel-gfx] [PATCH v2 0/3] drm/i915: Split VLV forcewake routines.

:06 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH v2 0/3] drm/i915: Split VLV forcewake routines. On Thu, Nov 28, 2013 at 09:20:40AM +0530, deepa...@intel.com wrote: > From: Deepak S > > Valleyview has power wells MEDIA & RENDER and by split

Re: [Intel-gfx] [PATCH 1/2] drm/i915/vlv: correct promotion timer value for RC6 Timeout method.

Yes I have reviewed both the patches. Thanks Deepak -Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Thursday, November 28, 2013 1:03 PM To: S, Deepak Cc: Jesse Barnes; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH

Re: [Intel-gfx] [PATCH 1/2] drm/i915/vlv: use a lower RC6 timeout on VLV

Patches looks fine. Reviewed-by: Deepak S mailto:jbar...@virtuousgeek.org>> From: Jesse Barnes mailto:jbar...@virtuousgeek.org>> Date: Fri, Nov 15, 2013 at 11:02 PM Subject: [Intel-gfx] [PATCH 1/2] drm/i915/vlv: use a lower RC6 timeout on VLV To: intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] [PATCH 2/2] drm/i915/vlv: use parallel context restore when coming out of RC6

Patches looks fine. Reviewed-by: Deepak S mailto:jbar...@virtuousgeek.org>> From: Jesse Barnes mailto:jbar...@virtuousgeek.org>> Date: Fri, Nov 15, 2013 at 11:02 PM Subject: [Intel-gfx] [PATCH 2/2] drm/i915/vlv: use parallel context restore when coming out of RC6 To: intel-gfx@lists.freedesktop

Re: [Intel-gfx] [PATCH 1/2] drm/i915/vlv: correct promotion timer value for RC6 Timeout method.

Hi Jesse, Your patches looks fine to me. I think lets go with your patches and we can abandon mine. Thanks Deepak -Original Message- From: Jesse Barnes [mailto:jbar...@virtuousgeek.org] Sent: Wednesday, November 27, 2013 10:50 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Enabling DebugFS for valleyview forcewake counts

Thanks Daniel. -Original Message- From: Daniel Vetter [mailto:daniel.vet...@ffwll.ch] On Behalf Of Daniel Vetter Sent: Wednesday, November 27, 2013 9:30 PM To: S, Deepak Cc: Jesse Barnes; intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915: Enabling DebugFS for

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Enabling DebugFS for valleyview forcewake counts

Yes Jesse, this is a warning fix. -Original Message- From: Jesse Barnes [mailto:jbar...@virtuousgeek.org] Sent: Monday, November 25, 2013 10:09 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH 3/3] drm/i915: Enabling DebugFS for valleyview forcewake

Re: [Intel-gfx] [PATCH 2/3] drm/i915/vlv: Valleyview support for forcewake Individual power wells.

Hi Chris, We are using single write fifo for the multiple power wells. Since Valleyview as only supports only one write fifo. Thanks Deepak -Original Message- From: Chris Wilson [mailto:ch...@chris-wilson.co.uk] Sent: Monday, November 25, 2013 8:18 PM To: S, Deepak Cc: intel-gfx

Re: [Intel-gfx] [PATCH] drm/i915/vlv: Add VLV specific force wake routines.

Thanks Jesse. We will re-run and compare the power numbers. -Original Message- From: Jesse Barnes [mailto:jbar...@virtuousgeek.org] Sent: Saturday, November 23, 2013 2:43 AM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm/i915/vlv: Add VLV

Re: [Intel-gfx] [PATCH] drm/i915/vlv: Add VLV specific force wake routines.

Thanks Jesse, I wil split the patches and send it for review. Thanks Deepak -Original Message- From: Jesse Barnes [mailto:jbar...@virtuousgeek.org] Sent: Wednesday, November 20, 2013 9:35 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm/i915/vlv

Re: [Intel-gfx] [PATCH] drm/i915/vlv: Add VLV specific force wake routines.

scenarios (GL Beanchmark & Media playback). Thanks, Deepak -Original Message- From: Jesse Barnes [mailto:jbar...@virtuousgeek.org] Sent: Tuesday, November 19, 2013 11:36 PM To: S, Deepak Cc: intel-gfx@lists.freedesktop.org Subject: Re: [Intel-gfx] [PATCH] drm/i915/vlv: Add VLV specific fo