y/lego,ev3-battery.yaml.
Update its cross-reference accordingly.
Fixes: 3004e581d92a ("dt-bindings: power: supply: lego-ev3-battery: Convert to DT
schema format")
Signed-off-by: Mauro Carvalho Chehab
---
Reviewed-by: David Lechner
..df25e8e0deb1 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -5769,6 +5769,14 @@ T: git git://anongit.freedesktop.org/drm/drm-misc
F:Documentation/devicetree/bindings/display/sitronix,st7735r.yaml
F:drivers/gpu/drm/tiny/st7735r.c
+DRM DRIVER FOR SITRONIX ST7789V PANELS
+M: David
On 3/17/21 8:48 AM, Sebastian Reichel wrote:
Convert the binding to DT schema format.
Cc: David Lechner
Signed-off-by: Sebastian Reichel
---
Reviewed-by: David Lechner
On 3/12/21 9:43 AM, Sebastian Reichel wrote:
Convert the binding to DT schema format.
Cc: David Lechner
Signed-off-by: Sebastian Reichel
---
Reviewed-by: David Lechner
On 2/25/21 6:03 PM, William Breathitt Gray wrote:
On Sun, Feb 21, 2021 at 03:51:40PM +, Jonathan Cameron wrote:
On Thu, 18 Feb 2021 19:32:16 +0900
William Breathitt Gray wrote:
On Sun, Feb 14, 2021 at 06:11:46PM +, Jonathan Cameron wrote:
On Fri, 12 Feb 2021 21:13:44 +0900
William
On 2/12/21 6:13 AM, William Breathitt Gray wrote:
This is in preparation for a subsequent patch implementing a character
device interface for the Counter subsystem.
Signed-off-by: William Breathitt Gray
---
Reviewed-by: David Lechner
structure,
the respective counter driver read/write callback is called, and sysfs
I/O is handled before or after the driver read/write function is called.
Cc: Syed Nayyar Waris
Cc: Patrick Havelange
Cc: Kamel Bouhara
Cc: Fabrice Gasnier
Cc: Maxime Coquelin
Cc: Alexandre Torgue
Cc: David Lechner
ore direct "Counter function" phrase
to make the intent of this code clearer. The phrase "Count action" is
adjusted herein as well for the same reason.
Cc: Syed Nayyar Waris
Cc: Patrick Havelange
Cc: Kamel Bouhara
Cc: Fabrice Gasnier
Cc: Maxime Coquelin
Cc: Alexandre Torgue
On 2/12/21 6:13 AM, William Breathitt Gray wrote:
Signal values will always be levels so let's be explicit it about it to
make the intent of the code clear.
Cc: Syed Nayyar Waris
Cc: Kamel Bouhara
Signed-off-by: William Breathitt Gray
---
Reviewed-by: David Lechner
Breathitt Gray
---
Reviewed-by: David Lechner
(I agree with William's assessment that this use of ERANGE
is consistent with other uses in the kernel.)
switch cases for the sake of making the
intent of the code clear.
Cc: Syed Nayyar Waris
Cc: Kamel Bouhara
Cc: Fabrice Gasnier
Cc: Maxime Coquelin
Cc: Alexandre Torgue
Cc: David Lechner
Signed-off-by: William Breathitt Gray
---
Reviewed-by: David Lechner
(In response to Jonathan's comment
On 2/12/21 6:13 AM, William Breathitt Gray wrote:
The 104-QUAD-8 only has two count modes where a ceiling value makes
sense: Range Limit and Modulo-N. Outside of these two modes, setting a
ceiling value is an invalid operation -- so let's report it as such by
returning -EINVAL.
Fixes:
On 2/12/21 6:13 AM, William Breathitt Gray wrote:
"Miscellaneous" is the correct spelling.
Signed-off-by: William Breathitt Gray
---
Reviewed-by: David Lechner
On 2/12/21 6:13 AM, William Breathitt Gray wrote:
Duplicate ABIs are not valid, so let's consolidate these sysfs
attributes into the main sysfs-bus-counter documentation file.
Cc: Patrick Havelange
Signed-off-by: William Breathitt Gray
---
Reviewed-by: David Lechner
On 2/11/21 5:56 PM, William Breathitt Gray wrote:
On Wed, Dec 30, 2020 at 11:36:45AM -0600, David Lechner wrote:
On 12/25/20 6:15 PM, William Breathitt Gray wrote:
diff --git a/Documentation/ABI/testing/sysfs-bus-counter-104-quad-8
b/Documentation/ABI/testing/sysfs-bus-counter-104-quad-8
On 1/28/21 4:55 PM, Suman Anna wrote:
Hi David,
On 1/15/21 6:53 PM, Suman Anna wrote:
On 1/4/21 3:18 PM, David Lechner wrote:
static int pru_rproc_probe(struct platform_device *pdev)
@@ -825,20 +808,28 @@ static int pru_rproc_remove(struct platform_device *pdev)
static const struct
On 1/15/21 10:45 AM, Suman Anna wrote:
+ Sekhar and Bartosz
Hi David,
On 1/4/21 12:30 PM, David Lechner wrote:
This adds a "ti,am1806-pruss" compatible type for the PRUSS found in
TI AM18xx/OMAP-L138 SoCs.
Signed-off-by: David Lechner
---
Documentation/devicetree/bindings
On 1/15/21 6:52 PM, Suman Anna wrote:
Hi David,
On 1/4/21 12:30 PM, David Lechner wrote:
This adds support for the PRUSS found in AM18XX/OMAP-L138. This PRUSS
doesn't have a CFG register, so that is made optional as selected by
the device tree compatible string.
ARCH_DAVINCI is added
On 1/11/21 8:08 AM, Bartosz Golaszewski wrote:
From: Bartosz Golaszewski
We no longer need to undef pr_fmt if we define our own before including
any headers.
Signed-off-by: Bartosz Golaszewski
---
Acked-by: David Lechner
---
Reviewed-by: David Lechner
On 1/5/21 2:47 AM, Marc Zyngier wrote:
On 2021-01-04 18:36, David Lechner wrote:
This implements the irqchip set_type() callback for the TI PRUSS
interrupt controller. This is needed for cases where an event needs
to be active low.
According to the technical reference manual, the polarity
.
We can also drop the local ret variable while touching this code.
Signed-off-by: David Lechner
---
drivers/remoteproc/pru_rproc.c | 49 ++
1 file changed, 20 insertions(+), 29 deletions(-)
diff --git a/drivers/remoteproc/pru_rproc.c b/drivers/remoteproc/pru_rproc.c
@@ -706,14 +824,14 @@ static int pru_rproc_set_id(struct pru_rproc *pru)
case RTU0_IRAM_ADDR_MASK:
fallthrough;
case PRU0_IRAM_ADDR_MASK:
- pru->id = 0;
+ pru->id = PRUSS_PRU0;
break;
case
Please see the individual patches for exact changes in each patch, following is
the only change from v1:
- Change the 'prus' property name to 'ti,prus' as suggested by Rob Herring,
which influences patch #1 and patch #2
It looks like "soc: ti: pruss: Add pruss_{request,
Also, I think you can get rid of 'ti,pruss-gp-mux-sel'. Can't it just
be an arg cell in 'ti,prus' entries?
Rob
+1 for using cells instead of a separate property.
FYI, we will have a similar issue with the PRUSSEVTSEL signal for the
interrupt controller on the AM18XX. I am still of the
for the McASP Tx/Rx system event in conjunction with soft UART PRU
firmware for TI AM18XX SoCs, otherwise it doesn't work.
Signed-off-by: David Lechner
---
drivers/irqchip/irq-pruss-intc.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/drivers/irqchip/irq-pruss
This adds support for the PRUSS found in AM18XX/OMAP-L138. This PRUSS
doesn't have a CFG register, so that is made optional as selected by
the device tree compatible string.
ARCH_DAVINCI is added in the Kconfig so that the driver can be selected
on that platform.
Signed-off-by: David Lechner
This is the first step for adding support for the PRUSS on TI AM18XX/OMAP-L138
SoCs. This series adds support in the top-level PRUSS driver. (Patches for the
interrupt controller and individual PRUs are independent of this change and
will be submitted separately.)
David Lechner (2):
dt-bindings
This adds a "ti,am1806-pruss" compatible type for the PRUSS found in
TI AM18xx/OMAP-L138 SoCs.
Signed-off-by: David Lechner
---
Documentation/devicetree/bindings/soc/ti/ti,pruss.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/soc/ti/ti,pru
This adds the MMC SDIO interrupts to the MMC nodes in the device tree
for TI DA850/AM18XX/OMAP-L138.
The missing interrupts were causing the following error message to be
printed:
davinci_mmc 1c4.mmc: IRQ index 1 not found
Signed-off-by: David Lechner
---
arch/arm/boot/dts/da850.dtsi
On 12/25/20 6:15 PM, William Breathitt Gray wrote:
Changes in v7:
- Implemented u32 enums; enum types can now be used directly for
callbacks and values
- Fixed refcount underflow bug
- Refactored all err check to check for err < 0; this should help
prevent future oversights on
On 12/25/20 6:15 PM, William Breathitt Gray wrote:
diff --git a/drivers/counter/ti-eqep.c b/drivers/counter/ti-eqep.c
index a60aee1a1a29..6c058b93dc98 100644
--- a/drivers/counter/ti-eqep.c
+++ b/drivers/counter/ti-eqep.c
-static ssize_t ti_eqep_position_floor_write(struct counter_device
On 12/25/20 6:15 PM, William Breathitt Gray wrote:
diff --git a/include/uapi/linux/counter.h b/include/uapi/linux/counter.h
new file mode 100644
index ..7585dc9db19d
--- /dev/null
+++ b/include/uapi/linux/counter.h
@@ -0,0 +1,123 @@
+/* SPDX-License-Identifier: GPL-2.0 WITH
On 12/25/20 6:15 PM, William Breathitt Gray wrote:
+Userspace
+-
+Userspace applications can configure Counter events via ioctl operations
+on the Counter character device node. There following ioctl codes are
+supported and provided by the `linux/counter.h` userspace header file:
+
+*
On 12/25/20 6:15 PM, William Breathitt Gray wrote:
diff --git a/Documentation/ABI/testing/sysfs-bus-counter-104-quad-8
b/Documentation/ABI/testing/sysfs-bus-counter-104-quad-8
index eac32180c40d..0ecba24d43aa 100644
--- a/Documentation/ABI/testing/sysfs-bus-counter-104-quad-8
+++
On 12/20/20 4:11 PM, William Breathitt Gray wrote:
On Sun, Dec 13, 2020 at 05:15:00PM -0600, David Lechner wrote:
On 11/22/20 2:29 PM, William Breathitt Gray wrote:
14 files changed, 1806 insertions(+), 2546 deletions(-)
It would be really nice if we could break this down into smaller
On 12/20/20 3:44 PM, William Breathitt Gray wrote:
On Sun, Dec 13, 2020 at 05:15:14PM -0600, David Lechner wrote:
On 11/22/20 2:29 PM, William Breathitt Gray wrote:
1. Should standard Counter component data types be defined as u8 or u32?
Many standard Counter component types
On 12/14/20 5:46 AM, William Breathitt Gray wrote:
On Sun, Dec 13, 2020 at 06:09:27PM -0600, David Lechner wrote:
The hardware doesn't support this. QPOSINIT is an initialization value
that is triggered by other things. When the counter overflows, it
always wraps around to zero.
Fixes
The hardware doesn't support this. QPOSINIT is an initialization value
that is triggered by other things. When the counter overflows, it
always wraps around to zero.
Fixes: f213729f6796 "counter: new TI eQEP driver"
Signed-off-by: David Lechner
---
drivers/counter/ti-e
driver. Configuration is handled via ioctl
operations on the respective Counter character device node.
Cc: David Lechner
Cc: Gwendal Grignou
Cc: Dan Carpenter
Signed-off-by: William Breathitt Gray
---
diff --git a/drivers/counter/counter-chrdev.c b/drivers/counter/counter-chrdev.c
new file mode
addressed to David Lechner. I'm somewhat
confused about how this setup would look in device drivers. I've gone
ahead and refactored the code to support u32 enums, and pushed it to
a separate branch on my repository called counter_chrdev_v6_u32_enum:
https://gitlab.com/vilhelmgray/iio
On 11/22/20 2:29 PM, William Breathitt Gray wrote:
14 files changed, 1806 insertions(+), 2546 deletions(-)
It would be really nice if we could break this down into smaller
pieces and start getting it merged. It is really tough to keep
reviewing this much code in one patch over and over
On 11/16/20 5:36 AM, Tony Lindgren wrote:
* David Lechner [201013 00:13]:
This series adds device tree nodes for the eQEP portion of the PWMSS on AM33xx
and enables it on BeagleBone Blue.
I actually submitted these a year ago, but it looks like these patches never got
applied with the actual
The values given were the offset of the register after the last
register instead of the actual last register in each range. Fix
by using the correct last register of each range.
Fixes: f213729f6796 ("counter: new TI eQEP driver")
Signed-off-by: David Lechner
Acked-by: William Brea
diff --git a/drivers/counter/counter-sysfs.c b/drivers/counter/counter-sysfs.c
index e66ed99dd5ea..cefef61f170d 100644
--- a/drivers/counter/counter-sysfs.c
+++ b/drivers/counter/counter-sysfs.c
Not sure why sysfs changes are in the chrdev patch. Are these
changes related somehow?
Sorry,
On 10/25/20 8:18 AM, William Breathitt Gray wrote:
On Tue, Oct 20, 2020 at 11:06:42AM -0500, David Lechner wrote:
On 10/18/20 11:58 AM, William Breathitt Gray wrote:
On Wed, Oct 14, 2020 at 05:40:44PM -0500, David Lechner wrote:
On 9/26/20 9:18 PM, William Breathitt Gray wrote:
+static
On 10/18/20 11:58 AM, William Breathitt Gray wrote:
On Wed, Oct 14, 2020 at 05:40:44PM -0500, David Lechner wrote:
On 9/26/20 9:18 PM, William Breathitt Gray wrote:
+static ssize_t counter_chrdev_read(struct file *filp, char __user *buf,
+ size_t len, loff_t
+static long counter_chrdev_ioctl(struct file *filp, unsigned int cmd,
+unsigned long arg)
+{
+ struct counter_device *const counter = filp->private_data;
+ raw_spinlock_t *const events_lock = >events_lock;
+ unsigned long flags;
+ struct
On 10/18/20 9:49 AM, William Breathitt Gray wrote:
On Mon, Oct 12, 2020 at 09:15:00PM -0500, David Lechner wrote:
On 9/26/20 9:18 PM, William Breathitt Gray wrote:
This is a reimplementation of the Generic Counter driver interface.
I'll follow up if I find any problems while testing but here
The values given were the offset of the register after the last
register instead of the actual last register in each range. Fix
by using the correct last register of each range.
Signed-off-by: David Lechner
---
drivers/counter/ti-eqep.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions
On 9/26/20 9:18 PM, William Breathitt Gray wrote:
+static ssize_t counter_comp_u8_store(struct device *dev,
+struct device_attribute *attr,
+const char *buf, size_t len)
+{
+ const struct counter_attribute *const a =
On 9/26/20 9:18 PM, William Breathitt Gray wrote:
+static ssize_t counter_chrdev_read(struct file *filp, char __user *buf,
+ size_t len, loff_t *f_ps)
+{
+ struct counter_device *const counter = filp->private_data;
+ int err;
+ unsigned long
On 10/14/20 2:05 PM, William Breathitt Gray wrote:
On Wed, Oct 14, 2020 at 12:43:08PM -0500, David Lechner wrote:
On 9/26/20 9:18 PM, William Breathitt Gray wrote:
diff --git a/drivers/counter/counter-chrdev.c b/drivers/counter/counter-chrdev.c
new file mode 100644
index
On 9/26/20 9:18 PM, William Breathitt Gray wrote:
diff --git a/drivers/counter/counter-chrdev.c b/drivers/counter/counter-chrdev.c
new file mode 100644
index ..2be3846e4105
--- /dev/null
+++ b/drivers/counter/counter-chrdev.c
+/**
+ * counter_push_event - queue event for
On 9/26/20 9:18 PM, William Breathitt Gray wrote:
This patch introduces a character device interface for the Counter
subsystem. Device data is exposed through standard character device read
operations. Device data is gathered when a Counter event is pushed by
the respective Counter device
On 9/26/20 9:18 PM, William Breathitt Gray wrote:
+static irqreturn_t quad8_irq_handler(int irq, void *quad8iio)
+{
+ struct quad8_iio *const priv = quad8iio;
+ const unsigned long base = priv->base;
+ unsigned long irq_status;
+ unsigned long channel;
+ u8 event;
+
On 10/13/20 1:58 PM, William Breathitt Gray wrote:
On Mon, Oct 12, 2020 at 12:04:10PM -0500, David Lechner wrote:
On 10/8/20 7:28 AM, William Breathitt Gray wrote:
On Thu, Oct 08, 2020 at 10:09:09AM +0200, Pavel Machek wrote:
Hi!
+int main(void)
+{
+struct
On 9/26/20 9:18 PM, William Breathitt Gray wrote:
This is a reimplementation of the Generic Counter driver interface.
I'll follow up if I find any problems while testing but here are some
comments I had from looking over the patch.
diff --git a/drivers/counter/counter-core.c
On 9/26/20 9:18 PM, William Breathitt Gray wrote:
The following are some questions I have about this patchset:
1. Should standard Counter component data types be defined as u8 or u32?
Many standard Counter component types such COUNTER_COMP_SIGNAL_LEVEL
have standard values defined
This enables the TI eQEP counter driver that is used by BeagleBone Blue.
Signed-off-by: David Lechner
---
arch/arm/configs/omap2plus_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/configs/omap2plus_defconfig
b/arch/arm/configs/omap2plus_defconfig
index fe383f5a92fb
This adds new nodes for the Texas Instruments Enhanced Quadrature
Encoder Pulse (eQEP) module in the PWM subsystem on AM33XX.
Signed-off-by: David Lechner
---
arch/arm/boot/dts/am33xx-l4.dtsi | 27 +++
1 file changed, 27 insertions(+)
diff --git a/arch/arm/boot/dts
discussion about the clocks in "ARM: dts:
am33xx: Add nodes for eQEP". [1]
[1]: https://lore.kernel.org/linux-omap/20190723145100.gs5...@atomide.com/
I have also included a new patch to enable the eQEP driver in the defconfig.
David Lechner (3):
ARM: dts: am33xx: Add nodes for eQEP
This enables the Enhanced Quadrature Encoder Pulse (eQEP) module for
connectors E1, E2 and E3 on BeagleBone Blue.
Signed-off-by: David Lechner
---
arch/arm/boot/dts/am335x-boneblue.dts | 54 +++
1 file changed, 54 insertions(+)
diff --git a/arch/arm/boot/dts/am335x
On 10/8/20 7:28 AM, William Breathitt Gray wrote:
On Thu, Oct 08, 2020 at 10:09:09AM +0200, Pavel Machek wrote:
Hi!
+int main(void)
+{
+struct pollfd pfd = { .events = POLLIN };
+struct counter_event event_data[2];
+
+pfd.fd =
The following commit has been merged into the irq/core branch of tip:
Commit-ID: b1026e8a95e430e615579f14f0f73c94f9690468
Gitweb:
https://git.kernel.org/tip/b1026e8a95e430e615579f14f0f73c94f9690468
Author:David Lechner
AuthorDate:Wed, 16 Sep 2020 18:36:37 +02:00
Committer
On 9/27/20 2:12 PM, Julia Lawall wrote:
Replace commas with semicolons. What is done is essentially described by
the following Coccinelle semantic patch (http://coccinelle.lip6.fr/):
//
@@ expression e1,e2; @@
e1
-,
+;
e2
... when any
//
Signed-off-by: Julia Lawall
---
Reviewed-by: David
-by: David Lechner
On 9/2/20 10:03 AM, Krzysztof Kozlowski wrote:
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and the error value gets printed.
Signed-off-by: Krzysztof Kozlowski
---
Reviewed-by: David Lechner
On 8/26/20 9:48 AM, Krzysztof Kozlowski wrote:
Common pattern of handling deferred probe can be simplified with
dev_err_probe(). Less code and also it prints the error value.
Signed-off-by: Krzysztof Kozlowski
---
Reviewed-by: David Lechner
On 8/17/20 12:43 PM, Alex Dewar wrote:
On Wed, Aug 12, 2020 at 02:12:57PM -0500, David Lechner wrote:
On 8/12/20 2:02 PM, Alex Dewar wrote:
On Wed, Aug 12, 2020 at 10:24:30AM -0500, David Lechner wrote:
On 8/12/20 8:37 AM, Alex Dewar wrote:
On Tue, Aug 11, 2020 at 09:24:10AM -0500, David
On 8/12/20 2:02 PM, Alex Dewar wrote:
On Wed, Aug 12, 2020 at 10:24:30AM -0500, David Lechner wrote:
On 8/12/20 8:37 AM, Alex Dewar wrote:
On Tue, Aug 11, 2020 at 09:24:10AM -0500, David Lechner wrote:
On 8/9/20 1:54 PM, Alex Dewar wrote:
This battery appears only to be used by a single
On 8/9/20 9:49 AM, Christophe JAILLET wrote:
'sizeof(*pllen)' should be used in place of 'sizeof(*pllout)' to avoid a
small over-allocation.
Fixes: 2d1726915159 ("clk: davinci: New driver for davinci PLL clocks")
Signed-off-by: Christophe JAILLET
---
Reviewed-by: David Lechner
On 8/12/20 8:37 AM, Alex Dewar wrote:
On Tue, Aug 11, 2020 at 09:24:10AM -0500, David Lechner wrote:
On 8/9/20 1:54 PM, Alex Dewar wrote:
This battery appears only to be used by a single board (DA850), so it
makes sense to add this to the Kconfig file so that users don't build
the module
On 8/9/20 1:54 PM, Alex Dewar wrote:
This battery appears only to be used by a single board (DA850), so it
makes sense to add this to the Kconfig file so that users don't build
the module unnecessarily. It currently seems to be built for the x86
Arch Linux kernel where it's probably not doing
On 8/9/20 9:51 AM, William Breathitt Gray wrote:
On Tue, Jul 28, 2020 at 07:20:03PM -0500, David Lechner wrote:
On 7/21/20 2:35 PM, William Breathitt Gray wrote:
This patch introduces a character device interface for the Counter
subsystem. Device data is exposed through standard character
CPMAC ETHERNET DRIVER
M: Florian Fainelli
diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c
index 78766b6ec271..0f20920073d6 100644
--- a/drivers/counter/104-quad-8.c
+++ b/drivers/counter/104-quad-8.c
@@ -621,7 +621,7 @@ static const struct iio_chan_spec
On 8/2/20 4:04 PM, William Breathitt Gray wrote:
On Tue, Jul 28, 2020 at 05:45:53PM -0500, David Lechner wrote:
On 7/21/20 2:35 PM, William Breathitt Gray wrote:
This is a reimplementation of the Generic Counter driver interface.
...
-F: include/linux/counter_enum.h
+F: include
On 7/31/20 7:28 AM, Grzegorz Jaszczyk wrote:
On Wed, 29 Jul 2020 at 21:23, David Lechner wrote:
On 7/28/20 4:18 AM, Grzegorz Jaszczyk wrote:
From: David Lechner
This implements the irq_get_irqchip_state and irq_set_irqchip_state
callbacks for the TI PRUSS INTC driver. The set callback can
On 7/31/20 6:48 AM, Grzegorz Jaszczyk wrote:
On Wed, 29 Jul 2020 at 19:34, David Lechner wrote:
It is not clear what the meaning of each cell is. Looking at later patches, it
looks like the first cell is the PRU system event number, the second cell is the
channel and the third cell is the host
On 7/28/20 7:20 PM, David Lechner wrote:
On 7/21/20 2:35 PM, William Breathitt Gray wrote:
This patch introduces a character device interface for the Counter
subsystem. Device data is exposed through standard character device read
operations. Device data is gathered when a Counter event
On 7/28/20 4:18 AM, Grzegorz Jaszczyk wrote:
From: Suman Anna
The K3 AM65x and J721E SoCs have the next generation of the PRU-ICSS IP,
commonly called ICSSG. The PRUSS INTC present within the ICSSG supports
more System Events (160 vs 64), more Interrupt Channels and Host Interrupts
(20 vs 10)
On 7/28/20 4:18 AM, Grzegorz Jaszczyk wrote:
From: David Lechner
This implements the irq_get_irqchip_state and irq_set_irqchip_state
callbacks for the TI PRUSS INTC driver. The set callback can be used
by drivers to "kick" a PRU by injecting a PRU system event.
Example:
We cou
On 7/28/20 4:18 AM, Grzegorz Jaszczyk wrote:
From: Suman Anna
The PRUSS INTC has a fixed number of output interrupt lines that are
connected to a number of processors or other PRUSS instances or other
devices (like DMA) on the SoC. The output interrupt lines 2 through 9
are usually connected
this crossbar to be setup properly.
Signed-off-by: Suman Anna
Signed-off-by: Andrew F. Davis
Signed-off-by: Roger Quadros
Signed-off-by: Grzegorz Jaszczyk
---
It looks like this patch also includes code that I wrote [1] so:
Signed-off-by: David Lechner
[1]:
https://lore.kernel.org/lkml
On 7/28/20 4:18 AM, Grzegorz Jaszczyk wrote:
From: Suman Anna
The Programmable Real-Time Unit and Industrial Communication Subsystem
(PRU-ICSS or simply PRUSS) contains an interrupt controller (INTC) that
can handle various system input events and post interrupts back to the
device-level
(unsigned long long)event_data[1].timestamp,
(unsigned long long)event_data[1].value_u64);
}
return 0;
}
Cc: David Lechner
Cc: Gwendal Grignou
Signed-off-by: William Breathitt Gray
---
-off-by: Gustavo A. R. Silva
Reviewed-by: David Lechner
On 6/27/20 1:17 PM, William Breathitt Gray wrote:
On Mon, Jun 22, 2020 at 09:08:48AM -0500, David Lechner wrote:
On 6/21/20 2:53 PM, William Breathitt Gray wrote:
For example, in the dual-axes positioning table scenario, a user
application would likely want to know the exact X and Y position
On 6/21/20 2:53 PM, William Breathitt Gray wrote:
Synapses simply indicate a change in a Count value
Ah, ok. I understand now that synapse is the wrong term for things like
the change in direction event or error events.
For example, in the dual-axes positioning table scenario, a user
On 6/16/20 8:40 PM, William Breathitt Gray wrote:
This patch introduces a character device interface for the Counter
subsystem. Device control is exposed through standard character device
read and write operations.
A /sys/bus/counter/devices/counterX/chrdev_format sysfs attribute is
introduced
On 5/31/20 12:14 PM, William Breathitt Gray wrote:
Yielding the following /dev/counter0 memory layout:
++-++---+
| Byte 0 | Byte 1 - Byte 8 | Byte 9 | Byte 10 - Byte 17 |
On 4/29/20 1:11 PM, William Breathitt Gray wrote:
Over the past couple years we have noticed some shortcomings with the
Counter sysfs interface. Although useful in the majority of situations,
there are certain use-cases where interacting through sysfs attributes
can become cumbersome and
On 10/6/19 11:03 AM, William Breathitt Gray wrote:
Count data is now always represented as an unsigned integer, while
Signal data is either SIGNAL_LOW or SIGNAL_HIGH.
Signed-off-by: William Breathitt Gray
---
Documentation/driver-api/generic-counter.rst | 22 +++-
1 file
, and relevant counter_count_read_value_set
and counter_count_write_value_get functions, are removed as they are no
longer used.
Cc: David Lechner
Cc: Patrick Havelange
Acked-by: Fabrice Gasnier
Signed-off-by: William Breathitt Gray
---
Acked-by: David Lechner
On 9/1/19 5:58 PM, David Lechner wrote:
This series adds device tree bindings and a new counter driver for the Texas
Instruments Enhanced Quadrature Encoder Pulse (eQEP).
...
David Lechner (6):
bus/ti-pwmss: move TI PWMSS driver from PWM to bus subsystem
dt-bindings: counter: new
On 8/9/19 4:41 AM, Julia Lawall wrote:
From: kbuild test robot
Use devm_platform_ioremap_resource helper which wraps
platform_get_resource() and devm_ioremap_resource() together.
Generated by: scripts/coccinelle/api/devm_platform_ioremap_resource.cocci
Fixes: 78958c294246 ("counter: new
This documents device tree binding for the Texas Instruments Enhanced
Quadrature Encoder Pulse (eQEP) Module found in various TI SoCs.
Signed-off-by: David Lechner
---
v3 changes:
- fixed style issues
- fixed generic node name
- (was suggested to drop descriptions since there is only one
to PWM devices.
Signed-off-by: David Lechner
---
v3 changes:
- none
v2 changes:
- new patch
drivers/bus/Kconfig | 9 +
drivers/bus/Makefile | 1 +
drivers/{pwm/pwm-tipwmss.c => bus/ti-pwmss.c} | 0
drivers/pwm/Kcon
th.join(COUNTER_PATH, c, COUNT0, COUNT)
cnts.append(open(cnt_path, 'r'))
while True:
for c in cnts:
c.seek(0)
val = int(c.read())
if val >= 0x8000:
val -= 0x1
print(val, end=' ')
print()
sleep(1)
David Lechner (6):
bus/
This enables the Enhanced Quadrature Encoder Pulse (eQEP) module for
connectors E1, E2 and E3 on BeagleBone Blue.
Signed-off-by: David Lechner
---
v3 changes:
- none
v2 changes:
- none
arch/arm/boot/dts/am335x-boneblue.dts | 54 +++
1 file changed, 54 insertions
1 - 100 of 2644 matches
Mail list logo
