Hi,
On 29 August 2018 19:35, Rob Herring wrote:
> To: Lorenzo Pieralisi
> Cc: linux-kernel@vger.kernel.org; Will Deacon ; Bjorn
> Helgaas ; Alan Douglas
> ; Subrahmanya Lingappa ;
> Michal Simek ; linux-
> p...@vger.kernel.org; linux-arm-ker...@lists.infradead.org
>
Hi,
Thanks for your comments.
On 20 August 2018 14:07, Kishon Vijay Abraham wrote:
> Hi,
>
> On Friday 17 August 2018 06:01 PM, Alan Douglas wrote:
> > Add a Sierra PHY driver with PCIe and USB support.
> > There are two resets to the PHY, one to enable
> > the AP
On 25 September 2018 22:02, Rob Herring wrote:
> On Thu, Sep 06, 2018 at 03:42:29PM +0100, Alan Douglas wrote:
> > Add DT binding documentation for Sierra PHY. The PHY supports
> > a number of different protocols, including PCIe and USB.
> >
> > The PHY lanes may be co
device is created for each group.
* General cleanup based on comments
* A reset is now required for each subnode. The complete PHY block
is taken out of reset at initial probe, and remains out of reset.
* Added a binding to allow for hardware configuration of PHY registers
Alan Douglas (2
the
reset line on the master lane, the resets on other lanes
have no effect.
Signed-off-by: Alan Douglas
---
.../devicetree/bindings/phy/phy-cadence-sierra.txt | 67 ++
1 file changed, 67 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/phy-cadence
lane
group, and then enable the PHY. Each group of lanes
can then be individually controlled using the power_on()/
power_off() function for that generic PHY
Signed-off-by: Alan Douglas
---
drivers/phy/cadence/Kconfig | 9 +-
drivers/phy/cadence/Makefile | 1
Hi,
On 06 December 2018 10:21, Wen Yang wrote:
> kmemdup has implemented the function that kmalloc() + memcpy().
> We prefer to kmemdup rather than code opened implementation.
>
> This issue was detected with the help of coccinelle.
>
> Signed-off-by: Wen Yang
> CC: Bob Copeland
>
> CC: Kisho
AGS_QSIZE) >> 4;
>
> return mme;
> --
> 2.17.1
Thanks for spotting this, mmc is not needed here, just interested in mme.
Acked-by: Alan Douglas
currently supported, so the value of clock
provided in device tree is ignored.
Alan Douglas (2):
dt-bindings: phy: Document cadence Sierra PHY bindings
phy: cadence: Add driver for Sierra PHY
.../devicetree/bindings/phy/cdns-sierra-phy.txt| 29 ++
drivers/phy/Kconfig
Add DT binding documentation for Sierra PHY. The PHY supports
a number of different protocols, including PCIe and USB. The
number of lanes can also be configured.
Signed-off-by: Alan Douglas
---
.../devicetree/bindings/phy/cdns-sierra-phy.txt| 29 ++
1 file changed, 29
power-down we simply put the PHY and APB bus in
reset.
Signed-off-by: Alan Douglas
---
drivers/phy/Kconfig | 1 +
drivers/phy/Makefile | 1 +
drivers/phy/cadence/Kconfig | 9 ++
drivers/phy/cadence/Makefile | 3 +
drivers/phy/cadence/cdns-sierra.c
configuration of PHY registers
Alan Douglas (2):
dt-bindings: phy: Document cadence Sierra PHY bindings
phy: cadence: Add driver for Sierra PHY
.../devicetree/bindings/phy/cdns-sierra-phy.txt| 68
drivers/phy/Kconfig| 1 +
drivers/phy/Makefile
the
reset line on the master lane, the resets on other lanes
have no effect.
Signed-off-by: Alan Douglas
---
.../devicetree/bindings/phy/cdns-sierra-phy.txt| 68 ++
1 file changed, 68 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/cdns-sierra
lane
group, and then enable the PHY. Each group of lanes
can then be individually controlled using the power_on()/
power_off() function for that generic PHY
Signed-off-by: Alan Douglas
---
drivers/phy/Kconfig | 1 +
drivers/phy/Makefile | 1 +
drivers/phy
On 15 October 2018 20:09, Rob Herring wrote:
> On Wed, Oct 03, 2018 at 05:02:25PM +0100, Alan Douglas wrote:
> > Add DT binding documentation for Sierra PHY. The PHY supports
> > a number of different protocols, including PCIe and USB.
> >
> > The PHY lanes may be co
> On 28/03/2018 12:51, Niklas Cassel wrote:
> cdns_pcie_ep_set_bar() does some round-up of the BAR size, which means that a
> 64-bit BAR can be set-up, even when the flag
> PCI_BASE_ADDRESS_MEM_TYPE_64 isn't set.
> If a 64-bit BAR was set-up, set the flag PCI_BASE_ADDRESS_MEM_TYPE_64, so
> that
On Wed, Mar 28, 2018 at 20:37, Bjorn Helgaas wrote:
> On Wed, Mar 28, 2018 at 01:24:10PM +0000, Alan Douglas wrote:
> > > On 28/03/2018 12:51, Niklas Cassel wrote:
> > > cdns_pcie_ep_set_bar() does some round-up of the BAR size, which
> > > means that a 64-bit BAR can
Hi Gustavo,
On April 27, 2018, 4:57 p.m. Gustavo Pimentel wrote:
> Add MSI-X support and update driver documentation accordingly.
>
> Add new driver parameter to allow interruption type selection.
>
> Modify the Legacy/MSI/MSI-X test process, by:
> - Add and use a specific register located in a
From: Alan Douglas
This patch is based on next branch in Bjorn Helgaas' linux-pci git repository.
Allow optional list of generic PHYs to be provided via DTS for cadence RP and
EP drivers.
Added power management ops which will enable/disable these PHYs.
Corrected parameter
Hi,
On 20 September 2018 11:10, Kishon Vijay Abraham I wrote:
> Hi,
>
> On Thursday 06 September 2018 08:12 PM, Alan Douglas wrote:
> > Add a Sierra PHY driver with PCIe and USB support.
> >
> > The PHY has multiple lanes, which can be configured into
> > gr
registers
Alan Douglas (2):
dt-bindings: phy: Document cadence Sierra PHY bindings
phy: cadence: Add driver for Sierra PHY
.../devicetree/bindings/phy/cdns-sierra-phy.txt| 65
drivers/phy/Kconfig| 1 +
drivers/phy/Makefile
lane
group, and then enable the PHY. Each group of lanes
can then be individually controlled using the power_on()/
power_off() function for that generic PHY
Signed-off-by: Alan Douglas
---
drivers/phy/Kconfig | 1 +
drivers/phy/Makefile | 1 +
drivers/phy/cadence
have no
effect.
Signed-off-by: Alan Douglas
---
.../devicetree/bindings/phy/cdns-sierra-phy.txt| 65 ++
1 file changed, 65 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/cdns-sierra-phy.txt
diff --git a/Documentation/devicetree/bindings/phy/cdns
the
reset line on the master lane, the resets on other lanes
have no effect.
Signed-off-by: Alan Douglas
---
.../devicetree/bindings/phy/cdns-sierra-phy.txt| 68 ++
1 file changed, 68 insertions(+)
create mode 100644 Documentation/devicetree/bindings/phy/cdns-sierra
complete PHY block
is taken out of reset at initial probe, and remains out of reset.
* Added a binding to allow for hardware configuration of PHY registers
Alan Douglas (2):
dt-bindings: phy: Document cadence Sierra PHY bindings
phy: cadence: Add driver for Sierra PHY
.../devicetree/bindings
lane
group, and then enable the PHY. Each group of lanes
can then be individually controlled using the power_on()/
power_off() function for that generic PHY
Signed-off-by: Alan Douglas
---
drivers/phy/Kconfig | 1 +
drivers/phy/Makefile | 1 +
drivers/phy/cadence
From: Alan Douglas
Change cdns_pcie_writel() signature, u16 value changed to u32, since
this function should write a long value
Signed-off-by: Alan Douglas
---
drivers/pci/cadence/pcie-cadence.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/pci/cadence/pcie
:
Split commit into four patches
Re-based on v4.17-rc1
Alan Douglas (4):
PCI: cadence: Update cdns_pcie_writel function signature
PCI: cadence: Add generic PHY support to host and EP drivers
dt-bindings: PCI: cadence: Add DT bindings for optional PHYs
PCI: cadence: Add Power
Hi Gustavo,
On 10 April 2018 18:15 Gustavo Pimentel wrote:
> This patch set depends the following series:
> https://lkml.org/lkml/2018/4/10/421> This series aims to add pcitest tool
> support for MSI-X.
>
> Includes new callbacks methods and handlers to trigger the MSI-X
> interruptions on the E
Hi Gustavo,
On 10 April 2018 18:15 Gustavo Pimentel wrote:
>
> Adds the MSI-X support and updates driver documentation accordingly.
>
> Changes the driver parameter in order to allow the interruption type
> selection.
>
> Signed-off-by: Gustavo Pimentel
> ---
> Documentation/misc-devices/pci-
Hi,
On 10 April 2018 18:15 Gustavo Pimentel wrote:
> Changes the pcie_raise_irq function signature, namely the interrupt_num
> variable type from u8 to u16 to accommodate the MSI-X maximum interrupts
> of 2048.
>
> Implements a PCIe config space capability iterator function to search and save
> t
On 24 April 2018 09:50, Gustavo Pimentel wrote:
> Hi Alan,
>
> On 24/04/2018 07:48, Alan Douglas wrote:
> > Hi Gustavo,
> >
> > On 10 April 2018 18:15 Gustavo Pimentel wrote:
> >> https://lkml.org/lkml/2018/4/10/421
> >> This series aims to add pcit
Hi Gustavo,
On 10 April 2018 18:15, Gustavo Pimentel wrote:
> Adds MSI-X support to the pcitest tool and modified the pcitest.sh script to
> accomodate this new type of interruption test.
>
> Signed-off-by: Gustavo Pimentel
> ---
> include/uapi/linux/pcitest.h | 1 +
> tools/pci/pcitest.c
Hi Kishon,
On 24 April 2018 10:36 Gustavo Pimentel wrote:
> Hi Kishon,
>
> On 24/04/2018 08:07, Kishon Vijay Abraham I wrote:
> > Hi,
> >
> > On Monday 23 April 2018 03:06 PM, Gustavo Pimentel wrote:
> >> Hi Kishon,
> >>
> >> On 16/04/2018 10:29, Kishon Vijay Abraham I wrote:
> >>> Hi Gustavo,
>
enum pci_epc_irq_type type, u8
> interrupt_num)
> + enum pci_epc_irq_type type, u16
> interrupt_num)
> {
> struct cdns_pcie_ep *ep = epc_get_drvdata(epc);
>
> --
> 2.7.4
>
Acked-by: Alan Douglas
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