Break sysfs attributes into common and TPM 1.2/2.0-specific, and
create sysfs groups for TPM2.0.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm-chip.c | 48
drivers/char/tpm/tpm-sysfs.c | 24 +++
Add attr_group to phy_ops that a driver relying on tpm_tis_core_init
can set to have its specific attributes registered in sysfs.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm-sysfs.c| 1 -
drivers/char/tpm/tpm.h | 8 +++-
drivers/ch
This patchset adds sysfs attributes for the cases not covered by the
existing TPM1.2 support:
- device-specific attributes provided by drivers like tpm_tis_spi
- TPM2.0
Andrey Pronin (2):
tpm: add sysfs attributes for tpm2
tpm: support driver-specific sysfs attrs in tpm_tis_core
drivers
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm_tis_spi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/char/tpm/tpm_tis_spi.c b/drivers/char/tpm/tpm_tis_spi.c
index dbaad9c..b103373 100644
--- a/drivers/char/tpm/tpm_tis_spi.c
+++ b/drivers/ch
This patchset introduces an optional maximum transfer size that can
be specified by a tpm driver. Setting the max_xfer_size helps to catch
the cases when burstcnt is incorrectly reported by the device (e.g. >64
for spi - happened in practice) and gracefully handle such situations.
Andrey Pro
). Without catching, causes the physical layer to reject xfer,
while is easily preventable by re-querying TPM_STS.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm_tis_core.c | 17 +++--
drivers/char/tpm/tpm_tis_core.h | 13 +
2 files chang
tpm_tis_core was missing conversion from msec when assigning
max timeouts from constants.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm_tis_core.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/char/tpm/tpm_tis_core.c b/d
These patches help working with 32-bit TPM2.0-specific properties that
can be read using TPM2_GetCapability(capability = TPM_CAP_TPM_PROPERTIES):
- TPM_PT_PERMANENT
- TPM_PT_STARTUP_CLEAR
Andrey Pronin (2):
tpm: define constants for tpm2 properties
tpm: fix byte-order for the value read
Change-Id: I47cb1793736781fbea93e5bf80b783e0ac9e8628
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm.h | 26 ++
1 file changed, 26 insertions(+)
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h
index 8890df2..ad3b9d1
Change-Id: I7d71cd379b1a3b7659d20a1b6008216762596590
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm2-cmd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/char/tpm/tpm2-cmd.c b/drivers/char/tpm/tpm2-cmd.c
index a1673dc..a88b31e
On Wed, Jul 20, 2016 at 11:03:36AM -0600, Jason Gunthorpe wrote:
> On Tue, Jul 19, 2016 at 05:24:11PM -0700, Andrey Pronin wrote:
>
> > The only two things that bother me with such approach are
> > (1) whatever names I pick for the new set of functions, they
> > wil
On Wed, Jul 20, 2016 at 01:54:22PM -0600, Jason Gunthorpe wrote:
> On Wed, Jul 20, 2016 at 12:49:12PM -0700, Andrey Pronin wrote:
>
> > Sorry, I just updated this patch description in v2 to indicate why they are
> > not
> > hard-coded, but didn't answer explicitly.
On Thu, Jul 21, 2016 at 04:03:12PM -0500, Rob Herring wrote:
> On Wed, Jul 20, 2016 at 12:49:12PM -0700, Andrey Pronin wrote:
> > On Wed, Jul 20, 2016 at 02:03:03PM -0500, Rob Herring wrote:
> > > On Tue, Jul 19, 2016 at 08:41:24PM -0700, Andrey Pronin wrote:
> >
>
On Thu, Jul 28, 2016 at 05:17:06PM -0600, Jason Gunthorpe wrote:
> On Thu, Jul 28, 2016 at 04:01:41PM -0700, Dmitry Torokhov wrote:
>
> > > + u8 tx_buf[MAX_SPI_FRAMESIZE];
> > > + u8 rx_buf[MAX_SPI_FRAMESIZE];
> >
> > Both of these need to be annotated as "cacheline_aligned" since we
> > eye
Add TPM2.0 PTP FIFO compatible SPI interface for chips with Cr50
firmware.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
.../devicetree/bindings/security/tpm/cr50_spi.txt | 21 +
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devi
of the next transaction;
- if there is no spi activity for some time, it may go to sleep,
and needs to be waken up before sending further commands;
- access to vendor-specific registers.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/Kconfig| 9 ++
d
potential race-condition with last_access_jiffies.
Started using tx_buf/rx_buf in cr50_spi_phy to avoid
potential problems with DMA.
Removed DT properties for fw timing parameters.
Fixed style.
v4: Fixed cacheline alignment for xfer buffers.
Andrey Pronin (2):
tpm: devicetree: document
Annotate buffers used in spi transactions as cacheline_aligned
to use in DMA transfers.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/st33zp24/spi.c | 4 ++--
drivers/char/tpm/tpm_tis_spi.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff
Hi Peter,
> > This patchset adds support for H1 Secure Microcontroller running
> > Cr50 firmware. It implements several functions, including TPM-like
> > functionality, and communicates over SPI using the FIFO protocol
> > described in the PTP Spec, section 6.
> > H1 is a proprietary chip that
ved unnecessary accessors in tpm_tis_core.h, fixed style
v3: simplified logic: simply cap the burstcnt at max_xfer_size, don't
attempt to re-request from tpm.
Andrey Pronin (2):
tpm_tis_core: add optional max xfer size check
tpm_tis_spi: add max xfer size
drivers/char/tpm/tpm_tis_core.c
Reject burstcounts larger than 64 bytes reported by tpm.
SPI Hardware Protocol defined in section 6.4 of TCG PTP
Spec supports up to 64 bytes of data in a transaction.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm_tis_spi.c | 1 +
1 file changed, 1 ins
the physical layer to reject xfer.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm_tis_core.c | 9 -
drivers/char/tpm/tpm_tis_core.h | 1 +
2 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/ch
and lockout properties.
v3: Avoid creating a separate 'show' function for each attribute.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm-chip.c | 4 +-
drivers/char/tpm/tpm-sysfs.c | 122 +--
drivers/char/tpm/tpm.h
potential race-condition with last_access_jiffies.
Started using tx_buf/rx_buf in cr50_spi_phy to avoid
potential problems with DMA.
Removed DT properties for fw timing parameters.
Fixed style.
Andrey Pronin (2):
tpm: devicetree: document properties for cr50
tpm: add driver for cr50
Add TPM2.0 PTP FIFO compatible SPI interface for chips with Cr50
firmware.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
.../devicetree/bindings/security/tpm/cr50_spi.txt | 21 +
1 file changed, 21 insertions(+)
create mode 100644 Documentation/devi
of the next transaction;
- if there is no spi activity for some time, it may go to sleep,
and needs to be waken up before sending further commands;
- access to vendor-specific registers.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/Kconfig| 9 ++
d
On Wed, Jul 20, 2016 at 02:03:03PM -0500, Rob Herring wrote:
> On Tue, Jul 19, 2016 at 08:41:24PM -0700, Andrey Pronin wrote:
Hi Rob,
> As I mentioned, there may be common properties. It doesn't seem you
> looked, so I did:
>
> - spi-rx-delay-us - (optional) Microsecond del
On Mon, Jul 18, 2016 at 10:04:21PM +0300, Jarkko Sakkinen wrote:
> On Thu, Jul 14, 2016 at 06:07:18PM -0700, Andrey Pronin wrote:
> > Change-Id: I7d71cd379b1a3b7659d20a1b6008216762596590
> > Signed-off-by: Andrey Pronin <apro...@chromium.org>
>
> Please remove the i
On Mon, Jul 18, 2016 at 10:11:41PM +0300, Jarkko Sakkinen wrote:
> On Thu, Jul 14, 2016 at 06:51:36PM -0700, Andrey Pronin wrote:
> > Add attr_group to phy_ops that a driver relying on tpm_tis_core_init
> > can set to have its specific attributes registered in sysfs.
> >
>
On Tue, Jul 19, 2016 at 03:55:27PM +0300, Jarkko Sakkinen wrote:
> On Thu, Jul 14, 2016 at 08:44:44PM -0700, Andrey Pronin wrote:
> > On Thu, Jul 14, 2016 at 09:32:36PM -0600, Jason Gunthorpe wrote:
> > > On Thu, Jul 14, 2016 at 07:20:18PM -0700, Andrey Pronin wrote:
> >
). Without catching, causes the physical layer to reject xfer,
while is easily preventable by re-querying TPM_STS.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm_tis_core.c | 18 --
drivers/char/tpm/tpm_tis_core.h | 1 +
2 files changed, 17 inse
Reject burstcounts larger than 64 bytes reported by tpm.
SPI Hardware Protocol defined in section 6.4 of TCG PTP
Spec supports up to 64 bytes of data in a transaction.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm_tis_spi.c | 1 +
1 file changed, 1 ins
ved unnecessary accessors in tpm_tis_core.h, fixed style
Andrey Pronin (2):
tpm_tis_core: add optional max xfer size check
tpm_tis_spi: add max xfer size
drivers/char/tpm/tpm_tis_core.c | 18 --
drivers/char/tpm/tpm_tis_core.h | 1 +
drivers/char/tpm/tpm_tis_spi.c | 1 +
3 fi
of the next transaction;
- if there is no spi activity for some time, it may go to sleep,
and needs to be waken up before sending further commands;
- access to vendor-specific registers.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/Kconfig| 9 +
driver
is investigating
for inclusion in future Chromebooks.
Depends on the following patchset:
- tpm_tis_core: add optional max xfer size check
v2: Removed driver-specific sysfs attributes.
Compatible id changed to cr50 from cr50_spi.
Updated descriptions of the supported device/interface.
Andrey Pronin (2
Add TPM2.0 PTP FIFO compatible SPI interface for chips with Cr50
firmware. Several timing-related properties that may differ from
one firmware version to another are added to devicetree.
Document these properties.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
.../devicetree/bi
and lockout properties.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm-chip.c | 4 +-
drivers/char/tpm/tpm-sysfs.c | 108 +--
drivers/char/tpm/tpm.h | 30
3 files changed, 136 insertions(+), 6 del
On Wed, Jul 20, 2016 at 11:05:53AM -0600, Jason Gunthorpe wrote:
> On Tue, Jul 19, 2016 at 07:51:52PM -0700, Andrey Pronin wrote:
> > Add sysfs attributes in TPM2.0 case for:
> > - TPM_PT_PERMANENT flags
> > - TPM_PT_STARTUP_CLEAR flags
> > - lockout-related propert
On Thu, Jul 14, 2016 at 09:28:14PM -0600, Jason Gunthorpe wrote:
> On Thu, Jul 14, 2016 at 07:50:26PM -0700, Andrey Pronin wrote:
> > Yes, it has a TCG-compliant interface, however, there are several things
> > specific to this device:
> > - need to ensure a certain delay bet
On Thu, Jul 14, 2016 at 09:34:39PM -0600, Jason Gunthorpe wrote:
> On Thu, Jul 14, 2016 at 08:32:01PM -0700, Andrey Pronin wrote:
>
> > tpm2 shares some of the attributes with tpm1 (e.g. timeouts). Do I still
> > just add those separately for tpm2 to groups[1] and keep grou
On Thu, Jul 14, 2016 at 09:05:53PM -0700, Guenter Roeck wrote:
> On Thu, Jul 14, 2016 at 7:20 PM, Andrey Pronin <apro...@chromium.org> wrote:
> > +
> > +Required properties:
> > +- compatible: Should be "google,cr50_spi".
>
> google,cr50, maybe ? The
On Thu, Jul 14, 2016 at 09:35:53PM -0600, Jason Gunthorpe wrote:
> On Thu, Jul 14, 2016 at 08:17:01PM -0700, Andrey Pronin wrote:
> > conversion. The only place tpm2_get_tpm_pt() was used before was in
> > tpm2_gen_interrupt, which discarded the result. So, nobody noticed,
> >
This patchset adds a TCG TPM2.0 PTP FIFO compliant interface for
Cr50 chip on SPI.
Depends on the following patches by Andrey Pronin <apro...@chromium.org>
that add new members to phy_ops in tpm_tis_core:
- tpm: support driver-specific sysfs attrs in tpm_tis_core
- tpm_tis_core: add op
On Thu, Jul 14, 2016 at 07:28:55PM -0700, Peter Huewe wrote:
> Am 14. Juli 2016 19:20:16 GMT-07:00, schrieb Andrey Pronin
> <apro...@chromium.org>:
> >This patchset adds a TCG TPM2.0 PTP FIFO compliant interface for
> >Cr50 chip on SPI.
> >
> >Depends on th
On Thu, Jul 14, 2016 at 09:21:45PM -0600, Jason Gunthorpe wrote:
> On Thu, Jul 14, 2016 at 06:51:35PM -0700, Andrey Pronin wrote:
> > - sysfs_remove_link(>dev.parent->kobj, "ppi");
> > -
> > - for (i = chip->groups[0]->attrs; *i != NULL; ++i)
> >
On Thu, Jul 14, 2016 at 09:23:27PM -0600, Jason Gunthorpe wrote:
> On Thu, Jul 14, 2016 at 06:51:36PM -0700, Andrey Pronin wrote:
> > - WARN_ON(chip->groups_cnt != 0);
>
> Nope.
>
> > - const struct attribute_group *groups[3];
> > + /* up to 4 attribute gro
Add TCG TPM2.0 PTP FIFO compatible interface for Cr50 chip on SPI bus.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/Kconfig| 9 +
drivers/char/tpm/Makefile | 1 +
drivers/char/tpm/cr50_spi.c | 409
3 files c
Add TPM2.0-compatible interface to Cr50. Document its properties
in devicetree.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
.../devicetree/bindings/security/tpm/cr50_spi.txt | 30 ++
1 file changed, 30 insertions(+)
create mode 100644 Documentation/devi
On Thu, Jul 14, 2016 at 09:10:46PM -0600, Jason Gunthorpe wrote:
> On Thu, Jul 14, 2016 at 06:07:18PM -0700, Andrey Pronin wrote:
> > Change-Id: I7d71cd379b1a3b7659d20a1b6008216762596590
> > Signed-off-by: Andrey Pronin <apro...@chromium.org>
> > drivers/char/tpm/tp
On Thu, Jul 14, 2016 at 09:13:51PM -0600, Jason Gunthorpe wrote:
> On Thu, Jul 14, 2016 at 06:39:04PM -0700, Andrey Pronin wrote:
>
> > +static inline u16 tpm_tis_max_xfer_size(struct tpm_tis_data *data)
> > +{
> > + return data->phy_ops->max_xfer_size;
> &
On Thu, Jul 14, 2016 at 09:32:36PM -0600, Jason Gunthorpe wrote:
> On Thu, Jul 14, 2016 at 07:20:18PM -0700, Andrey Pronin wrote:
>
> > +static int cr50_spi_read16(struct tpm_tis_data *data, u32 addr, u16
> > *result)
> > +{
> > + int rc;
> > +
> > +
On Fri, Jul 01, 2016 at 09:02:30AM +0100, Mark Brown wrote:
> On Wed, Jun 29, 2016 at 08:54:24PM -0700, apro...@chromium.org wrote:
> > From: Andrey Pronin <apro...@chromium.org>
> >
> > Some SPI devices may go to sleep after a period of inactivity
> > on SPI. For
On Fri, Jul 01, 2016 at 07:17:08PM +0200, Mark Brown wrote:
> On Fri, Jul 01, 2016 at 10:05:50AM -0700, Doug Anderson wrote:
>
> > I'm curious why you you need a timer at all. Can't you just keep
> > track of the jiffies that you last sent and do subtraction? ...or you
> > could get even more
On Mon, Jan 23, 2017 at 01:39:01PM -0700, Jason Gunthorpe wrote:
> On Mon, Jan 23, 2017 at 12:02:46PM -0800, Andrey Pronin wrote:
>
> > > But if there is no actual need to do this right now then don't worry
> > > about overdesigning things..
> >
> > OK, I c
On Mon, Jan 23, 2017 at 12:02:46PM -0800, Andrey Pronin wrote:
> On Tue, Jan 17, 2017 at 04:22:07PM -0700, Jason Gunthorpe wrote:
> > On Tue, Jan 17, 2017 at 03:00:53PM -0800, Andrey Pronin wrote:
> >
> > > Here I was talking not about tpm_tis_spi or tpm_tis. Those ca
On Tue, Jan 17, 2017 at 04:22:07PM -0700, Jason Gunthorpe wrote:
> On Tue, Jan 17, 2017 at 03:00:53PM -0800, Andrey Pronin wrote:
>
> > Here I was talking not about tpm_tis_spi or tpm_tis. Those can
> > continue relying on the core, or register the default handler u
On Mon, Jan 16, 2017 at 09:19:19AM -0700, Jason Gunthorpe wrote:
> On Fri, Jan 13, 2017 at 04:42:30PM -0800, Andrey Pronin wrote:
> > On Fri, Jan 13, 2017 at 05:28:57PM -0700, Jason Gunthorpe wrote:
> > > On Fri, Jan 13, 2017 at 04:09:54PM -0800, Andrey Pronin wrote:
> >
On Tue, Jan 17, 2017 at 12:27:28PM -0700, Jason Gunthorpe wrote:
> On Tue, Jan 17, 2017 at 09:58:27AM -0800, Andrey Pronin wrote:
> > > Yes, sorry, I should have mentioned that.. Maybe that is too much to
> > > fix..
> >
> > If we fix sysfs to go through tp
On Tue, Jan 17, 2017 at 01:59:33PM -0700, Jason Gunthorpe wrote:
> On Tue, Jan 17, 2017 at 12:13:36PM -0800, Andrey Pronin wrote:
> > > Is there some way we can have the TPM core do this without requiring
> > > the driver to add a shutdown the struct driver?
> >
command, if any, and then clears out chip->ops and unregisters
sysfs entities.
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
drivers/char/tpm/tpm_i2c_infineon.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/char/tpm/tpm_i2c_infineon.c
b/drivers
On Fri, Jan 13, 2017 at 05:28:57PM -0700, Jason Gunthorpe wrote:
> On Fri, Jan 13, 2017 at 04:09:54PM -0800, Andrey Pronin wrote:
> > Resetting TPM while processing a command may lead to issues
> > on the next boot. Ensure that we don't have any ongoing
> > commands, and tha
t;; cat ./loop/mount/test.$i; echo
fi
done
umount ./loop/mount
umount ./loop
losetup -d $LOOPDEV
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
fs/ecryptfs/ecryptfs_kernel.h | 1 +
fs/ecryptfs/inode.c | 6 ++
fs/ecryptfs/read_write.c | 22 ++
t;; cat ./loop/mount/test.$i; echo
fi
done
umount ./loop/mount
umount ./loop
losetup -d $LOOPDEV
Signed-off-by: Andrey Pronin <apro...@chromium.org>
---
Changes since v1:
- Switched to datasync=1 for ecryptfs_fsync_lower() in truncate_upper()
fs/ecryptfs/ecryptfs_kernel.h | 1 +
fs/
On Fri, Apr 21, 2017 at 04:52:13PM -0700, Andrey Pronin wrote:
> On Thu, Apr 20, 2017 at 06:27:52PM -0500, Tyler Hicks wrote:
> > On 04/18/2017 06:36 PM, Andrey Pronin wrote:
> > > If the updated ecryptfs header data is not written to disk before
> > > the lower fil
On Thu, Apr 20, 2017 at 06:27:52PM -0500, Tyler Hicks wrote:
> On 04/18/2017 06:36 PM, Andrey Pronin wrote:
> > If the updated ecryptfs header data is not written to disk before
> > the lower file is truncated, a crash may leave the filesystem
> > in the state when the
ed-off-by: Andrey Pronin
---
drivers/char/tpm/tpm-chip.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/char/tpm/tpm-chip.c b/drivers/char/tpm/tpm-chip.c
index 8c77e88012e9..a410ca40a3c5 100644
--- a/drivers/char/tpm/tpm-chip.c
+++ b/drivers/char/tpm/tpm-chip.c
@@ -296,7
On Fri, Jul 10, 2020 at 4:40 AM Jarkko Sakkinen
wrote:
>
> On Thu, Jul 09, 2020 at 05:22:09PM -0700, Andrey Pronin wrote:
> > This patch prevents NULL dereferencing when using chip->ops while
> > sending TPM2_Shutdown command if both tpm_class_shutdown handler and
&g
On Fri, Jul 10, 2020 at 12:08 PM James Bottomley
wrote:
>
> On Thu, 2020-07-09 at 17:22 -0700, Andrey Pronin wrote:
> > This patch prevents NULL dereferencing when using chip->ops while
> > sending TPM2_Shutdown command if both tpm_class_shutdown handler and
> > tpm
On Thu, Apr 20, 2017 at 06:27:52PM -0500, Tyler Hicks wrote:
> On 04/18/2017 06:36 PM, Andrey Pronin wrote:
> > If the updated ecryptfs header data is not written to disk before
> > the lower file is truncated, a crash may leave the filesystem
> > in the state when the
t;; cat ./loop/mount/test.$i; echo
fi
done
umount ./loop/mount
umount ./loop
losetup -d $LOOPDEV
Signed-off-by: Andrey Pronin
---
fs/ecryptfs/ecryptfs_kernel.h | 1 +
fs/ecryptfs/inode.c | 6 ++
fs/ecryptfs/read_write.c | 22 ++
3 files change
command, if any, and then clears out chip->ops and unregisters
sysfs entities.
Signed-off-by: Andrey Pronin
---
drivers/char/tpm/tpm_i2c_infineon.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/char/tpm/tpm_i2c_infineon.c
b/drivers/char/tpm/tpm_i2c_infineon.c
in
On Fri, Jan 13, 2017 at 05:28:57PM -0700, Jason Gunthorpe wrote:
> On Fri, Jan 13, 2017 at 04:09:54PM -0800, Andrey Pronin wrote:
> > Resetting TPM while processing a command may lead to issues
> > on the next boot. Ensure that we don't have any ongoing
> > commands, and tha
On Mon, Jan 16, 2017 at 09:19:19AM -0700, Jason Gunthorpe wrote:
> On Fri, Jan 13, 2017 at 04:42:30PM -0800, Andrey Pronin wrote:
> > On Fri, Jan 13, 2017 at 05:28:57PM -0700, Jason Gunthorpe wrote:
> > > On Fri, Jan 13, 2017 at 04:09:54PM -0800, Andrey Pronin wrote:
> >
On Tue, Jan 17, 2017 at 12:27:28PM -0700, Jason Gunthorpe wrote:
> On Tue, Jan 17, 2017 at 09:58:27AM -0800, Andrey Pronin wrote:
> > > Yes, sorry, I should have mentioned that.. Maybe that is too much to
> > > fix..
> >
> > If we fix sysfs to go through tp
On Tue, Jan 17, 2017 at 01:59:33PM -0700, Jason Gunthorpe wrote:
> On Tue, Jan 17, 2017 at 12:13:36PM -0800, Andrey Pronin wrote:
> > > Is there some way we can have the TPM core do this without requiring
> > > the driver to add a shutdown the struct driver?
> >
On Fri, Apr 21, 2017 at 04:52:13PM -0700, Andrey Pronin wrote:
> On Thu, Apr 20, 2017 at 06:27:52PM -0500, Tyler Hicks wrote:
> > On 04/18/2017 06:36 PM, Andrey Pronin wrote:
> > > If the updated ecryptfs header data is not written to disk before
> > > the lower fil
t;; cat ./loop/mount/test.$i; echo
fi
done
umount ./loop/mount
umount ./loop
losetup -d $LOOPDEV
Signed-off-by: Andrey Pronin
---
Changes since v1:
- Switched to datasync=1 for ecryptfs_fsync_lower() in truncate_upper()
fs/ecryptfs/ecryptfs_kernel.h | 1 +
fs/ecryptfs/inode.c |
On Tue, Jan 17, 2017 at 04:22:07PM -0700, Jason Gunthorpe wrote:
> On Tue, Jan 17, 2017 at 03:00:53PM -0800, Andrey Pronin wrote:
>
> > Here I was talking not about tpm_tis_spi or tpm_tis. Those can
> > continue relying on the core, or register the default handler u
On Mon, Jan 23, 2017 at 12:02:46PM -0800, Andrey Pronin wrote:
> On Tue, Jan 17, 2017 at 04:22:07PM -0700, Jason Gunthorpe wrote:
> > On Tue, Jan 17, 2017 at 03:00:53PM -0800, Andrey Pronin wrote:
> >
> > > Here I was talking not about tpm_tis_spi or tpm_tis. Those ca
On Mon, Jan 23, 2017 at 01:39:01PM -0700, Jason Gunthorpe wrote:
> On Mon, Jan 23, 2017 at 12:02:46PM -0800, Andrey Pronin wrote:
>
> > > But if there is no actual need to do this right now then don't worry
> > > about overdesigning things..
> >
> > OK, I c
On Tue, Jul 19, 2016 at 03:55:27PM +0300, Jarkko Sakkinen wrote:
> On Thu, Jul 14, 2016 at 08:44:44PM -0700, Andrey Pronin wrote:
> > On Thu, Jul 14, 2016 at 09:32:36PM -0600, Jason Gunthorpe wrote:
> > > On Thu, Jul 14, 2016 at 07:20:18PM -0700, Andrey Pronin wrote:
> >
). Without catching, causes the physical layer to reject xfer,
while is easily preventable by re-querying TPM_STS.
Signed-off-by: Andrey Pronin
---
drivers/char/tpm/tpm_tis_core.c | 18 --
drivers/char/tpm/tpm_tis_core.h | 1 +
2 files changed, 17 insertions(+), 2 deletions(-)
diff
Reject burstcounts larger than 64 bytes reported by tpm.
SPI Hardware Protocol defined in section 6.4 of TCG PTP
Spec supports up to 64 bytes of data in a transaction.
Signed-off-by: Andrey Pronin
---
drivers/char/tpm/tpm_tis_spi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers
ved unnecessary accessors in tpm_tis_core.h, fixed style
Andrey Pronin (2):
tpm_tis_core: add optional max xfer size check
tpm_tis_spi: add max xfer size
drivers/char/tpm/tpm_tis_core.c | 18 --
drivers/char/tpm/tpm_tis_core.h | 1 +
drivers/char/tpm/tpm_tis_spi.c | 1 +
3 fi
and lockout properties.
Signed-off-by: Andrey Pronin
---
drivers/char/tpm/tpm-chip.c | 4 +-
drivers/char/tpm/tpm-sysfs.c | 108 +--
drivers/char/tpm/tpm.h | 30
3 files changed, 136 insertions(+), 6 deletions(-)
diff --git a/drivers
Add TPM2.0 PTP FIFO compatible SPI interface for chips with Cr50
firmware. Several timing-related properties that may differ from
one firmware version to another are added to devicetree.
Document these properties.
Signed-off-by: Andrey Pronin
---
.../devicetree/bindings/security/tpm
of the next transaction;
- if there is no spi activity for some time, it may go to sleep,
and needs to be waken up before sending further commands;
- access to vendor-specific registers.
Signed-off-by: Andrey Pronin
---
drivers/char/tpm/Kconfig| 9 +
drivers/char/tpm/Makefile | 1
is investigating
for inclusion in future Chromebooks.
Depends on the following patchset:
- tpm_tis_core: add optional max xfer size check
v2: Removed driver-specific sysfs attributes.
Compatible id changed to cr50 from cr50_spi.
Updated descriptions of the supported device/interface.
Andrey Pronin (2
On Wed, Jul 20, 2016 at 11:05:53AM -0600, Jason Gunthorpe wrote:
> On Tue, Jul 19, 2016 at 07:51:52PM -0700, Andrey Pronin wrote:
> > Add sysfs attributes in TPM2.0 case for:
> > - TPM_PT_PERMANENT flags
> > - TPM_PT_STARTUP_CLEAR flags
> > - lockout-related propert
On Wed, Jul 20, 2016 at 02:03:03PM -0500, Rob Herring wrote:
> On Tue, Jul 19, 2016 at 08:41:24PM -0700, Andrey Pronin wrote:
Hi Rob,
> As I mentioned, there may be common properties. It doesn't seem you
> looked, so I did:
>
> - spi-rx-delay-us - (optional) Microsecond del
On Wed, Jul 20, 2016 at 11:03:36AM -0600, Jason Gunthorpe wrote:
> On Tue, Jul 19, 2016 at 05:24:11PM -0700, Andrey Pronin wrote:
>
> > The only two things that bother me with such approach are
> > (1) whatever names I pick for the new set of functions, they
> > wil
On Thu, Jul 14, 2016 at 09:34:39PM -0600, Jason Gunthorpe wrote:
> On Thu, Jul 14, 2016 at 08:32:01PM -0700, Andrey Pronin wrote:
>
> > tpm2 shares some of the attributes with tpm1 (e.g. timeouts). Do I still
> > just add those separately for tpm2 to groups[1] and keep grou
On Thu, Jul 14, 2016 at 09:28:14PM -0600, Jason Gunthorpe wrote:
> On Thu, Jul 14, 2016 at 07:50:26PM -0700, Andrey Pronin wrote:
> > Yes, it has a TCG-compliant interface, however, there are several things
> > specific to this device:
> > - need to ensure a certain delay bet
On Thu, Jul 14, 2016 at 09:05:53PM -0700, Guenter Roeck wrote:
> On Thu, Jul 14, 2016 at 7:20 PM, Andrey Pronin wrote:
> > +
> > +Required properties:
> > +- compatible: Should be "google,cr50_spi".
>
> google,cr50, maybe ? The "_spi" seems re
On Thu, Jul 14, 2016 at 09:35:53PM -0600, Jason Gunthorpe wrote:
> On Thu, Jul 14, 2016 at 08:17:01PM -0700, Andrey Pronin wrote:
> > conversion. The only place tpm2_get_tpm_pt() was used before was in
> > tpm2_gen_interrupt, which discarded the result. So, nobody noticed,
> >
On Mon, Jul 18, 2016 at 10:04:21PM +0300, Jarkko Sakkinen wrote:
> On Thu, Jul 14, 2016 at 06:07:18PM -0700, Andrey Pronin wrote:
> > Change-Id: I7d71cd379b1a3b7659d20a1b6008216762596590
> > Signed-off-by: Andrey Pronin
>
> Please remove the internal commit ID next time.
On Mon, Jul 18, 2016 at 10:11:41PM +0300, Jarkko Sakkinen wrote:
> On Thu, Jul 14, 2016 at 06:51:36PM -0700, Andrey Pronin wrote:
> > Add attr_group to phy_ops that a driver relying on tpm_tis_core_init
> > can set to have its specific attributes registered in sysfs.
> >
>
On Thu, Jul 21, 2016 at 04:03:12PM -0500, Rob Herring wrote:
> On Wed, Jul 20, 2016 at 12:49:12PM -0700, Andrey Pronin wrote:
> > On Wed, Jul 20, 2016 at 02:03:03PM -0500, Rob Herring wrote:
> > > On Tue, Jul 19, 2016 at 08:41:24PM -0700, Andrey Pronin wrote:
> >
>
On Wed, Jul 20, 2016 at 01:54:22PM -0600, Jason Gunthorpe wrote:
> On Wed, Jul 20, 2016 at 12:49:12PM -0700, Andrey Pronin wrote:
>
> > Sorry, I just updated this patch description in v2 to indicate why they are
> > not
> > hard-coded, but didn't answer explicitly.
Hi Peter,
> > This patchset adds support for H1 Secure Microcontroller running
> > Cr50 firmware. It implements several functions, including TPM-like
> > functionality, and communicates over SPI using the FIFO protocol
> > described in the PTP Spec, section 6.
> > H1 is a proprietary chip that
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