On Fri, Mar 16, 2018 at 04:54:31PM +0800, Anson Huang wrote:
> Add support for imx7d-sdb board's gpio keys:
>
> S1(FUNC1): KEY_VOLUMEUP
> S3(FUNC2): KEY_VOLUMEDOWN
>
> Signed-off-by: Anson Huang
Applied, thanks.
On Sat, Mar 17, 2018 at 03:36:55PM +0800, Anson Huang wrote:
> Add i.MX7S/D anatop vdd1p2 regulator.
>
> Signed-off-by: Anson Huang
Applied, thanks.
On Tue, Mar 20, 2018 at 01:11:14AM +0530, Jagan Teki wrote:
> + {
> + clock-frequency = <10>;
> + pinctrl-names = "default";
> + pinctrl-0 = <_i2c4>;
> + status = "okay";
> +
> + pmic: pfuze100@8 {
pfuze100: pmic@8
I fixed it up and applied both patches.
Shawn
> +
On Mon, Mar 19, 2018 at 04:14:13PM -0400, Matt Porter wrote:
> The HB onboard audio currently makes use of the imx-audio-sgtl5000
> binding. This binding does not support auxiliary audio devices such
> as external amplifiers. The simple-audio-card binding does support
> this property which allows
On Tue, Mar 20, 2018 at 10:08:40AM +0800, Anson Huang wrote:
> From: Shengjiu Wang
>
> Update SAI select input daisy chain value according to
> Reference Manual.
>
> Signed-off-by: Shengjiu Wang
> Signed-off-by: Anson Huang
On Wed, Mar 21, 2018 at 06:22:48PM +0800, Robin Gong wrote:
> DIN pin of SPI-NOR muxed with I2C3_SDA which connected to one gpio expand
> chip, thus have to disable all those module which compacted by those gpios
> if enable SPI-NOR support on Sabreauto board.
>
> Signed-off-by: Robin Gong
On Wed, Apr 18, 2018 at 08:17:35PM -0700, Stephen Boyd wrote:
> Quoting Shawn Guo (2018-04-17 07:22:05)
> > On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > > On i.MX6SX SabreAuto board, there is external 24MHz clock
> > > source for analog clock2, add
On Thu, Apr 19, 2018 at 10:02:37PM +0800, Shawn Guo wrote:
> On Wed, Apr 18, 2018 at 08:17:35PM -0700, Stephen Boyd wrote:
> > Quoting Shawn Guo (2018-04-17 07:22:05)
> > > On Mon, Mar 19, 2018 at 10:30:45AM +0800, Anson Huang wrote:
> > > > On i.MX6SX SabreAuto
On Thu, Apr 19, 2018 at 03:23:39AM +, Anson Huang wrote:
> If so, I think we should use V1 patch to keep clocks container?
Ah, right. I will just pick up v1 of patch #2.
Shawn
On Mon, Mar 19, 2018 at 10:30:44AM +0800, Anson Huang wrote:
> i.MX6SX has lvds2 (analog clock2), an I/O clock like lvds1.
> And this lvds2, along with lvds1, can be used to provide
> external clock source to the internal pll, such as pll4_audio
> and pll5_video.
>
> This patch mainly adds the
On Fri, Apr 20, 2018 at 02:50:52PM +0200, jan.tu...@emtrion.com wrote:
> From: Jan Tuerk
>
> This patch adds support for the emtrion GmbH emCON-MX6 modules.
> They are available with imx.6 Solo, Dual-Lite, Dual and Quad
> equipped with Memory from 512MB to 2GB (configured
On Thu, Apr 19, 2018 at 04:32:40PM +0200, Lukasz Majewski wrote:
> This commit adds device tree description of Kieback & Peter GmbH
> iMX6Q TPC board.
>
> Signed-off-by: Lukasz Majewski
> Reviewed-by: Fabio Estevam
Applied, thanks.
On Wed, Apr 11, 2018 at 05:03:29PM +0300, Abel Vesa wrote:
> From: Shawn Guo <shawn...@kernel.org>
>
> Add flag CLK_SET_RATE_GATE for i.MX gate and divider clocks on which the
> client drivers usually make clk_set_rate() call, so that the call will fail
> when cloc
On Mon, Mar 26, 2018 at 01:35:53PM +0530, Jagan Teki wrote:
> Switch to use koe_tx31d200vm0baa LVDS timings from
> panel-simple instead hard coding the same in dts.
>
> Signed-off-by: Jagan Teki
Applied both, thanks.
Hi Eduardo,
On Wed, Mar 14, 2018 at 05:51:42PM -0700, Eduardo Valentin wrote:
> On Tue, Mar 13, 2018 at 02:51:05PM +0800, Zhang Rui wrote:
> > yeah, will review it and get back to you later.
>
> This is in my tree now.
It seems that the patch did not make its way to 4.17-rc1?
Shawn
On Wed, Apr 04, 2018 at 03:16:23PM +0200, Bartosz Golaszewski wrote:
> We want to work towards phasing out the at24_platform_data structure.
> There are few users and its contents can be represented using generic
> device properties. Using device properties only will allow us to
> significantly
On Tue, Apr 10, 2018 at 10:32:09PM +0200, Lukasz Majewski wrote:
> This commit adds device tree description of Kieback & Peter GmbH
> iMX6Q TPC board.
>
> Signed-off-by: Lukasz Majewski
> Reviewed-by: Fabio Estevam
>
> ---
> Changes for v5:
> - Use
On Tue, Mar 27, 2018 at 09:10:26AM +1100, Stephen Rothwell wrote:
> Hi Shawn,
>
> Today's linux-next merge of the imx-mxs tree got a conflict in:
>
> arch/arm/configs/mxs_defconfig
>
> between commit:
>
> e3e583e7a293 ("ARM: mxs_defconfig: Re-sync defconfig")
>
> from the arm-soc tree and
On Sun, Mar 18, 2018 at 09:34:36PM +0100, Stefan Agner wrote:
> Enable on-chip OTP NVMEM support for NXP i.MX and VF610 SoCs.
> Since OTP values might be required by drivers required during
> boot, make sure the driver is built-in (e.g. i.MX thermal
> driver).
>
> Signed-off-by: Stefan Agner
later
> on.
>
> Fixes: 179a502f8c46 ("rtc: snvs: add Freescale rtc-snvs driver")
>
> Signed-off-by: Bryan O'Donoghue <pure.lo...@nexus-software.ie>
> Cc: a.zu...@towertech.it
> Cc: alexandre.bell...@free-electrons.com
> Cc: Pan Bian <bianpan2...@163.com
com>
Signed-off-by: Shawn Guo <shawn@linaro.org>
---
drivers/phy/hisilicon/Kconfig | 10 ++
drivers/phy/hisilicon/Makefile | 1 +
drivers/phy/hisilicon/phy-hisi-inno-usb2.c | 197 +
3 files changed, 208 insertions(+)
create mode 100644 d
From: Pengcheng Li <lpc...@hisilicon.com>
It adds device tree bindings document for HiSilicon INNO USB2 PHY.
Signed-off-by: Pengcheng Li <lpc...@hisilicon.com>
Signed-off-by: Jiancheng Xue <xuejianch...@hisilicon.com>
Signed-off-by: Shawn Guo <shawn@linaro.org>
---
It adds device tree bindings and driver support for HiSilicon INNO USB2
PHY device, which can be found on HiSilicon STB SoC Hi3798CV200.
Changes for v4:
- Change device tree bindings to define each PHY port as a child node,
and therefore instead of adding a custom .of_xlate, we can use
On Mon, Feb 26, 2018 at 02:47:41PM +0100, Sebastian Reichel wrote:
> Hi Shawn,
>
> On Sat, Feb 24, 2018 at 03:45:44PM +0800, Shawn Guo wrote:
> > On Mon, Feb 12, 2018 at 01:39:44PM +0100, Sebastian Reichel wrote:
> > > On i.MX53 it is necessary to set the DBG_EN bit i
On Fri, Mar 02, 2018 at 01:35:43PM +0530, Kishon Vijay Abraham I wrote:
> >>> diff --git a/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> >>> b/Documentation/devicetree/bindings/phy/phy-hisi-inno-usb2.txt
> >>> new file mode 100644
> >>> index ..b563cf54ca7b
> >>> ---
Hi Kishon,
On Fri, Mar 02, 2018 at 11:55:57AM +0530, Kishon Vijay Abraham I wrote:
> On Thursday 01 March 2018 12:52 PM, Shawn Guo wrote:
> > From: Pengcheng Li <lpc...@hisilicon.com>
> >
> > It adds device tree bindings document for HiSilicon INNO USB2 PHY.
> >
; corresponding DT node for RDU2.
>
> Cc: Rob Herring <robh...@kernel.org>
> Cc: Mark Rutland <mark.rutl...@arm.com>
> Cc: Shawn Guo <shawn...@kernel.org>
> Cc: Fabio Estevam <fabio.este...@nxp.com>
> Cc: Guenter Roeck <li...@roeck-us.net>
> Cc: Chris
On Tue, Feb 27, 2018 at 10:29:15PM +0100, Martin Kaiser wrote:
> imx25 contains two registers (LPIMR0 and 1) to define which interrupts
> are enabled in low-power mode. As of today, those two registers are
> configured to enable all interrupts. Before going to low-power mode, the
> AVIC's
On Thu, Feb 22, 2018 at 02:22:50PM +, Rui Miguel Silva wrote:
> Add CAAM device node to the i.MX7s device tree.
>
> Cc: Shawn Guo <shawn...@kernel.org>
> Cc: Sascha Hauer <ker...@pengutronix.de>
> Cc: devicet...@vger.kernel.org
> Cc: "Horia Geantă" &l
On Mon, Jun 18, 2018 at 05:42:57PM +0200, Emmanuel Vadot wrote:
> The RIoTboard debug uart is connected to serial1.
> Add a chosen property in the DTS so OS knows what serial port to use for
> the console.
>
> Signed-off-by: Emmanuel Vadot
Applied, thanks.
On Wed, Jun 20, 2018 at 04:38:37PM +0800, Anson Huang wrote:
> i.MX6SLL uses same SRC module as i.MX51, add "fsl,imx51-src"
> compatible string to enable SRC driver to support setting
> CPU resume address for cpu-idle and suspend/resume.
>
> Signed-off-by: Anson Huang
Applied, thanks.
On Tue, Oct 02, 2018 at 07:18:21PM +, Leonard Crestez wrote:
> Explicit clock enabling is required on 6sll and 6ull so mention that
> standard clock bindings are used.
>
> Signed-off-by: Leonard Crestez
> ---
> Documentation/devicetree/bindings/crypto/fsl-dcp.txt | 2 ++
> 1 file changed, 2
On Sun, Oct 07, 2018 at 09:24:17PM +0800, Dong Aisheng wrote:
> Due to newly added IMX SCU firmware support, let's add
> drivers/firmware/imx into maintainership.
>
> Cc: Shawn Guo
> Cc: Arnd Bergmann
> Cc: linux-kernel@vger.kernel.org
> Signed-off-by: Dong Aisheng
>
On Fri, Sep 28, 2018 at 12:26:55AM +0200, Lukasz Majewski wrote:
> Add Device Tree binding document for Liebherr's BK4 external SPI bus.
>
> Signed-off-by: Lukasz Majewski
There should really be a patch series consisting of this one and spidev
change [1].
Since spidev has already been picked
On Tue, Oct 09, 2018 at 12:50:28PM +0200, Lukasz Majewski wrote:
> This commit adds DTS support for BK4 device from Liebherr. It
> uses vf610 SoC from NXP.
>
> Signed-off-by: Lukasz Majewski
As v3 just incorporates a few minor improvements over v2, Stefan's
review tag should really be carried.
ned-off-by: Julia Lawall
Acked-by: Shawn Guo
On Thu, Oct 18, 2018 at 09:45:04AM +0200, Frieder Schrempf wrote:
> Some SOCs in the i.MX6 family have a USB host controller that is
> only capable of the HSIC interface and has no on-board PHY.
>
> To be able to use these controllers, we need to add "usb-nop-xceiv"
> dummy PHYs.
>
>
On Sat, Oct 20, 2018 at 02:35:36AM +, Joakim Zhang wrote:
> From: Dong Aisheng
>
> CAN transceiver is different on RevA and RevB board.
> It's active high on RevA while active low on Rev B.
>
> Signed-off-by: Dong Aisheng
> Signed-off-by: Joakim Zhang
> ---
>
On Mon, Oct 22, 2018 at 11:27:23AM +0200, Alex Gonzalez wrote:
> The wireless variants of the ConnecCore 6UL SOM include a Qualcomm
> QCA6564 wireless chip with dual WiFi and Bluetooth.
>
> Both the ConnectCore 6UL SBC Express and Pro boards fit a wireless SOM.
>
> The Wifi is connected through
On Tue, Oct 23, 2018 at 05:30:44AM +, Joakim Zhang wrote:
> From: Dong Aisheng
>
> Add stop-mode property which is required by stop mode wakeup
> feature.
>
> Signed-off-by: Dong Aisheng
> Signed-off-by: Joakim Zhang
> ---
> arch/arm/boot/dts/imx6sx.dtsi | 2 ++
> 1 file changed, 2
On Wed, Oct 24, 2018 at 10:25:12AM +, Joakim Zhang wrote:
> Remove reg property from fixed regulator as upstream has no longer
> needed this property.
Prefix 'ARM: dts: imx6qdl-sabreauto: ...' should be more accurate. And
the 'reg' property was there only because we have a fake bus container
On Tue, Oct 30, 2018 at 08:42:47AM +, Joakim Zhang wrote:
> From: Dong Aisheng
>
> The flexcan1 is pin conflict with fec. So we add a new dts file with
> flexcan1 enabled with fec disabled for user to use.
>
> Signed-off-by: Dong Aisheng
> Signed-off-by: Joakim Zhang
We do not want to
On Thu, Nov 01, 2018 at 06:32:47PM +0100, Martin Kaiser wrote:
> The i.MX25 contains two EPIT (Enhanced Periodic Interrupt Timer)
> function blocks. Add their ipg and per clocks to the device tree.
>
> Signed-off-by: Martin Kaiser
Are these EPIT devices actually used in upstream kernel, or just
From: Sriharsha Allenki
It adds bindings for Synopsys 28nm femto phy controller that supports
LS/FS/HS usb connectivity on Qualcomm chipsets.
Signed-off-by: Sriharsha Allenki
Signed-off-by: Anu Ramanathan
Signed-off-by: Bjorn Andersson
Signed-off-by: Shawn Guo
---
.../phy/qcom,snps-28nm
It adds Synopsys 28nm Femto High-Speed USB PHY driver support, which
is usually paired with Synopsys DWC3 USB controllers on Qualcomm SoCs.
Signed-off-by: Shawn Guo
---
drivers/phy/qualcomm/Kconfig | 10 +
drivers/phy/qualcomm/Makefile | 1 +
.../phy/qualcomm
It's based on a downstream driver from Sriharsha Allenki
that uses USB phy framework, and gets rewrote to adpot generic phy
framework together with quite some cleanups.
Shawn Guo (1):
phy: qualcomm: Add Synopsys High-Speed USB PHY driver
Sriharsha Allenki (1):
dt-bindings: phy: Add
Hi Rob,
On Mon, Nov 12, 2018 at 01:24:51PM -0600, Rob Herring wrote:
> On Thu, Nov 08, 2018 at 03:04:48PM +0800, Shawn Guo wrote:
> > From: Sriharsha Allenki
> >
> > It adds bindings for Synopsys 28nm femto phy controller that supports
> > LS/FS/HS usb connec
Hi Sriharsha,
On Tue, Nov 13, 2018 at 11:42 AM Shawn Guo wrote:
> > > +- qcom,init-seq:
> > > +Value type:
> > > +Definition: Should contain a sequence of tuples
> > > to
> > > +program 'value' into phy register at 'offset
function
qcom_snps_hsphy_config_regulators() fails in the middle.
- Add a comment for init-seq tuple which consists of 3 numbers.
- Sort include headers alphabetically.
- Sort register definitions in order of offset.
Shawn Guo (1):
phy: qualcomm: Add Synopsys High-Speed USB PHY driver
Sriharsha
It adds Synopsys 28nm Femto High-Speed USB PHY driver support, which
is usually paired with Synopsys DWC3 USB controllers on Qualcomm SoCs.
Signed-off-by: Shawn Guo
---
drivers/phy/qualcomm/Kconfig | 10 +
drivers/phy/qualcomm/Makefile | 1 +
.../phy/qualcomm
From: Sriharsha Allenki
It adds bindings for Synopsys 28nm femto phy controller that supports
LS/FS/HS usb connectivity on Qualcomm chipsets.
Signed-off-by: Sriharsha Allenki
Signed-off-by: Anu Ramanathan
Signed-off-by: Bjorn Andersson
Signed-off-by: Shawn Guo
---
.../phy/qcom,snps-28nm
On Mon, Nov 05, 2018 at 10:12:30AM +0100, Martin Kaiser wrote:
> Hi,
>
> Thus wrote Shawn Guo (shawn...@kernel.org):
>
> > On Thu, Nov 01, 2018 at 06:32:47PM +0100, Martin Kaiser wrote:
> > > The i.MX25 contains two EPIT (Enhanced Periodic Interrupt Timer)
> >
On Sat, Nov 10, 2018 at 04:05:44PM +, A.s. Dong wrote:
> Hi Stephen,
>
> [...]
> > > I already sent the 12th version of this current patch series and I
> > > would really like to get this in ASAP so that the booting up of imx8mq
> > > will
> > not be delayed.
> > >
> >
> > Ok. Well we're in
On Mon, Nov 05, 2018 at 11:43:42AM +0100, Alex Gonzalez wrote:
> The wireless variants of the ConnecCore 6UL SOM include a Qualcomm
> QCA6564 wireless chip with dual WiFi and Bluetooth.
>
> Both the ConnectCore 6UL SBC Express and Pro boards fit a wireless SOM.
>
> The Wifi is connected through
On Mon, Nov 05, 2018 at 02:58:02PM +0100, Clément Péron wrote:
> From: Colin Didier
>
> The MX6 Audmux differs from MX51.
>
> This patch adds the audmux for i.MX6 family.
>
> Signed-off-by: Colin Didier
> Signed-off-by: Clément Péron
I think you should send it to ASoC maintainer and list
On Mon, Nov 05, 2018 at 11:48:04AM +0100, Alex Gonzalez wrote:
> This patch corrects indentation problems in the gpmigrp and i2c1grp nodes.
>
> Signed-off-by: Alex Gonzalez
Applied, thanks.
On Tue, Nov 06, 2018 at 09:19:36AM +, Anson Huang wrote:
> The "fsl,mf-mix-wakeup-irq" is ONLY used as a temporary
> solution in NXP's internal tree for Mega/Fast Mix off
> feature after suspend, upstream kernel does NOT need it,
> remove it.
>
> Signed-off-by: Anson Huang
Applied both,
On Fri, Nov 16, 2018 at 11:25:07AM +0100, Clément Péron wrote:
> Hi Shawn,
>
> On Fri, 16 Nov 2018 at 03:59, Shawn Guo wrote:
> >
> > On Mon, Nov 05, 2018 at 02:58:02PM +0100, Clément Péron wrote:
> > > From: Colin Didier
> > >
> > > The MX6 Audmu
On Thu, Nov 01, 2018 at 06:32:47PM +0100, Martin Kaiser wrote:
> The i.MX25 contains two EPIT (Enhanced Periodic Interrupt Timer)
> function blocks. Add their ipg and per clocks to the device tree.
>
> Signed-off-by: Martin Kaiser
Applied, thanks.
On Fri, Nov 09, 2018 at 10:38:19AM +0530, Vinod Koul wrote:
> On 08-11-18, 15:04, Shawn Guo wrote:
> > From: Sriharsha Allenki
> >
> > It adds bindings for Synopsys 28nm femto phy controller that supports
> > LS/FS/HS usb connectivity on Qualcomm chipsets.
> &
On Fri, Nov 09, 2018 at 10:52:17AM +0530, Vinod Koul wrote:
> On 08-11-18, 15:04, Shawn Guo wrote:
> > +static int qcom_snps_hsphy_config_regulators(struct hsphy_priv *priv, int
> > high)
> > +{
> > + int min, ret, i;
> > +
> > + min = high ? 1 : 0; /* l
On Mon, Oct 08, 2018 at 03:28:01PM +, Leonard Crestez wrote:
> Bindings for "fixed-regulator" only explicitly support "gpio" property,
> not "gpios". Fix by correcting the property name.
>
> The enet PHYs on imx6sx-sdb needs to be explicitly reset after a power
> cycle, this can be handled by
On Fri, Aug 31, 2018 at 03:53:18PM +0800, Anson Huang wrote:
> i.MX6 SoCs has MMDC clock gates in CCM CCGR, add
> clock property for MMDC driver's clock operation.
>
> Signed-off-by: Anson Huang
Applied, thanks.
On Mon, Oct 08, 2018 at 11:45:36AM +, Vokáč Michal wrote:
> On 27.9.2018 11:24, Michal Vokáč wrote:
> > The reset signal of the SSD1306 OLED display is actually active-low.
> > Adapt the DT to reflect the real world.
> >
> > Signed-off-by: Michal Vokáč
> > ---
> > v2 changes: New patch in
On Mon, Oct 08, 2018 at 04:41:40PM +0530, Yogesh Gaur wrote:
> Add binding file for NXP FlexSPI controller
>
> Signed-off-by: Yogesh Gaur
> ---
> Changes for v4:
> - Incorporated Rob review comments.
> Changes for v3:
> - Removed node property 'big-endian'.
> Changes for v2:
> - Incorporated Rob
On Mon, Oct 08, 2018 at 03:28:01PM +, Leonard Crestez wrote:
> Bindings for "fixed-regulator" only explicitly support "gpio" property,
> not "gpios". Fix by correcting the property name.
>
> The enet PHYs on imx6sx-sdb needs to be explicitly reset after a power
> cycle, this can be handled by
PHY_PORT_NUM rather than > INNO_PHY_PORT_NUM.
>
> Detected by CoverityScan, CID#1466118 ("Out-of-bounds write")
>
> Fixes: ba8b0ee81fbb ("phy: add inno-usb2-phy driver for hi3798cv200 SoC")
> Signed-off-by: Colin Ian King
Acked-by: Shawn Guo
On Wed, Sep 19, 2018 at 02:04:45PM +0800, Anson Huang wrote:
> The i.MX 6ULZ processor is a high-performance, ultra
> cost-efficient consumer Linux processor featuring an
> advanced implementation of a single Arm® Cortex®-A7 core,
> which operates at speeds up to 900 MHz.
>
> This patch adds
On Fri, Sep 28, 2018 at 09:07:28AM +, Anson Huang wrote:
> Hi, Shawn
>
> Anson Huang
> Best Regards!
>
>
> > -Original Message-
> > From: Shawn Guo
> > Sent: Friday, September 28, 2018 4:45 PM
> > To: Anson Huang
> > Cc
On Sun, Sep 30, 2018 at 11:32:25AM +0800, Anson Huang wrote:
> This patch set adds i.MX6ULZ SoC support, i.MX6ULZ is a new SoC of
> i.MX6 family, compared to i.MX6ULL, it removes below modules:
>
> - UART5/UART6/UART7/UART8;
> - PWM5/PWM6/PWM7/PWM8;
> - eCSPI3/eCSPI4;
> -
On Fri, Sep 28, 2018 at 12:18:31AM +0200, Lukasz Majewski wrote:
> This commit adds DTS support for BK4 device from Liebherr. It
> uses vf610 SoC from NXP.
>
> Signed-off-by: Lukasz Majewski
> ---
> Changes for v2:
>
> - Rename enet_ext and audio_ext oscillator names
> - Move regulators from
On Wed, Aug 29, 2018 at 09:45:38AM +0800, Anson Huang wrote:
> This patch enables i.MX7D SDB board's below GPIO buttons
> as wakeup sources:
>
> S1(FUNC1): KEY_VOLUMEUP
> S3(FUNC2): KEY_VOLUMEDOWN
>
> Signed-off-by: Anson Huang
Applied, thanks.
On Fri, Aug 31, 2018 at 04:00:02PM +0530, Yogesh Gaur wrote:
> Add fspi node property for LX2160A SoC for FlexSPI driver.
> Property added for the FlexSPI controller and for the connected
> slave device for the LX2160ARDB target.
> This is having two SPI-NOR flash device, mt35xu512aba, connected
>
On Wed, Aug 29, 2018 at 03:02:58PM -0500, Rob Herring wrote:
> Checking the child node names is pointless as the DT node name can
> never be NULL, so remove it.
>
> Cc: Shawn Guo
> Signed-off-by: Rob Herring
Applied, thanks.
On Mon, Sep 03, 2018 at 09:45:41AM +0800, Anson Huang wrote:
> Enable cpuidle for i.MX7S/D using generic ARM cpuidle
> driver, below 2 idle states enabled:
>
> 1. ARM WFI;
> 2. SoC WAIT mode.
>
> Signed-off-by: Anson Huang
Applied, thanks.
On Tue, Aug 28, 2018 at 10:45:44PM +0200, Alexandre Belloni wrote:
> Microsys designs a SoM based on the LS1046A named miriac MPX-LS1046A
> https://microsys.de/products/system-on-modules/qoriqr-armr-architecture/miriactm-mpx-ls1046a/
>
> It also provides an SBC accepting this SoM, the miriac
On Tue, Aug 28, 2018 at 04:36:45PM +0800, Anson Huang wrote:
> gpcv2 driver is NOT just used on i.MX7D which has Cortex-A7
> cores, but also on i.MX8MQ/i.MX8MM platforms which use Cortex-A53
> cores, so let's use A_CORE instread of A7 to avoid confusion.
>
> Signed-off-by: Anson Huang
>
On Wed, Aug 29, 2018 at 01:00:47PM +0800, Anson Huang wrote:
> Some i.MX platforms like i.MX7S/D uses generic ARM cpuidle
> driver and psci method to support cpuidle feature, select
> CONFIG_ARM_CPUIDLE by default for such platforms.
>
> Signed-off-by: Anson Huang
Applied, thanks.
On Thu, Aug 30, 2018 at 11:00:38AM +0200, Kurt Kanzenbach wrote:
> The NXP LS208xA SoCs have two dual uarts. Thus, add the second one.
>
> Signed-off-by: Kurt Kanzenbach
Applied, thanks.
On Wed, Aug 29, 2018 at 11:30:55AM +0800, Yinbo Zhu wrote:
> From: Rajesh Bhagat
>
> Add "configure-gfladj" boolean property to USB3 node. This property
I do not see where this property is documented as bindings and how
driver is using it.
Shawn
> is used to determine whether frame length
On Wed, Aug 29, 2018 at 03:02:58PM -0500, Rob Herring wrote:
> Checking the child node names is pointless as the DT node name can
> never be NULL, so remove it.
>
> Cc: Shawn Guo
> Signed-off-by: Rob Herring
Applied, thanks.
On Tue, Aug 28, 2018 at 07:06:37PM +0200, Pierre-Jean Texier wrote:
> Adopt the SPDX license identifier headers to ease
> license compliance management.
>
> Signed-off-by: Pierre-Jean Texier
Applied, thanks.
On Thu, Aug 30, 2018 at 02:59:39PM +0800, Anson Huang wrote:
> This patch enables i.MX6SX SDB board's below GPIO buttons
> as wakeup sources:
>
> SW4(FUNC1): KEY_VOLUMEUP
> SW5(FUNC2): KEY_VOLUMEDOWN
>
> Signed-off-by: Anson Huang
Applied, thanks.
Add Sébastien for a cross check.
Shawn
On Thu, Aug 30, 2018 at 01:20:05PM +0800, Anson Huang wrote:
> Update i.MX6ULL iomux header according to latest reference
> manual Rev.1, 11/2017.
>
> Signed-off-by: Anson Huang
> ---
> arch/arm/boot/dts/imx6ull-pinfunc.h | 21 +++--
> 1
On Fri, Aug 31, 2018 at 02:17:31PM -0500, Andrew F. Davis wrote:
> The correct DT property for specifying a GPIO used for reset
> is "reset-gpios", fix this here.
>
> Fixes: d763762e3b58 ("ARM: dts: imx6: add ZII RDU2 boards")
This Fixes tag and word 'Fix' in subject is inappropriate to me, as
On Wed, Aug 29, 2018 at 01:00:46PM +0800, Anson Huang wrote:
> Enable cpuidle for i.MX7S/D using generic ARM cpuidle
> driver, below 2 idle states enabled:
>
> 1. ARM WFI;
> 2. SoC WAIT mode.
>
> Signed-off-by: Anson Huang
> ---
> arch/arm/boot/dts/imx7d.dtsi | 1 +
>
It looks good to me. @Leo, are you okay with it?
Shawn
On Thu, Aug 30, 2018 at 11:00:38AM +0200, Kurt Kanzenbach wrote:
> The NXP LS208xA SoCs have two dual uarts. Thus, add the second one.
>
> Signed-off-by: Kurt Kanzenbach
> ---
> arch/arm64/boot/dts/freescale/fsl-ls208xa.dtsi | 16
On Tue, Aug 14, 2018 at 07:50:19PM +0300, Leonard Crestez wrote:
> This is required for the imx pci driver to send the PME_Turn_Off TLP.
>
> Signed-off-by: Leonard Crestez
Acked-by: Shawn Guo
> ---
> arch/arm/boot/dts/imx7d.dtsi | 5 +++--
> 1 file changed, 3 insertio
On Wed, Sep 12, 2018 at 02:53:48PM +0100, Suzuki K Poulose wrote:
> Switch to the updated coresight bindings.
>
> Cc: Shawn Guo
> Cc: Sascha Hauer
> Cc: Pengutronix Kernel Team
> Cc: Fabio Estevam
> Cc: Mathieu Poirier
> Signed-off-by: Suzuki K Poulose
Applied, thanks.
On Fri, Sep 14, 2018 at 10:59:21AM +0800, Anson Huang wrote:
> On i.MX6UL, accessing OCOTP directly is wrong because the ocotp clock
> needs to be enabled first, so use the nvmem-cells binding instead.
>
> Signed-off-by: Anson Huang
Applied this one, thanks.
On Mon, Sep 17, 2018 at 11:17:43AM +0800, Anson Huang wrote:
> On i.MX6UL, accessing OCOTP directly is wrong because the ocotp clock
> needs to be enabled first, so use the nvmem-cells binding instead.
>
> Signed-off-by: Anson Huang
> ---
> no change since V1.
Okay, I just applied v1 of this
On Wed, Sep 12, 2018 at 04:13:29PM +0800, Anson Huang wrote:
> Update VDD_SOC voltage to 1.25V for 900MHz operating point
> according to datasheet Rev. 1.3, 08/2018, 25mV is added to
> the minimum allowed values to cover power supply ripple.
>
> Signed-off-by: Anson Huang
Applied, thanks.
rt include headers alphabetically.
- Sort register definitions in order of offset.
Shawn Guo (1):
phy: qualcomm: Add Synopsys High-Speed USB PHY driver
Sriharsha Allenki (1):
dt-bindings: phy: Add Qualcomm Synopsys High-Speed USB PHY binding
.../phy/qcom,snps-28nm-usb-hs-phy.txt
From: Sriharsha Allenki
It adds bindings for Synopsys 28nm femto phy controller that supports
LS/FS/HS usb connectivity on Qualcomm chipsets.
Signed-off-by: Sriharsha Allenki
Signed-off-by: Anu Ramanathan
Signed-off-by: Bjorn Andersson
Signed-off-by: Shawn Guo
---
.../phy/qcom,snps-28nm
It adds Synopsys 28nm Femto High-Speed USB PHY driver support, which
is usually paired with Synopsys DWC3 USB controllers on Qualcomm SoCs.
Signed-off-by: Shawn Guo
---
drivers/phy/qualcomm/Kconfig | 10 +
drivers/phy/qualcomm/Makefile | 1 +
.../phy/qualcomm
On Mon, Jun 10, 2019 at 04:17:51PM +0800, yibin.g...@nxp.com wrote:
> From: Robin Gong
>
> Correct sdma compatible since ecspi errata ERR009165 has been fixed
> on i.mx6sll as i.mx6ul.
>
> Signed-off-by: Robin Gong
Applied, thanks.
On Mon, Jun 10, 2019 at 04:17:50PM +0800, yibin.g...@nxp.com wrote:
> From: Robin Gong
>
> Add dma support on ecspi.
>
> Signed-off-by: Robin Gong
Applied, thanks.
On Mon, Jun 10, 2019 at 04:17:52PM +0800, yibin.g...@nxp.com wrote:
> From: Robin Gong
>
> Enable SDMA support on i.mx8mq/8mm chips, including enabling
> CONFIG_FW_LOADER_USER_HELPER/CONFIG_FW_LOADER_USER_HELPER_FALLBACK
> for firmware loaded by udev.
>
> Signed-off-by: Robin Gong
Applied,
On Tue, Jun 11, 2019 at 08:25:35PM +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> Enable CONFIG_PINCTRL_IMX8MN by default to support i.MX8MN
> pinctrl driver.
>
> Signed-off-by: Anson Huang
> Reviewed-by: Dong Aisheng
Applied, thanks.
On Mon, Jun 24, 2019 at 07:40:12PM +0200, Oliver Graute wrote:
> This patch adds support for the i.MX6UL variant of the Variscite DART-6UL
> SoM Carrier-Board
>
> Signed-off-by: Oliver Graute
> ---
> .../boot/dts/imx6ul-imx6ull-var-dart-common.dtsi | 458
> +
> 1 file
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