On Mon, May 22, 2017 at 4:11 PM, Geert Uytterhoeven
wrote:
> Add an example SPI slave handler to allow remote control of system
> reboot, power off, halt, and suspend.
>
FWIW:
Reviewed-by: Andy Shevchenko
> Signed-off-by: Geert Uytterhoeven
From: Kieran Bingham
Provide a helper to obtain the parent device fwnode without first
parsing the remote-endpoint as per fwnode_graph_get_remote_port_parent.
Signed-off-by: Kieran Bingham
---
v2:
- Rebase on
From: Kieran Bingham
Devices supporting multiple endpoints on a single device node must set
their subdevice fwnode to the endpoint to allow distinct comparisons.
Adapt the match_fwnode call to compare against the provided fwnodes
first, but also to
Reviewing my own post:
On 19/05/17 17:16, Kieran Bingham wrote:
> From: Kieran Bingham
>
> Devices supporting multiple endpoints on a single device node must set
> their subdevice fwnode to the endpoint to allow distinct comparisons.
>
> Adapt the
Hi Laurent,
On 18/05/17 15:01, Laurent Pinchart wrote:
> Hi Kieran,
>
> Thank you for the patch.
>
> On Wednesday 17 May 2017 16:03:39 Kieran Bingham wrote:
>> From: Kieran Bingham
>>
>> Devices supporting multiple endpoints on a single device node must
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken
From: Laurent Pinchart
The DU1 and DU2 external dot clocks are fixed frequency clock generators
running at 33MHz, while the DU0 and DU3 external dot clocks are
generated by an I2C-controlled programmable clock generator.
All those clock generators are
From: Kuninori Morimoto
Signed-off-by: Kuninori Morimoto
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 54
1 file changed, 54
From: Takeshi Kihara
This patch adds PWM{0,1,2,3,4,5,6} device nodes for R8A7796 SoC.
Signed-off-by: Takeshi Kihara
[uli: added resets, shortened reg lengths to 8]
Signed-off-by: Ulrich Hecht
From: Laurent Pinchart
The Salvator-X board has two HDMI output connectors. Add them to the
common salvator-x.dtsi.
Signed-off-by: Laurent Pinchart
Reviewed-by: Geert Uytterhoeven
From: Kuninori Morimoto
Signed-off-by: Kuninori Morimoto
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 64 +++-
1 file changed, 62
From: Koji Matsuoka
Enable the HDMI encoders for the H3 Salvator-X board. The number of
encoders varies between the H3 and M3-W SoCs, so they can't be enabled
in the common salvator-x.dtsi file.
Signed-off-by: Koji Matsuoka
From: Jacopo Mondi
Add device nodes for two Maxim max961x current sense amplifiers
sensing VDD_08 and DVFS_08 lines.
Signed-off-by: Jacopo Mondi
[geert: r8a7796-salvator-x.dts => salvator-x.dtsi]
Signed-off-by: Geert Uytterhoeven
From: Laurent Pinchart
The DU1 and DU2 external dot clocks are provided by the fixed frequency
clock generators X21 and X22, while the DU0 and DU3 clocks are provided
by the programmable Versaclock5 clock generator.
Signed-off-by: Laurent Pinchart
The EthernetAVB should not depend on the bootloader to setup correct
drive-strength values. Values for drive-strength where found by
examining the registers after the bootloader has configured the
registers and successfully used the EthernetAVB.
Based on:
* commit 7d73a4da2681 ("arm64: dts:
From: Laurent Pinchart
The panel backlight is controlled through a GPIO and a PWM channel.
Signed-off-by: Laurent Pinchart
[simon: apply to salvator-x.dtsi instead of r8a7795-salvator-x.dts]
Signed-off-by:
From: Kuninori Morimoto
Signed-off-by: Kuninori Morimoto
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 13 +
1 file changed, 13 insertions(+)
diff --git
From: Geert Uytterhoeven
The Renesas Salvator-X development board can be equipped with either an
R-Car H3 or M3-W SiP, which are pin-compatible. Both boards use
different DTBs.
Reduce duplication by extracting common Salvator-X board support into
its own .dtsi file.
From: Geert Uytterhoeven
Split off support for Salvator-X boards with the ES1.x revision of the
R-Car H3 SoC into a separate file. The main r8a7795-salvator-x.dts file
now corresponds to Salvator-X with R-Car H3 ES2.0 or later.
Signed-off-by: Geert Uytterhoeven
From: Kuninori Morimoto
Signed-off-by: Kuninori Morimoto
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git
From: Kuninori Morimoto
Signed-off-by: Kuninori Morimoto
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff
Set PHY rxc-skew-ps to 1500 and all other values to their default values.
This is intended to to address failures in the case of 1Gbps communication
using the salvator-x board with the KSZ9031RNX phy. This has been
reported to occur with both the r8a7795 (H3) and r8a7796 (M3-W) SoCs.
Based in a
From: Vladimir Barinov
This supports HS200 mode for eMMC on H3ULCB board
Signed-off-by: Vladimir Barinov
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
From: Kuninori Morimoto
Signed-off-by: Kuninori Morimoto
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796.dtsi | 68
1 file changed, 68
From: Geert Uytterhoeven
The Renesas ULCB development board can be equipped with either an R-Car
H3 or M3-W SiP, which are pin-compatible. Both boards use different
DTBs.
Reduce duplication by extracting common ULCB board support into its own
.dtsi file. References to
The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.
My
From: Takeshi Kihara
This patch addes memory region:
- After changes, the Salvator-X board has the following map:
Bank0: 1GiB RAM : 0x4800 -> 0x0007fff
Bank1: 1GiB RAM : 0x0005 -> 0x0053fff
Bank2: 1GiB RAM : 0x0006 ->
From: Vladimir Barinov
This patch updates memory region:
- After changes, the new map of the m3ulcb board on R8A7796 SoC
Bank0: 1GiB RAM : 0x4800 -> 0x0007fff
Bank1: 1GiB RAM : 0x0006 -> 0x0063fff
- Before
From: Geert Uytterhoeven
Cfr. commit b2407c566ba29215 ("arm64: dts: r8a7795: enable nfs root on
Salvator-X board").
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
From: Wolfram Sang
Signed-off-by: Wolfram Sang
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Geert Uytterhoeven
Add the external PCIe bus clock as a zero Hz fixed-frequency clock.
Boards that provide this clock should override it.
Based on r8a7795.dtsi.
Signed-off-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
From: Wolfram Sang
Signed-off-by: Wolfram Sang
Signed-off-by: Simon Horman
---
arch/arm64/boot/dts/renesas/r8a7796-salvator-x.dts | 1 +
1 file changed, 1 insertion(+)
diff --git
From: Geert Uytterhoeven
Add the external audio clocks as zero Hz fixed-frequency clocks.
Boards that provide these clocks should override them.
Based on commit 623197b90c7aa97c ("arm64: renesas: r8a7795: Sound SSI
PIO support").
Signed-off-by: Geert Uytterhoeven
From: Vladimir Barinov
This supports Ethernet AVB on M3ULCB board
Signed-off-by: Vladimir Barinov
Tested-by: Sjoerd Simons
Reviewed-by: Geert Uytterhoeven
From: Vladimir Barinov
This supports I2C2 bus on M3ULCB board
Signed-off-by: Vladimir Barinov
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM64 based SoC DT updates for v4.13.
The following changes since commit 2ea659a9ef488125eb46da6eb571de5eae5c43f6:
Linux 4.12-rc1 (2017-05-13 13:19:49 -0700)
are available in the git repository at:
On 22/05/17 14:23, Laurent Pinchart wrote:
> Hello Geert and Kieran,
>
> On Monday 22 May 2017 15:00:27 Geert Uytterhoeven wrote:
>> On Mon, May 22, 2017 at 2:52 PM, Kieran Bingham wrote:
>>> My only distaste there is having to then add the [i-1] index to the
>>> sg_tables.
>>>
>>> I have just
From: Hisashi Nakamura
Add slave mode support to the MSIOF driver, in both PIO and DMA mode.
For now this only supports the transmission of messages with a size
that is known in advance.
Signed-off-by: Hisashi Nakamura
Add an example SPI slave handler responding with the uptime at the time
of reception of the last SPI message.
This can be used by an external microcontroller as a dead man's switch.
Signed-off-by: Geert Uytterhoeven
---
v5:
- Add usage documentation to file header,
Signed-off-by: Geert Uytterhoeven
Reviewed-by: Rob Herring
---
v5:
- No changes,
v4:
- Add Reviewed-by,
v3:
- In SPI slave mode, represent the (single) slave device again as a
child of the controller node, which is now optional, and must be
Hi Mark,
This patch series adds support for SPI slave controllers to the Linux
SPI subsystem, including:
- DT binding updates for SPI slave support,
- Core support for SPI slave controllers,
- SPI slave support for the Renesas MSIOF device driver (thanks to
Nakamura-san for the
Add an example SPI slave handler to allow remote control of system
reboot, power off, halt, and suspend.
Signed-off-by: Geert Uytterhoeven
---
v5:
- Add usage documentation to file header,
- Use network byte order for commands, to match the "-p" parameter of
Add support for registering SPI slave controllers using the existing SPI
master framework:
- SPI slave controllers must use spi_alloc_slave() instead of
spi_alloc_master(), and should provide an additional callback
"slave_abort" to abort an ongoing SPI transfer request,
- SPI slave
Signed-off-by: Geert Uytterhoeven
---
v3, v4, v5:
- No changes,
v2:
- New.
---
Documentation/spi/spi-summary | 27 ---
1 file changed, 20 insertions(+), 7 deletions(-)
diff --git a/Documentation/spi/spi-summary
On Mon, May 22, 2017 at 2:52 PM, Kieran Bingham
wrote:
> My only distaste there is having to then add the [i-1] index to the sg_tables.
>
> I have just experimented with:
>
> fail:
> for (; i-- != 0;) {
> struct sg_table *sgt =
Hi Laurent,
On 22/05/17 13:24, Laurent Pinchart wrote:
> Hi Kieran,
>
> On Monday 22 May 2017 13:16:11 Kieran Bingham wrote:
>> On 17/05/17 00:20, Laurent Pinchart wrote:
>>> For planes handled by a VSP instance, map the framebuffer memory through
>>> the VSP to ensure proper IOMMU handling.
>>>
From: Laurent Pinchart
The aa104xd12 and aa121td01 panels are LVDS panels, not DPI panels.
Use the correct DT bindings.
Signed-off-by: Laurent Pinchart
Reviewed-by: Geert Uytterhoeven
The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.
My
Define the upper limit otherwise the driver cannot utilize max speeds.
Signed-off-by: Simon Horman
Acked-by: Wolfram Sang
---
arch/arm/boot/dts/r8a7793.dtsi | 3 +++
1 file changed, 3 insertions(+)
diff --git
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC DT updates for v4.13.
This pull request is based on "Renesas ARM Based SoC DT Bindings Updates
for v4.13", dt-bindings-for-v4.13, which I have also sent a pull-request
for.
The following changes since commit
From: Marek Vasut
Add the GyroADC clock to the R8A7791 device tree.
Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.
My
The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.
My
The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.
My
The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.
My
Add the "1v8" pinctrl state and sd-uhs-sdr50 property to SDHI{0,1,2}.
And the sd-uhs-sdr104 property to SDHI0.
Signed-off-by: Simon Horman
Acked-by: Wolfram Sang
---
arch/arm/boot/dts/r8a7793-gose.dts | 34
From: Chris Brandt
This adds the USB0 and USB1 clocks to the device tree.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
From: Marek Vasut
Add node for the GyroADC block and it's associated clock.
Signed-off-by: Marek Vasut
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
From: Jacopo Mondi
Add dt-bindings for Renesas r7s72100 pin controller header file.
Signed-off-by: Jacopo Mondi
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.
My
The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.
My
The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.
My
The device trees for Renesas SoCs use either pfc or pin-controller as the
node name for the PFC device. This patch is intended to take a step towards
unifying the node name used as pin-controller which appears to be the more
generic of the two and thus more in keeping with the DT specs.
My
From: Chris Brandt
Add the bit locations that correspond to the USB clocks.
Signed-off-by: Chris Brandt
Reviewed-by: Geert Uytterhoeven
Signed-off-by: Simon Horman
---
Hi Olof, Hi Kevin, Hi Arnd,
Please consider these Renesas ARM based SoC DT bindings updates for v4.13.
The following changes since commit 2ea659a9ef488125eb46da6eb571de5eae5c43f6:
Linux 4.12-rc1 (2017-05-13 13:19:49 -0700)
are available in the git repository at:
Hi Kieran,
On Monday 22 May 2017 13:16:11 Kieran Bingham wrote:
> On 17/05/17 00:20, Laurent Pinchart wrote:
> > For planes handled by a VSP instance, map the framebuffer memory through
> > the VSP to ensure proper IOMMU handling.
> >
> > Signed-off-by: Laurent Pinchart
> >
Hi Laurent,
Thankyou for the patch.
On 17/05/17 00:20, Laurent Pinchart wrote:
> For planes handled by a VSP instance, map the framebuffer memory through
> the VSP to ensure proper IOMMU handling.
>
> Signed-off-by: Laurent Pinchart
Looks good except
Hi Laurent,
Thankyou for the patch.
On 17/05/17 00:20, Laurent Pinchart wrote:
> For planes handled by a VSP instance, map the framebuffer memory through
> the VSP to ensure proper IOMMU handling.
>
> Signed-off-by: Laurent Pinchart
Looks good except
On 19 May 2017 at 15:31, Wolfram Sang wrote:
> This series adds CMD23 support to SDHI. It was tested on H2 (Gen2, Lager) and
> M3W (Gen3, Salvator-X). The test procedure can be found here:
>
> http://elinux.org/Tests:SDHI-CMD23
>
> Patches are based on mmc/next
Hi Laurent,
On 17/05/17 00:20, Laurent Pinchart wrote:
> The display buffers must be mapped for DMA through the device that
> performs memory access. Expose an API to map and unmap memory through
> the VSP device to be used by the DU.
>
> As all the buffers allocated by the DU driver are
On Fri, May 19, 2017 at 10:30:07AM +0200, Ulf Hansson wrote:
> On 18 May 2017 at 22:14, Wolfram Sang wrote:
> > On Wed, May 10, 2017 at 11:25:24AM +0200, Simon Horman wrote:
> >> Hi Wolfram, Hi Ulf, Hi Arnd, Hi all,
> >>
> >> the intention of this patch-set is to refactor the
Hi Laurent,
Thanks for the patch:
On 17/05/17 00:20, Laurent Pinchart wrote:
> From: Magnus Damm
>
> On Gen2 hardware the VSP1 is a bus master and accesses the display list
> and video buffers through DMA directly. On Gen3 hardware, however,
> memory accesses go through
Hi Laurent,
Thankyou for the patch:
On 17/05/17 00:20, Laurent Pinchart wrote:
> The new rcar_fcp_get_device() function retrieves the struct device
> related to the FCP device. This is useful to handle DMA mapping through
> the right device.
>
> Signed-off-by: Laurent Pinchart
Hi Laurent,
Thanks for the patch:
On 17/05/17 00:20, Laurent Pinchart wrote:
> Direct callers of the FCP API hold a reference to the FCP module due to
> module linkage, there's no need to take another one manually. Take a
> reference to the device instead to ensure that it won't disappear behind
On Mon, May 22, 2017 at 1:13 PM, Geert Uytterhoeven
wrote:
> On Thu, May 18, 2017 at 6:01 PM, Andy Shevchenko
> wrote:
>> On Wed, May 17, 2017 at 3:47 PM, Geert Uytterhoeven
>> wrote:
>>> + rem_ns = do_div(ts,
Hi Andy,
On Thu, May 18, 2017 at 6:01 PM, Andy Shevchenko
wrote:
> On Wed, May 17, 2017 at 3:47 PM, Geert Uytterhoeven
> wrote:
>> Add an example SPI slave handler responding with the uptime at the time
>> of reception of the last SPI message.
Hi Ulrich,
On Fri, May 19, 2017 at 3:07 PM, Ulrich Hecht
wrote:
> Add SCIF1 pin groups to the R8A7792 PFC driver.
>
> Signed-off-by: Ulrich Hecht
Thanks for your patch!
> These are the pins the MAX9260 deserializers are connected
Hi Laurent and Kieran,
On Fri, May 19, 2017 at 05:42:07PM +0300, Laurent Pinchart wrote:
> Hi Kieran,
>
> On Friday 19 May 2017 14:34:33 Kieran Bingham wrote:
> > On 18/05/17 14:36, Laurent Pinchart wrote:
> > > On Wednesday 17 May 2017 16:03:38 Kieran Bingham wrote:
> > >> From: Kieran Bingham
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