On Wed, Sep 23, 2020 at 8:08 PM LABBE Corentin wrote:
> On Wed, Sep 23, 2020 at 04:00:32PM +0200, Arnd Bergmann wrote:
> > On Sun, Sep 20, 2020 at 8:37 PM Corentin Labbe wrote:
> > > diff --git a/drivers/crypto/allwinner/sun4i-ss/sun4i-ss-cipher.c
> > > b/drivers/cryp
On Sun, Sep 20, 2020 at 8:37 PM Corentin Labbe wrote:
>
> Ciphers produce invalid results on BE.
> Key and IV need to be written in LE.
>
> Fixes: 6298e948215f2 ("crypto: sunxi-ss - Add Allwinner Security System
> crypto accelerator")
> Cc:
> Signed-off-by: Corentin Labbe
> ---
> drivers/crypt
On Thu, Feb 1, 2018 at 4:29 PM, Maxime Ripard
wrote:
> On Wed, Jan 31, 2018 at 10:37:37AM +0100, Arnd Bergmann wrote:
>> On Wed, Jan 31, 2018 at 8:29 AM, Maxime Ripard
>
>> I can think of a couple of other problems that may or may not be
>> relevant in the future that woul
On Thu, Feb 1, 2018 at 9:32 AM, Maxime Ripard
wrote:
> On Wed, Jan 31, 2018 at 02:47:53PM +, Liviu Dudau wrote:
>> On Wed, Jan 31, 2018 at 08:42:12AM +0100, Maxime Ripard wrote:
>> > On Wed, Jan 31, 2018 at 03:08:08AM +, Liviu Dudau wrote:
>> > > On Fri, Jan 26, 2018 at 11:00:41AM +0800, Y
On Wed, Jan 31, 2018 at 8:29 AM, Maxime Ripard
wrote:
> Hi Thierry,
>
> On Tue, Jan 30, 2018 at 11:01:50AM +0100, Thierry Reding wrote:
>> On Tue, Jan 30, 2018 at 10:59:16AM +0100, Thierry Reding wrote:
>> > On Tue, Jan 30, 2018 at 10:24:48AM +0100, Arnd Bergmann wrot
On Tue, Jan 30, 2018 at 8:54 AM, Maxime Ripard
wrote:
> On Mon, Jan 29, 2018 at 03:34:02PM +0100, Arnd Bergmann wrote:
>> On Mon, Jan 29, 2018 at 10:25 AM, Linus Walleij
>> wrote:
>> > On Mon, Jan 29, 2018 at 9:25 AM, Maxime Ripard
>> > wrote:
>> >
On Mon, Jan 29, 2018 at 10:49 PM, Randy Dunlap wrote:
> On 01/29/2018 01:21 AM, Yong Deng wrote:
>> Allwinner V3s SoC features two CSI module. CSI0 is used for MIPI CSI-2
>> interface and CSI1 is used for parallel interface. This is not
>> documented in datasheet but by test and guess.
>>
>> This
On Mon, Jan 29, 2018 at 10:25 AM, Linus Walleij
wrote:
> On Mon, Jan 29, 2018 at 9:25 AM, Maxime Ripard
> wrote:
>> On Sat, Jan 27, 2018 at 05:14:26PM +0100, Linus Walleij wrote:
>> However, in DT systems, that
>> field is filled only with the parent's node dma-ranges property. In
>> our case, an
On Thursday, July 28, 2016 3:18:26 PM CEST LABBE Corentin wrote:
>
> I will reworked locking and it seems that no locking is necessary.
> I have added the following comment about the locking strategy:
>
> /* Locking strategy:
> * RX queue does not need any lock since only sun8i_emac_poll() acces
On Wednesday, July 20, 2016 10:03:16 AM CEST LABBE Corentin wrote:
> +
> + /* Benched on OPIPC with 100M, setting more than 256 does not give any
> +* perf boost
> +*/
> + priv->nbdesc_rx = 128;
> + priv->nbdesc_tx = 256;
> +
>
256 tx descriptors can introduce a
On Thursday, July 7, 2016 11:16:59 AM CEST Arend Van Spriel wrote:
> On 7-7-2016 10:46, Arnd Bergmann wrote:
> > On Wednesday, July 6, 2016 9:19:41 PM CEST Arend Van Spriel wrote:
> >> On 6-7-2016 15:42, Arnd Bergmann wrote:
> >>> On Wednesday, July 6, 2016 10:08:55
On Wednesday, July 6, 2016 9:19:41 PM CEST Arend Van Spriel wrote:
> On 6-7-2016 15:42, Arnd Bergmann wrote:
> > On Wednesday, July 6, 2016 10:08:55 AM CEST Arend Van Spriel wrote:
> >> On Tue, Jul 5, 2016 at 3:43 PM, Arnd Bergmann wrote:
> > All existing uses of the mo
On Wednesday, July 6, 2016 10:08:55 AM CEST Arend Van Spriel wrote:
> On Tue, Jul 5, 2016 at 3:43 PM, Arnd Bergmann wrote:
> > On Monday, July 4, 2016 8:36:05 PM CEST Arend van Spriel wrote:
> >> On 04-07-16 16:54, Arnd Bergmann wrote:
> >> > On Monday, July 4, 2
On Monday, July 4, 2016 8:36:05 PM CEST Arend van Spriel wrote:
> On 04-07-16 16:54, Arnd Bergmann wrote:
> > On Monday, July 4, 2016 11:08:38 AM CEST Arend Van Spriel wrote:
> >
> > In drivers/net/wireless/broadcom/brcm80211/brcmfmac/sdio.c I already see
> > over a
On Monday, July 4, 2016 11:08:38 AM CEST Arend Van Spriel wrote:
> On 4-7-2016 10:55, Arnd Bergmann wrote:
> > On Monday, July 4, 2016 10:41:20 AM CEST Arend Van Spriel wrote:
> >> On 2-7-2016 23:30, Arnd Bergmann wrote:
> >>> On Saturday, July 2, 2016 8:20:35
On Monday, July 4, 2016 10:41:20 AM CEST Arend Van Spriel wrote:
> On 2-7-2016 23:30, Arnd Bergmann wrote:
> > On Saturday, July 2, 2016 8:20:35 PM CEST Arend Van Spriel wrote:
> >>> If you want a separate property, then I repeat my very first
> >>> suggestion
On Saturday, July 2, 2016 8:20:35 PM CEST Arend Van Spriel wrote:
> > If you want a separate property, then I repeat my very first
> > suggestion, the well defined model property.
> > e.g.
> >
> > brcmf@0 {
> > model = "ampak,ap6210";
> > compatible = "brcm,bcm4329-fmac";
> >
On Friday, July 1, 2016 10:17:37 AM CEST Arend Van Spriel wrote:
>
> On 1-7-2016 4:08, Rob Herring wrote:
> > On Wed, Jun 29, 2016 at 04:04:31PM +0200, Hans de Goede wrote:
> >> Add a brcm,nvram_file_name dt property to allow overruling the default
> >> nvram filename for sdio devices. The idea is
On Thursday, June 30, 2016 9:23:56 PM CEST Arend Van Spriel wrote:
>
> On 30-6-2016 13:31, Arnd Bergmann wrote:
> > On Thursday, June 30, 2016 12:25:15 PM CEST Hans de Goede wrote:
> >>> So then how about making use of a more specific compatible string?
> >&
On Thursday, June 30, 2016 12:25:15 PM CEST Hans de Goede wrote:
> > So then how about making use of a more specific compatible string?
> >
> > e.g.
> >
> > brcmf {
> > compatible = "foo,ap6210", "brcm,bcm4329-fmac";
> > ...
> > };
> >
> > and if the compatible has more than one ele
On Wednesday, June 29, 2016 10:54:38 PM CEST Priit Laes wrote:
> On Wed, 2016-06-29 at 21:33 +0200, Arnd Bergmann wrote:
> > What is the size of this nvram file? As it's board specific, I wonder
> > if we can simply include it inside of the DT verbatim. I remember
> >
On Wednesday, June 29, 2016 8:51:44 PM CEST Arend Van Spriel wrote:
> > Typical wifi devices will have some sort of non volatile storage
> > on board to not only store the ethernet(mac) address, but also
> > to contain e.g. info about the antenna gain so that the firmware
> > and/or the driver can
On Tuesday 02 February 2016 15:30:48 Andre Przywara wrote:
> Hi,
>
> On 02/02/16 15:20, Matthias Brugger wrote:
> >
> >
> > On 01/02/16 18:39, Andre Przywara wrote:
> >> To prepare for the Allwinner A64 SoC support, introduce a config
> >> option to allow compiling Allwinner (aka. sunxi) specifi
On Monday 04 January 2016 12:26:48 Maxime Ripard wrote:
> Hi Andre, Arnd,
>
> On Tue, Dec 22, 2015 at 12:27:47PM +, Andre Przywara wrote:
> > To prepare for supporting the Allwinner A64 SoC, introduce a config
> > option to allow compiling Allwinner (aka. sunxi) specific drivers
> > for ARM64.
c drivers to be selected during kernel configuration.
>
> Signed-off-by: Andre Przywara
Acked-by: Arnd Bergmann
>
> It turns out that this header is actually not needed for the driver,
> so remove it and allow compilation for other architectures like
> arm64.
>
> Signed-off-by: Andre Przywara
Acked-by: Arnd Bergmann
On Tuesday 22 December 2015, Andre Przywara wrote:
> The length parameter in this dev_dbg() call is actually a size_t,
> so use the proper type to avoid warnings when compiling for 64-bit
> architectures.
>
> Signed-off-by: Andre Przywara
Acked-by: Arnd Bergmann
On Tuesday 22 December 2015, Andre Przywara wrote:
> The min3() macro expects all arguments to be of the same type (or
> size at least). While two arguments are ints or u32s, one is size_t,
> which does not match on 64-bit architectures.
> Cast the size_t to u32 to make min3() happy. In this contex
On Tuesday 22 December 2015, Andre Przywara wrote:
> "len" is actually a size_t in this function here, so properly annotate
> the dev_err printf type to allow compilation for 64-bit architectures.
>
> Signed-off-by: Andre Przywara
Acked-by:
On Tuesday 27 October 2015 17:50:22 Jens Kuske wrote:
> + of_property_read_string_index(node, "clock-output-names",
> + i, &clk_name);
> +
> + if (index == 17 || (index >= 29 && index <= 31))
> + clk_paren
On Tuesday 27 October 2015 17:50:24 Jens Kuske wrote:
>
> +static int sun8i_h3_bus_reset_xlate(struct reset_controller_dev *rcdev,
> + const struct of_phandle_args *reset_spec)
> +{
> + unsigned int index = reset_spec->args[0];
> +
> + if (index < 96)
he series is based on v4.3-rc1.
>
>
Acked-by: Arnd Bergmann
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to linux-sunxi+unsubscr...@googlegrou
On Thursday 15 October 2015 16:28:45 Hans de Goede wrote:
> When the gpio interrupt bindings where changed to add a bank to the
> specifier list, the r_pio nodes of A23/A31/A33 where not updated to
> match and neither was the pio node of the A80, this fixes this.
>
> Signed-off-by: Hans de Goede
On Sunday 11 October 2015 17:18:44 Maxime Ripard wrote:
> Ah right. I wanted this to be applied directly for 4.3, so I based it
> on 4.3-rc4, that didn't have that commit.
>
> In order to avoid the potential conflicts, I think the ARM-SoC
> maintainers should simply merge this one, and I'll drop m
On Friday 18 September 2015 15:55:38 Maxime Ripard wrote:
>
> And I don't think it's something the MMC core should deal with. The
> device itself has a single pin to provide its power, it's the board
> that is wired that way. The way I was seeing it was more that I needed
> to create a regulator d
On Friday 18 September 2015 14:19:05 Maxime Ripard wrote:
>
> There's actually two issues that are pretty orthogonal:
>
> * the fact that the regulator to power the wifi chip needs to be
> enabled before it enumerates and the driver is probed. The MMC
> pwrseq stuff seems to fix that, e
On Friday 18 September 2015 10:48:45 Maxime Ripard wrote:
>
> Here is a serie introducing the support for the Allwinner R8 and the
> Nextthing's CHIP.
>
> Support is almost complete for the CHIP itself, the only missing part
> for now is the WiFi chip that needs to be powered through two combined
On Monday 14 September 2015 13:49:12 Arnd Bergmann wrote:
> > > If all hardware can do 32-bit accesses here and the size is guaranteed to
> > > be a
> > > multiple of four bytes, you can probably improve performance by using a
> > > __raw_writel() loop there
On Monday 14 September 2015 11:41:13 Boris Brezillon wrote:
> Hi Arnd,
>
> On Mon, 14 Sep 2015 10:59:02 +0200
> Arnd Bergmann wrote:
>
> > On Monday 14 September 2015 10:41:03 Boris Brezillon wrote:
> > > /* Fill OOB data in */
> >
On Monday 14 September 2015 10:41:03 Boris Brezillon wrote:
> /* Fill OOB data in */
> - if (oob_required) {
> - tmp = 0x;
> - memcpy_toio(nfc->regs + NFC_REG_USER_DATA_BASE, &tmp,
> -
med by some
> drivers in the kernel.
>
> Signed-off-by: Maxime Ripard
> Acked-by: Arnd Bergmann
> Acked-by: Hans de Goede
> Tested-by: Hans de Goede
> ---
>
> Hi Arnd, Kevin, Olof,
>
> Could you please apply directly this patch to your tree?
>
> It
On Monday 11 May 2015 20:14:12 Hans de Goede wrote:
> Also note, that as I've tried to explain in the commit message already this
> commit
> makes no functional changes what so ever, the generic
> musb_default_read/write_fifo
> functions are only used by musb platforms which do not overwrite musb
On Monday 11 May 2015 10:58:46 Felipe Balbi wrote:
> On Fri, Mar 20, 2015 at 08:11:13PM +0100, Hans de Goede wrote:
> > The generic fifo functions already use non wrapped accesses in various
> > cases through the iowrite#_rep functions, and all platforms which override
> > the default musb_read[b|w
On Tuesday 10 March 2015 09:56:52 Hans de Goede wrote:
> On 10-03-15 09:50, Arnd Bergmann wrote:
> > On Tuesday 10 March 2015 08:43:22 Hans de Goede wrote:
> >> On 09-03-15 22:50, Arnd Bergmann wrote:
> >>> On Monday 09 March 2015 21:40:18 Hans de Goede wrote:
>
On Tuesday 10 March 2015 09:04:43 Hans de Goede wrote:
> Hi,
>
> On 09-03-15 22:47, Arnd Bergmann wrote:
> > On Monday 09 March 2015 21:40:15 Hans de Goede wrote:
> >> +void sun4i_usb_phy_update_iscr(struct phy *_phy, u32 clr, u32 set)
> >> +{
>
On Tuesday 10 March 2015 08:43:22 Hans de Goede wrote:
> On 09-03-15 22:50, Arnd Bergmann wrote:
> > On Monday 09 March 2015 21:40:18 Hans de Goede wrote:
> >> The generic fifo functions already use non wrapped accesses in various
> >> cases through the iowrite#_rep f
On Tuesday 10 March 2015 09:46:24 Chen-Yu Tsai wrote:
> I believe you are talking about "mmio-sram"?
Yes.
> The syscon here represents a switch, to toggle whether a block of SRAM is
> mapped into the CPU memory space, or to a specific devices private address
> space. It is not the actual SRAM.
>
On Monday 09 March 2015 21:40:18 Hans de Goede wrote:
> The generic fifo functions already use non wrapped accesses in various
> cases through the iowrite#_rep functions, and all platforms which override
> the default musb_read[b|w] / _write[b|w] functions also provide their own
> fifo access funct
On Monday 09 March 2015 21:40:15 Hans de Goede wrote:
> +void sun4i_usb_phy_update_iscr(struct phy *_phy, u32 clr, u32 set)
> +{
> + struct sun4i_usb_phy *phy = phy_get_drvdata(_phy);
> + struct sun4i_usb_phy_data *data = to_sun4i_usb_phy_data(phy);
> + u32 iscr;
> +
> + isc
On Monday 09 March 2015 21:40:13 Hans de Goede wrote:
> Hi All,
>
> This patch set has been a while in the making, so I'm very happy to present
> the end result here, and I hope everyone likes it.
Awesome work!
> Before talking about merging this there are 2 things which I would like to
> point
On Sunday 08 March 2015 18:47:21 Maxime Ripard wrote:
>
> Not enough information to check signature validity. Show Details
> Hi,
>
> On Sat, Mar 07, 2015 at 09:41:54AM +0100, Code Kipper wrote:
> > > Don't your device has any brand on the case or the PCB?
> >
> > There is nothing on the PCB to
On Tuesday 24 February 2015 22:32:57 Chen-Yu Tsai wrote:
> On Tue, Feb 24, 2015 at 10:17 PM, Arnd Bergmann wrote:
> > On Tuesday 24 February 2015 22:01:26 Chen-Yu Tsai wrote:
> >> On Tue, Feb 24, 2015 at 6:37 PM, Arnd Bergmann wrote:
> >> > On Tuesday 24 February 20
On Tuesday 24 February 2015 22:01:26 Chen-Yu Tsai wrote:
> On Tue, Feb 24, 2015 at 6:37 PM, Arnd Bergmann wrote:
> > On Tuesday 24 February 2015 18:29:02 Chen-Yu Tsai wrote:
> >>
> >> + rsb@01f03400 {
> >> + compatible = "allwinner
On Tuesday 24 February 2015 18:29:02 Chen-Yu Tsai wrote:
>
> + rsb@01f03400 {
> + compatible = "allwinner,sun8i-a23-rsb";
> + reg = <0x01f03400 0x400>;
> + interrupts = <0 39 4>;
> + clocks = <&apb0_gates 3>;
> + clock-fre
On Wednesday 07 January 2015 08:41:08 Olliver Schinagl wrote:
> From: Olliver Schinagl
>
> I probably have forgotten to use this macro for the of_match pointer, so
> this patch adds the of_match_ptr macro.
>
> Signed-off-by: Olliver Schinagl
> ---
> drivers/misc/eeprom/sunxi_sid.c | 3 ++-
> 1
On Friday 05 December 2014 07:01:17 Dmitry Torokhov wrote:
>
> On December 5, 2014 2:33:11 AM PST, Arnd Bergmann wrote:
> >On Thursday 04 December 2014 04:23:44 vishnupatekar wrote:
> >> +
> >> +struct sunxips2data {
> >> +int irq;
> >>
On Thursday 04 December 2014 04:23:44 vishnupatekar wrote:
> +
> +#define DRIVER_NAME "sunxi-ps2"
> +
> +#define RESSIZE(res)(((res)->end - (res)->start)+1)
Remove this and use the existing resource_size() function
> +
> +struct sunxips2data {
> + int irq;
> + spinlock_t
On Sunday 19 October 2014 16:16:22 LABBE Corentin wrote:
> Add support for the Security System included in Allwinner SoC A20.
> The Security System is a hardware cryptographic accelerator that support
> AES/MD5/SHA1/DES/3DES/PRNG algorithms.
>
> Signed-off-by: LABBE Corentin
Please wrap lines i
On Monday 28 July 2014 11:35:32 Maxime Ripard wrote:
> On Mon, Jul 21, 2014 at 10:54:27PM +0800, Chen-Yu Tsai wrote:
> > dtc was giving warnings for missing #address-cells and #size-cells for
> > the new sun6i-a31-hummingbird.dts, which has a i2c-based rtc device.
> >
> > This patch adds the prope
On Friday 04 July 2014, Maxime Ripard wrote:
> > > > It feels a little fragile to rely on the organisation of the clock tree
> > > > and the naming thereof. If the IP block is ever reused on an SoC with a
> > > > different clock tree layout then we have to handle things differently.
> > >
> > > Wh
On Monday 23 June 2014 14:47:48 Guenter Roeck wrote:
> > To continue the discussion: I would like to add an excerpt from
> > drivers/watchdog/alim7101_wdt.c
> > /*
> > * Notifier for system down
> > */
> >
> > static int wdt_notify_sys(struct notifier_block *this,
> >
On Monday 23 June 2014 08:16:18 Guenter Roeck wrote:
> > Moved to where?
> >
> > I certainly don't want it in the platform directories, and for arm64 we
> > intentionally don't have a place to put this stuff.
> >
>
> I have no idea, but setting the arm reset function pointer from a watchdog
> driv
On Monday 23 June 2014 07:30:56 Guenter Roeck wrote:
> On 06/23/2014 03:31 AM, Maxime Ripard wrote:
> > On Thu, May 22, 2014 at 02:12:07PM -0700, Guenter Roeck wrote:
> >> On Thu, May 22, 2014 at 10:34:44PM +0200, Maxime Ripard wrote:
> >>> On Mon, May 19, 2014 at 05:04:22PM +0200, Maxime Ripard wr
On Wednesday 21 May 2014 17:55:51 Maxime Ripard wrote:
> On Wed, May 21, 2014 at 05:23:41PM +0200, Arnd Bergmann wrote:
> > On Wednesday 21 May 2014 17:15:54 Maxime Ripard wrote:
> > > Changes from v7:
> > > - select DMA_OF, since we're only relying on DT
> &g
On Wednesday 21 May 2014 17:15:54 Maxime Ripard wrote:
> Changes from v7:
> - select DMA_OF, since we're only relying on DT
>
I missed the discussion about this issue, but it seems wrong to me.
DMA_OF is currently enabled if we have both DMAENGINE and OF turned on.
If OF is disabled but DMA_OF
ot identical to mmc-dw, it deals with
> sending stop commands in hardware which makes it significantly different
> from the mmc-dw devices.
>
> HdG: Various cleanups and fixes.
>
> Signed-off-by: David Lanzendörfer
> Signed-off-by: Hans de Goede
>
Acked-by: Arnd B
On Saturday 26 April 2014 18:16:53 Maxime Ripard wrote:
> This will allow to better isolate various options, and reduce the overall
> kernel size if we're interested in only one of the SoCs.
>
> Signed-off-by: Maxime Ripard
Looks good, just one small request:
> diff --git a/arch/arm/mach-sunxi
gned-off-by: Maxime Ripard
>
Acked-by: Arnd Bergmann
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group and stop receiving emails from it, send an email
to linux-sunxi+unsubscr...@googlegr
On Wednesday 23 April 2014 17:04:36 Maxime Ripard wrote:
>
> -static void __init sunxi_dt_init(void)
> -{
> - of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
> -}
> -
> -static const char * const sunxi_board_dt_compat[] = {
> - "allwinner,sun4i-a10",
> - "all
arch/arm/mach-sunxi/sunxi.c | 98
> -
> 1 file changed, 98 deletions(-)
>
Acked-by: Arnd Bergmann
--
You received this message because you are subscribed to the Google Groups
"linux-sunxi" group.
To unsubscribe from this group an
On Wednesday 23 April 2014 17:04:34 Maxime Ripard wrote:
> Make sure we have the restart hooks in the kernel by selecting them in
> Kconfig.
>
> Signed-off-by: Maxime Ripard
> ---
> arch/arm/mach-sunxi/Kconfig | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a/arch/arm/mach-sunxi/Kco
ned-off-by: Maxime Ripard
Acked-by: Arnd Bergmann
> @@ -181,6 +209,9 @@ static int sunxi_wdt_probe(struct platform_device *pdev)
> if (unlikely(err))
> return err;
>
> + sunxi_restart_ctx = sunxi_wdt;
> + arm_pm_restart = sun4i_wdt_restart;
> +
On Wednesday 23 April 2014 15:28:29 Maxime Ripard wrote:
> On Wed, Apr 23, 2014 at 02:33:50PM +0200, Arnd Bergmann wrote:
> > On Thursday 17 April 2014, Maxime Ripard wrote:
> > > This will allow to add per-SoC hooks more easily.
> > >
> > > Signed-off-by: Maxi
On Wednesday 23 April 2014 15:17:20 Maxime Ripard wrote:
> > > +#include
> > > #include
> > > #include
> > >
> > > @@ -19,9 +20,17 @@
> > >
> > > static void __init sun4i_dt_init(void)
> > > {
> > > + struct clk *clk;
> > > +
> > > sunxi_setup_restart();
> > >
> > >
On Thursday 17 April 2014, Maxime Ripard wrote:
> Since we start to have a lot of clocks to protect, some of them in a few
> boards
> only, it becomes difficult to handle the clock protection without having to
> add
> per machine exceptions.
>
> Move these where they belong, in the machine defin
On Thursday 17 April 2014, Maxime Ripard wrote:
> The DT are supposed to be ordered by physical address. Move the NMI node where
> it belongs.
>
> Signed-off-by: Maxime Ripard
Acked-by: Arnd Bergmann
--
You received this message because you are subscribed to the Google Groups
On Thursday 13 March 2014, Maxime Ripard wrote:
> Now that we have a DMA driver, we can add the DMA bindings in the DTSI for the
> controller and the devices supported that can use DMA.
>
> Signed-off-by: Maxime Ripard
Acked-by: Arnd Bergmann
But why does this patch have to
On Thursday 17 April 2014, Maxime Ripard wrote:
> This will allow to add per-SoC hooks more easily.
>
> Signed-off-by: Maxime Ripard
> ---
> arch/arm/mach-sunxi/Makefile | 6 +-
> arch/arm/mach-sunxi/restart.c | 104 +++
> arch/arm/mach-sunxi/restart.h | 20 ++
>
On Tuesday 22 April 2014, Linus Walleij wrote:
> On Thu, Apr 10, 2014 at 3:52 PM, Boris BREZILLON
> wrote:
>
> > The A31 SoC has PL and PM banks and thus increase the default ARCH_NR_GPIO.
> >
> > Signed-off-by: Boris BREZILLON
> > Acked-by: Maxime Ripard
>
> Patch applied, and g we need t
On Friday 11 April 2014 13:09:08 Mark Brown wrote:
> On Fri, Apr 11, 2014 at 01:25:03PM +0200, Arnd Bergmann wrote:
>
> > Why do you have to enumerate the interrupts here? Can't you just
> > put all the numbers into the DT nodes of the devices using them?
>
> >
On Friday 11 April 2014 11:38:05 Carlo Caione wrote:
> +#define AXP20X_IRQ(_irq, _off, _mask) \
> + [AXP20X_IRQ_##_irq] = { .reg_offset = (_off), .mask = BIT(_mask) }
> +
> +static const struct regmap_irq axp20x_regmap_irqs[] = {
> + AXP20X_IRQ(ACIN_OVER_V, 0, 7),
> + AXP2
to be
> possible to share the driver for these two.
>
> The A31 Controller is able to memory-to-memory or memory-to-device transfers
> on
> the 16 channels in parallel.
>
> Signed-off-by: Maxime Ripard
Looks good to me now,
Acked-by: Arnd Bergmann
--
You received this m
On Monday 10 March 2014 17:51:56 Maxime Ripard wrote:
> >
> > Neither "pll6" nor "ahb1_mux" are listed in the DT binding. Also, why
> > is it the driver's business to set the parent?
>
> Those are global clocks, so it's not really part pof the driver
> binding itself. But I can add them.
No bett
On Monday 10 March 2014 15:41:51 Maxime Ripard wrote:
> +/*
> + * Hardware representation of the LLI
> + *
> + * The hardware will be fed the physical address of this structure,
> + * and read its content in order to start the transfer.
> + */
> +struct sun6i_dma_lli {
> + u32
On Tuesday 11 February 2014 10:27:12 Alan Stern wrote:
>
> It might even be a good idea to change the "xhci-platform" string to
> match, it that doesn't cause too much trouble.
The original xhci binding was contributed by Al Cooper, but I don't
see any dts files using it. I agree that xhci-gener
On Wednesday 22 January 2014, Hans de Goede wrote:
> --- a/include/linux/ahci_platform.h
> +++ b/include/linux/ahci_platform.h
> @@ -50,4 +50,11 @@ int ahci_platform_init_host(struct platform_device *pdev,
> unsigned int force_port_map,
> unsi
On Tuesday 21 January 2014, Alexandre Courbot wrote:
> >> As discussed earlier in this thread I'm not sure the con_id is
> >> suitable for labelling GPIOs. It'd be better to have a proper name
> >> specified in DT/ACPI instead.
> >
> > +1
>
> I wonder why you guys prefer to have the name defined i
On Tuesday 21 January 2014, Linus Walleij wrote:
> On Tue, Jan 21, 2014 at 4:11 AM, Alexandre Courbot wrote:
> > On Sat, Jan 18, 2014 at 8:11 AM, Linus Walleij
> > wrote:
> >
> > I agree that's how it should be be done with the current API if your
> > driver can obtain GPIOs from both ACPI and D
On Friday 17 January 2014, Chen-Yu Tsai wrote:
> On Sat, Jan 18, 2014 at 12:47 AM, Arnd Bergmann wrote:
> > On Friday 17 January 2014, Chen-Yu Tsai wrote:
> >> diff --git a/Documentation/devicetree/bindings/rfkill/rfkill-gpio.txt
> >> b/Documentation/devicetree/bind
On Friday 17 January 2014, Chen-Yu Tsai wrote:
> diff --git a/Documentation/devicetree/bindings/rfkill/rfkill-gpio.txt
> b/Documentation/devicetree/bindings/rfkill/rfkill-gpio.txt
> new file mode 100644
> index 000..8a07ea4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/rfkill/rfkil
On Wednesday 15 January 2014 10:10:06 Maxime Ripard wrote:
> On Thu, Jan 09, 2014 at 04:34:04PM +0100, Gerardo Di Iorio wrote:
> > Change the AllWinner A1X SOCs to Allwinner Sunxi SOCs
> >
> > Signed-off-by: Gerardo Di Iorio
> > ---
> > arch/arm/mach-sunxi/Kconfig | 2 +-
> > 1 file changed, 1 i
On Thursday 09 January 2014 18:57:05 Hans de Goede wrote:
> + if (pdata == &ohci_platform_defaults && dev->dev.of_node) {
> + priv->phy = devm_phy_get(&dev->dev, "usb");
> + if (IS_ERR(priv->phy)) {
> + err = PTR_ERR(priv->phy);
> +
On Thursday 09 January 2014, Carlo Caione wrote:
> In Allwinner A20/A31 SoCs NMI controller is an independent module
> external and in cascade with the GIC. It catches the NMI pin's state
> and generates irq to GIC.
> (therefore NMI is not really not Non-maskable but it is a normal interrupt).
> He
On Thursday 09 January 2014, boris brezillon wrote:
> Sure, I'll remove references to the NFC acronym:
> - change compatible string to "allwinner,sun4i-nand"
> - avoid NFC references in the doc
> - rename the driver into sunxi-nand.c (formerly sunxi_nfc.c)
>
> Do you see any other references
On Wednesday 08 January 2014, Boris BREZILLON wrote:
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mtd/sunxi-nand.txt
> @@ -0,0 +1,71 @@
> +Allwinner NAND Flash Controller (NFC)
> +
> +Required properties:
> +- compatible : "allwinner,sun4i-nfc".
> +- reg : shall contain registers locat
On Wednesday 08 January 2014 19:58:37 Maxime Ripard wrote:
> > I think it's a pretty cool idea. Have you considered integrating this with
> > the impedence-matcher project at
> >
> > https://github.com/zonque/pxa-impedance-matcher ?
> >
> > That one basically does the same thing for atags-based b
On Wednesday 08 January 2014 12:49:10 Carlo Caione wrote:
> >> +sc-nmi-intc@01c00030 {
> >> + compatible = "allwinner,sun7i-sc-nmi";
> >> + interrupt-controller;
> >> + #interrupt-cells = <2>;
> >> + reg = <0x01c00030 0x0c>;
> >> + interrupt-parent = <&gic>;
> >> +
On Tuesday 07 January 2014, Maxime Ripard wrote:
> Anyway, enough talking. Any feedback is, as usual, appreciated.
I think it's a pretty cool idea. Have you considered integrating this with
the impedence-matcher project at
https://github.com/zonque/pxa-impedance-matcher ?
That one basically doe
On Monday 06 January 2014, Carlo Caione wrote:
> +Allwinner Sunxi NMI Controller
> +==
> +
> +Required properties:
> +
> +- compatible : should be "allwinner,sun7i-sc-nmi"
> +- reg : Specifies base physical address and size of the registers.
> +- interrupt-controller : I
On Tuesday 07 January 2014 22:03:11 Hans de Goede wrote:
> >> +
> >> +Optional properties:
> >> + - clocks: array of clocks
> >> + - clock-names: clock names "ahb" and/or "ohci"
> >
> > Where does "ahb" come from, what does it mean, and how is it relevant
> > to generic platforms?
>
> ahb is an AR
1 - 100 of 105 matches
Mail list logo