Re: [Mesa-dev] [PATCH 24/28] i965/blorp: Add MSAA encode/decode support to the NIR path

On Tue, May 10, 2016 at 04:16:44PM -0700, Jason Ekstrand wrote: > --- > src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 203 > +-- Reviewed-by: Topi Pohjolainen > 1 file changed, 194 insertions(+), 9 deletions(-) > > diff --git

Re: [Mesa-dev] [PATCH 22/28] i965/blorp: Add support for discard-based bounds checks to the NIR path

On Tue, May 10, 2016 at 04:16:42PM -0700, Jason Ekstrand wrote: > --- > src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 19 ++- > 1 file changed, 18 insertions(+), 1 deletion(-) Reviewed-by: Topi Pohjolainen > > diff --git

Re: [Mesa-dev] [PATCH v2 19/30] i965/fs: add shuffle_64bit_data_for_32bit_write helper

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 13/05/16 05:05, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > >> From: Iago Toral Quiroga >> >> This does the inverse operation of >> shuffle_32bit_load_result_to_64bit_data and we

Re: [Mesa-dev] [PATCH 23/28] i965/blorp: Add support for W-[de]tiling to the NIR path

On Tue, May 10, 2016 at 04:16:43PM -0700, Jason Ekstrand wrote: > --- > src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 107 > ++- > 1 file changed, 105 insertions(+), 2 deletions(-) > > diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp >

[Mesa-dev] [PATCH] radeonsi: force level zero on image instructions in non-fragment shaders (v2)

From: Nicolai Hähnle Section 8.9 (Texture Functions) of the OpenGL Shading Language 4.5 specification: However, automatic level of detail is computed only for fragment shaders. Other shaders operate as though the base level of detail were computed as zero. and

Re: [Mesa-dev] [PATCH v2 09/30] i965/fs: fix copy/constant propagation regioning checks

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 13/05/16 07:11, Samuel Iglesias Gonsálvez wrote: > > > On 13/05/16 02:42, Francisco Jerez wrote: >> Samuel Iglesias Gonsálvez writes: >> >>> From: Iago Toral Quiroga >>> >>> We were not accounting

Re: [Mesa-dev] GBM backend dynamic dispatch method

2016-05-13 12:39 GMT+08:00 Nicolai Hähnle : > On 12.05.2016 20:20, Jammy Zhou wrote: > >> >> >> 2016-05-12 17:39 GMT+08:00 Michel Dänzer > >: >> >> On 12.05.2016 17:58, Yu, Qiang wrote: >> > Oh, what a crazy idea. So you

Re: [Mesa-dev] [PATCH v2 03/30] i965/fs: Fix copy propagation of load payload for double operands

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 13/05/16 07:09, Samuel Iglesias Gonsálvez wrote: > > > On 13/05/16 01:52, Francisco Jerez wrote: >> Samuel Iglesias Gonsálvez writes: >> >>> From: Iago Toral Quiroga >>> >>> Specifically, consider

Re: [Mesa-dev] [PATCH 2/2] i965: check each field separately in backend_end::equals()

-BEGIN PGP SIGNED MESSAGE- Hash: SHA256 On 13/05/16 05:38, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > >> Extra bits required to make room for the df field of the union >> don't get initialized in all codepaths, so backend_reg >> comparisons done

[Mesa-dev] [PATCH] glsl: make sure that texture(bias) variants are only exposed in fs

Many were already marked as fs_only, but not all. This fixes the remaining ir_txb entries. Signed-off-by: Ilia Mirkin --- src/compiler/glsl/builtin_functions.cpp | 74 - 1 file changed, 37 insertions(+), 37 deletions(-) diff --git

Re: [Mesa-dev] [PATCH v2 09/30] i965/fs: fix copy/constant propagation regioning checks

On 13/05/16 02:42, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > >> From: Iago Toral Quiroga >> >> We were not accounting for subreg_offset in the check for the start >> of the region. >> >> Also, fs_reg::regs_read() already takes the

Re: [Mesa-dev] [PATCH v2 03/30] i965/fs: Fix copy propagation of load payload for double operands

On 13/05/16 01:52, Francisco Jerez wrote: > Samuel Iglesias Gonsálvez writes: > >> From: Iago Toral Quiroga >> >> Specifically, consider the size of the data type of the operand to compute >> the number of registers written. >> >> v2 (Sam): >> - Fix

Re: [Mesa-dev] [PATCH 21/28] i965/blorp: Add initial support for NIR-based blit shaders

On Tue, May 10, 2016 at 04:16:41PM -0700, Jason Ekstrand wrote: > Many of the more complex cases still fall back to the old shader builder. > --- > src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 425 > +-- > 1 file changed, 401 insertions(+), 24 deletions(-) > > diff

Re: [Mesa-dev] [PATCH 2/2] radeonsi: force level zero on image instructions in non-fragment shaders

On Fri, May 13, 2016 at 12:57 AM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > Section 8.9 (Texture Functions) of the OpenGL Shading Language 4.5 > specification: > >However, automatic level of detail is computed only for fragment shaders. >

Re: [Mesa-dev] [PATCH] glsl: be more strict when validating shader inputs

With the version cutoff fixed, this and the patch it builds on are (squashed together or not): Reviewed-by: Chris Forbes On Fri, May 13, 2016 at 4:58 PM, Ilia Mirkin wrote: > On Fri, May 13, 2016 at 12:51 AM, Dave Airlie wrote:

Re: [Mesa-dev] [PATCH] glsl: be more strict when validating shader inputs

On Fri, May 13, 2016 at 12:51 AM, Dave Airlie wrote: >>> second argument is for ES... 0 means "never"). >> >> I see. (You can tell how much of this sort of code I've written...). >> >> I don't know that I'd trust me but it looks fine as far add I can see. >> Thanks for taking

[Mesa-dev] [PATCH 1/2] radeonsi: emit TXQ in separate functions

From: Nicolai Hähnle TXQ is sufficiently different that having in it in the same code path as texture sampling/fetching opcodes doesn't make much sense. --- src/gallium/drivers/radeonsi/si_shader.c | 109 ++- 1 file changed, 64 insertions(+),

[Mesa-dev] [PATCH 2/2] radeonsi: force level zero on image instructions in non-fragment shaders

From: Nicolai Hähnle Section 8.9 (Texture Functions) of the OpenGL Shading Language 4.5 specification: However, automatic level of detail is computed only for fragment shaders. Other shaders operate as though the base level of detail were computed as zero. Of

Re: [Mesa-dev] [PATCH] glsl: be more strict when validating shader inputs

>> second argument is for ES... 0 means "never"). > > I see. (You can tell how much of this sort of code I've written...). > > I don't know that I'd trust me but it looks fine as far add I can see. > Thanks for taking care of 4.50 while you were in the neighborhood. For what > it's worth, Do we

[Mesa-dev] [PATCH v2 3/5] compiler/glsl: avoid downcasting list sentinel nodes (v2)

From: Nicolai Hähnle This avoids undefined downcasting of list sentinels that crashes gcc's ubsan. v2: don't use a new macro (Ian Romanick) --- src/compiler/glsl/opt_tree_grafting.cpp | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git

[Mesa-dev] [PATCH v2 0/5] compiler/glsl: fix crashes when running with ubsan

Hi, some minor adjustment based on feedback. Mostly I've gotten rid of the new macros which were really only used in at most two places each. Cheers, Nicolai ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org

[Mesa-dev] [PATCH v2 2/5] compiler/list: avoid downcasting sentinel nodes (v2)

From: Nicolai Hähnle This avoids undefined behaviour that crashes gcc's ubsan. v2: don't add a new macro (Ian Romanick) --- src/compiler/glsl/opt_dead_code_local.cpp | 8 +--- src/compiler/glsl/opt_tree_grafting.cpp | 9 + 2 files changed, 10

[Mesa-dev] [PATCH v2 4/5] compiler/glsl: move list node downcasts after sentinel/counter checks (v2)

From: Nicolai Hähnle v2: make variable const + style change Reviewed-by: Ian Romanick --- src/compiler/glsl/ast_function.cpp | 4 ++-- src/compiler/glsl/link_uniform_initializers.cpp | 8 +++- 2 files changed, 5

[Mesa-dev] [PATCH v2 5/5] compiler/list: avoid downcasting list sentinel nodes (v2)

From: Nicolai Hähnle v2: don't add new macros --- src/compiler/glsl/lower_jumps.cpp | 16 +++- 1 file changed, 7 insertions(+), 9 deletions(-) diff --git a/src/compiler/glsl/lower_jumps.cpp b/src/compiler/glsl/lower_jumps.cpp index 3cfa2e0..b62e76e 100644

[Mesa-dev] [PATCH v2 1/5] compiler: guard list iteration macros against undefined behavior (v2)

From: Nicolai Hähnle The old iteration casts sentinel nodes (which are mere exec_nodes) into whatever type we're looping over, which leads to badness (in fact, gcc's undefined behaviour sanitizer crashes while trying to verify that we have the correct type at hand).

Re: [Mesa-dev] [PATCH] glsl: be more strict when validating shader inputs

On May 12, 2016 9:42 PM, "Ilia Mirkin" wrote: > > On Fri, May 13, 2016 at 12:41 AM, Jason Ekstrand wrote: > > > > On May 12, 2016 9:29 PM, "Ilia Mirkin" wrote: > >> > >> interpolateAt* can only take input variables or an element

Re: [Mesa-dev] [PATCH] glsl: be more strict when validating shader inputs

On May 12, 2016 9:41 PM, "Jason Ekstrand" wrote: > > > On May 12, 2016 9:29 PM, "Ilia Mirkin" wrote: > > > > interpolateAt* can only take input variables or an element of an input > > variable array. No structs. > > > > Further, GLSL 4.50 relaxes the

Re: [Mesa-dev] [PATCH] glsl: be more strict when validating shader inputs

On Fri, May 13, 2016 at 12:41 AM, Jason Ekstrand wrote: > > On May 12, 2016 9:29 PM, "Ilia Mirkin" wrote: >> >> interpolateAt* can only take input variables or an element of an input >> variable array. No structs. >> >> Further, GLSL 4.50 relaxes the

[Mesa-dev] [PATCH 5/6] glsl: Extend lowering pass for gl_ClipDistance to support other arrays (v3)

From: Tobias Klausmann This will come in handy when we want to lower gl_CullDistance into gl_CullDistanceMESA. [airlied: drop separate APIs for clip/cull - just use single API to call both passes.] v3: reexamine my sanity, this was pretty broken, the new

[Mesa-dev] [PATCH 4/6] glsl: rename lower_clip_distance to lower_distance.

From: Dave Airlie This just renames the file in anticipation of adding cull lowering. Signed-off-by: Tobias Klausmann Signed-off-by: Dave Airlie Reviewed-by: Edward O'Callaghan ---

[Mesa-dev] [PATCH 3/6] mesa/prog: Add varyings for arb_cull_distance

From: Tobias Klausmann Signed-off-by: Tobias Klausmann Reviewed-by: Edward O'Callaghan Signed-off-by: Dave Airlie --- src/mesa/program/prog_print.c | 4 1 file

[Mesa-dev] [PATCH 1/6] glapi: Add GL_ARB_cull_distance

From: Tobias Klausmann Signed-off-by: Tobias Klausmann Reviewed-by: Edward O'Callaghan Signed-off-by: Dave Airlie --- src/mapi/glapi/gen/gl_API.xml | 7 ++- 1

[Mesa-dev] [PATCH 6/6] glsl: Add arb_cull_distance support

From: Tobias Klausmann Signed-off-by: Tobias Klausmann Signed-off-by: Dave Airlie --- src/compiler/glsl/ast_to_hir.cpp | 14 src/compiler/glsl/builtin_variables.cpp | 11 ++-

[Mesa-dev] ARB_cull_distance support v4?

This is just the core patches, as I think the lowering was pretty broken in the last couple of reposts. The lowering now lowers to one array of 8 or whatever. I need to recheck the gallium and llvmpipe bits on top of this, as I think llvmpipe will be broken. I think I'm going to rip out the

[Mesa-dev] [PATCH 2/6] mesa/main: Add support for GL_ARB_cull_distance (v2)

From: Tobias Klausmann airlied: v2: rename LowerClipDistance to LowerCombinedClipCullDistnace. I don't think we want any other behaviour with any current hw. Signed-off-by: Tobias Klausmann Reviewed-by: Edward

Re: [Mesa-dev] [PATCH] glsl: be more strict when validating shader inputs

On May 12, 2016 9:29 PM, "Ilia Mirkin" wrote: > > interpolateAt* can only take input variables or an element of an input > variable array. No structs. > > Further, GLSL 4.50 relaxes the requirement to allow swizzles, so enable > that as well. > > This fixes the following

Re: [Mesa-dev] GBM backend dynamic dispatch method

On 12.05.2016 20:20, Jammy Zhou wrote: 2016-05-12 17:39 GMT+08:00 Michel Dänzer >: On 12.05.2016 17:58, Yu, Qiang wrote: > Oh, what a crazy idea. So you mean it can work like this? > > 1. use the libgbm/gbm_dri/libEGL/libGLES from

[Mesa-dev] [PATCH] glsl: be more strict when validating shader inputs

interpolateAt* can only take input variables or an element of an input variable array. No structs. Further, GLSL 4.50 relaxes the requirement to allow swizzles, so enable that as well. This fixes the following dEQP tests:

[Mesa-dev] [PATCH] i965: Add support for GL_ARB_cull_distance

From: Kristian Høgsberg Kristensen Signed-off-by: Kristian Høgsberg Kristensen Reviewed-by: Kenneth Graunke --- Setting cull_distance_mask for gs and tes now as well. Also, moved extension enable bit into

Re: [Mesa-dev] [PATCH v2] gallium/ddebug: Support compute states.

Thanks for taking care of this! Reviewed-by: Nicolai Hähnle On 10.05.2016 13:07, Bas Nieuwenhuizen wrote: v2: Reuse the macro for bind & delete. Note that may not be able to share the delete long-term as pipe_compute_state contains members not in pipe_shader_state,

[Mesa-dev] [PATCH] glsl: make sure that interpolateAt arguments are variables

In the case of a constant, it might have been propagated through and variable_referenced() returns NULL. Error out in that case. Fixes 3 dEQP tests: dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_sample.negative.interpolate_constant

[Mesa-dev] [PATCH] nv50/ir: avoid asserts when the state tracker feeds us bogus inputs

INTERP is defined (by me) to have to have a INPUT source. However the state tracker does not always obey this. This happens due to varying packing logic introducing additional mov's which can't always be undone. Instead of just giving up, we instead try harder to find the original input. This

Re: [Mesa-dev] [PATCH 2/2] i965: check each field separately in backend_end::equals()

Samuel Iglesias Gonsálvez writes: > Extra bits required to make room for the df field of the union don't get > initialized in all codepaths, so backend_reg comparisons done using > memcmp() can basically return random results. Check field by field to > avoid this. > >

Re: [Mesa-dev] [PATCH 1/2] i965: Enable ES 3.2 sample shading extensions.

I think it's more than 8... for example, these 6 fail for me as well: dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_sample.negative.interpolate_struct_member,Fail

Re: [Mesa-dev] [PATCH 2/3] nir/algebraic: support for power-of-two optimizations

On Thu, May 12, 2016 at 8:12 PM, Matt Turner wrote: > On Tue, May 10, 2016 at 11:57 AM, Rob Clark wrote: > > From: Rob Clark > > > > Some optimizations, like converting integer multiply/divide into left/ > > right shifts, have

Re: [Mesa-dev] [PATCH 2/3] nir/algebraic: support for power-of-two optimizations

On Tue, May 10, 2016 at 11:57 AM, Rob Clark wrote: > From: Rob Clark > > Some optimizations, like converting integer multiply/divide into left/ > right shifts, have additional constraints on the search expression. > Like requiring that a variable is

Re: [Mesa-dev] [PATCH v2 19/30] i965/fs: add shuffle_64bit_data_for_32bit_write helper

Samuel Iglesias Gonsálvez writes: > From: Iago Toral Quiroga > > This does the inverse operation of shuffle_32bit_load_result_to_64bit_data > and we will use it when we need to write 64-bit data in the layout expected > by untyped write messages. > > v2

Re: [Mesa-dev] [PATCH v2 11/30] i965/fs: add shuffle_32bit_load_result_to_64bit_data helper

Samuel Iglesias Gonsálvez writes: > From: Iago Toral Quiroga > > There will be a few places where we need to shuffle the result of a 32-bit > load into valid 64-bit data, so extract this logic into a separate helper > that we can reuse. > > The shuffling

Re: [Mesa-dev] [PATCH 2/3] nir/algebraic: support for power-of-two optimizations

On Tue, May 10, 2016 at 11:57 AM, Rob Clark wrote: > From: Rob Clark > > Some optimizations, like converting integer multiply/divide into left/ > right shifts, have additional constraints on the search expression. > Like requiring that a variable

[Mesa-dev] [PATCH] st/mesa: flip y coordinate of interpolateAtOffset for winsys

This fixes a few dEQP tests like dEQP-GLES31.functional.shaders.multisample_interpolation.interpolate_at_offset.no_qualifiers.default_framebuffer Signed-off-by: Ilia Mirkin --- src/mesa/state_tracker/st_glsl_to_tgsi.cpp | 24 ++-- 1 file changed, 22

Re: [Mesa-dev] [PATCH 04/17] nir: add lowering pass for y-transform

On Mon, May 9, 2016 at 12:33 PM, Rob Clark wrote: > From: Rob Clark > > Signed-off-by: Rob Clark > Reviewed-by: Connor Abbott > --- > src/compiler/Makefile.sources| 1 + >

[Mesa-dev] [PATCH] gallivm: eliminate a unnecessary AND with unorm lerps

From: Roland Scheidegger Instead of doing a add and then mask out the upper bits, we can simply do a add with a half wide type (this, of course, assumes the hw can actually do it...), so we'll get the required zero in the upper bits automatically. ---

Re: [Mesa-dev] [PATCH 1/2] i965: Enable ES 3.2 sample shading extensions.

I just finished crawling through this code and I'm pretty sure we do mostly the right thing for ES. I'll be even more sure after my series lands. Reviewed-by: Jason Ekstrand On Thu, May 12, 2016 at 6:31 PM, Kenneth Graunke wrote: > This enables: >

Re: [Mesa-dev] [PATCH 3/4] i965: Combine Gen4-7 and Gen8+ state base address emitters.

On Wed, Apr 27, 2016 at 5:24 PM, Kenneth Graunke wrote: > We're about to start calling it directly, and this means the callers > won't have to think about generations. > > Signed-off-by: Kenneth Graunke > --- >

Re: [Mesa-dev] [PATCH] i965: Add support for GL_ARB_cull_distance

On Thursday, May 12, 2016 5:39:02 PM PDT Kristian Høgsberg wrote: > From: Kristian Høgsberg Kristensen > > This applies on top of Tobias series. > > Signed-off-by: Kristian Høgsberg Kristensen > --- >

[Mesa-dev] [PATCH v2 08/14] radeonsi: Store inputs to memory when not using a TCS.

We need to copy the VS outputs to memory. I decided to do this using a shader key, as the value depends on other shaders. I also switch the fixed function TCS over to monolithic, as otherwisze many of the user SGPR's need to be passed to the epilog, which increases register pressure, or

[Mesa-dev] [PATCH v2 14/14] radeonsi: Allow TES distribution between shader engines.

Setting 028B6C_DISTRIBUTION_MODE to a non-zero value and either setting 028B6C_NUM_DS_WAVES_PER_SIMD to a non-zero value or storing a zero control word hang my card. The R_028B50_VGT_TESS_DISTRIBUTION value is copied from amdgpu-pro. Smaller values in the ACCUM fields seem to decrease the

[Mesa-dev] [PATCH v2 12/14] radeonsi: Use barrier instructions for TCS barriers.

With potentially more than 1 wave working on a patch we need the barrier. Also adds a barrier before loading the tessellation factors to write them to the TF ring. Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Nicolai Hähnle ---

[Mesa-dev] [PATCH v2 07/14] radeonsi: Add offchip buffer address calculation.

Instead of creating a memory area per patch and per vertex, we put the same attribute of every vertex & patch together. Most loads and stores access the same attribute across all lanes, only for different patches and vertices. For the TCS this results in tightly packed data for 4-component

[Mesa-dev] [PATCH v2 04/14] radeonsi: Add buffer load functions.

v2: - Use llvm.admgcn.buffer.load instrinsics for new LLVM. - Code style fixes. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_shader.c | 115 +++ 1 file changed, 115 insertions(+) diff --git

[Mesa-dev] [PATCH v2 13/14] radeonsi: Process multiple patches per threadgroup.

Using more than 1 wave per threadgroup does increase performance generally. Not using too many patches per threadgroup also increases performance. Both catalyst and amdgpu-pro seem to use 40 patches as their maximum, but I haven't really seen any performance increase from limiting the number of

[Mesa-dev] [PATCH v2 06/14] radeonsi: Add user SGPR for the layout of the offchip buffer.

Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_shader.c | 3 +++ src/gallium/drivers/radeonsi/si_shader.h | 12 ++-- src/gallium/drivers/radeonsi/si_state_draw.c | 9 +++--

[Mesa-dev] [PATCH v2 05/14] radeonsi: Use correct parameter index for LS_OUT_LAYOUT.

This happens to be in the right position, but that changes when TCS/TES get new parameters. Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_shader.h | 7 --- 1 file changed, 4 insertions(+),

[Mesa-dev] [PATCH v2 01/14] radeonsi: Add buffer for offchip storage between TCS and TES.

The buffer is quite large, but should only be allocated if the application uses tessellation. Most non-games don't. v2: - Use the correct register for SI. - Add define for block size. Signed-off-by: Bas Nieuwenhuizen --- src/gallium/drivers/radeonsi/si_pipe.c

[Mesa-dev] [PATCH v2 10/14] radeonsi: Remove LDS layout user SGPR's from TES.

They are unused. Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_shader.c | 4 +--- src/gallium/drivers/radeonsi/si_shader.h | 15 ---

[Mesa-dev] [PATCH v2 02/14] radeonsi: Add offchip tessellation parameters.

Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_shader.c| 28 - src/gallium/drivers/radeonsi/si_shader.h| 3 ++-

[Mesa-dev] [PATCH v2 11/14] radeonsi: Enable dynamic HS.

This allows running the TES on different CU's than the TCS which results in performance improvements. Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_shader.c| 11 ---

[Mesa-dev] [PATCH v2 03/14] radeonsi: Define build_tbuffer_store_dwords earlier to support new users.

Signed-off-by: Bas Nieuwenhuizen Reviewed-by: Nicolai Hähnle --- src/gallium/drivers/radeonsi/si_shader.c | 138 +++ 1 file changed, 69 insertions(+), 69 deletions(-) diff --git

[Mesa-dev] [PATCH v2 09/14] radeonsi: Use buffer loads and stores for passing data from TCS to TES.

We always try to use 4-component loads, as LLVM does not combine loads and they bypass the L1 cache. We can't use a similar strategy for stores and this is especially notable with the tess factors, as they are often set with separate MOV's per component in the TGSI. We keep storing to LDS and

[Mesa-dev] [PATCH v2 00/14] radeonsi: Offchip tessellation

I fixed the issues pointed out by Nicolai and Michel. For convenience a branch is available at https://github.com/BNieuwenhuizen/mesa/tree/si-offchip-tess-v2 Please review. - Bas Bas Nieuwenhuizen (14): radeonsi: Add buffer for offchip storage between TCS and TES. radeonsi: Add offchip

[Mesa-dev] [PATCH 1/2] i965: Enable ES 3.2 sample shading extensions.

This enables: - GL_OES_sample_shading - GL_OES_sample_variables - GL_OES_shader_multisample_interpolation We pass all the CTS tests, and all but 8 of the dEQP-GLES31 tests. Half of the failing dEQP tests appear to be broken tests; the other four still need investigating but cover an obscure

[Mesa-dev] [PATCH 2/2] i965: Enable GL_ARB_ES3_1_compatibility.

There are almost no tests in any test suite, but what little I've found seems to work. Ilia believes everything is in place. Signed-off-by: Kenneth Graunke --- src/mesa/drivers/dri/i965/intel_extensions.c | 1 + 1 file changed, 1 insertion(+) diff --git

[Mesa-dev] [Bug 95374] ARK:survival of the fittest fails when GL4.3 is enabled.

https://bugs.freedesktop.org/show_bug.cgi?id=95374 Bug ID: 95374 Summary: ARK:survival of the fittest fails when GL4.3 is enabled. Product: Mesa Version: git Hardware: Other OS: All Status: NEW

Re: [Mesa-dev] GBM backend dynamic dispatch method

2016-05-12 17:39 GMT+08:00 Michel Dänzer : > On 12.05.2016 17:58, Yu, Qiang wrote: > > Oh, what a crazy idea. So you mean it can work like this? > > > > 1. use the libgbm/gbm_dri/libEGL/libGLES from mesa which will load > > radeonsi_dri.so > > > > 2. libGL/amdgpu_dri.so from

Re: [Mesa-dev] [PATCH v2 09/30] i965/fs: fix copy/constant propagation regioning checks

Samuel Iglesias Gonsálvez writes: > From: Iago Toral Quiroga > > We were not accounting for subreg_offset in the check for the start > of the region. > > Also, fs_reg::regs_read() already takes the stride into account, so we > should not multiply its

[Mesa-dev] [PATCH] i965: Add support for GL_ARB_cull_distance

From: Kristian Høgsberg Kristensen This applies on top of Tobias series. Signed-off-by: Kristian Høgsberg Kristensen --- src/mesa/drivers/dri/i965/brw_compiler.h | 2 ++ src/mesa/drivers/dri/i965/brw_vs.c | 4

Re: [Mesa-dev] [PATCH v2 07/30] i965/fs: fix copy propagation of partially invalidated entries

Samuel Iglesias Gonsálvez writes: > From: Iago Toral Quiroga > > We were not invalidating entries with a src that reads more than one register > when we find writes that overwrite any register read by entry->src after > the first. This leads to incorrect

Re: [Mesa-dev] [PATCH v2 03/30] i965/fs: Fix copy propagation of load payload for double operands

Samuel Iglesias Gonsálvez writes: > From: Iago Toral Quiroga > > Specifically, consider the size of the data type of the operand to compute > the number of registers written. > > v2 (Sam): > - Fix line width (Jordan). > - Add an assert (Jordan). > - Use

Re: [Mesa-dev] [PATCH v2 00/15] Add ARB_vertex_attrib_64bit for i965 scalar (gen8+)

On Thursday, May 12, 2016 8:28:06 PM PDT Antia Puentes wrote: > Hello, > > the following series is a resend of the implementation for the > ARB_vertex_attrib_64bit extension on the i965 scalar backend (gen8+). > > This resend includes all the feedback received to v1 plus: > > * Minor changes

Re: [Mesa-dev] [PATCH v2 00/30] Finishing arb_gpu_shader_fp64 support to the i965 scalar backend

On Thursday, May 12, 2016 1:35:37 PM PDT Samuel Iglesias Gonsálvez wrote: > Hi, > > this version includes all the feedback received to v1 plus a few new > patches (22-27) that deal with 64bit URB read/writes, which was > missing in v1. Below is a list of patches that still need to get the Rb: I

Re: [Mesa-dev] [PATCH 04/17] nir: add lowering pass for y-transform

On Thu, May 12, 2016 at 7:11 PM, Kenneth Graunke wrote: > On Monday, May 9, 2016 3:33:52 PM PDT Rob Clark wrote: >> From: Rob Clark >> >> Signed-off-by: Rob Clark >> Reviewed-by: Connor Abbott >>

[Mesa-dev] [PATCH 1/8] i965: Move brw_get_rb_for_slice to brw_meta_util

--- src/mesa/drivers/dri/i965/brw_context.h | 5 --- src/mesa/drivers/dri/i965/brw_meta_updownsample.c | 45 +- src/mesa/drivers/dri/i965/brw_meta_util.c | 46 +++ src/mesa/drivers/dri/i965/brw_meta_util.h | 5 +++ 4 files

[Mesa-dev] [PATCH 6/8] i965: Use blorp for all updownsample blits

We used to use a meta path because blorp didn't support 16x MSAA. Now it does, so we don't need the meta paths anymore. --- src/mesa/drivers/dri/i965/Makefile.sources| 1 - src/mesa/drivers/dri/i965/brw_context.h | 8 -- src/mesa/drivers/dri/i965/brw_meta_stencil_blit.c |

[Mesa-dev] [PATCH 7/8] i965: Use blorp for all stencil blits

We used to use a meta path because blorp didn't support 16x MSAA. Now it does, so we don't need the meta paths anymore. --- src/mesa/drivers/dri/i965/Makefile.sources| 1 - src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 4 - src/mesa/drivers/dri/i965/brw_context.h |

[Mesa-dev] [PATCH 0/8] i965: Stop using brw_meta for blits and clears

Now that blorp is up-and-running on gen9, there's not much stopping us from using blorp basically everywhere on gen6+. The only real problem is 16x MSAA. This little series adds 16x MSAA support to blorp and starts using it for practically everything. Jason Ekstrand (8): i965: Move

[Mesa-dev] [PATCH 5/8] i965/blorp: Add support for 16x MSAA

--- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 77 +++- 1 file changed, 76 insertions(+), 1 deletion(-) diff --git a/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp b/src/mesa/drivers/dri/i965/brw_blorp_blit.cpp index 2fdcc64..28a7ed4 100644 ---

[Mesa-dev] [PATCH 4/8] i965: move brw_meta_set_fast_clear_color to brw_meta_util.c

--- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 64 - src/mesa/drivers/dri/i965/brw_meta_util.c | 63 2 files changed, 63 insertions(+), 64 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c

[Mesa-dev] [PATCH 2/8] i965: Move brw_is_color_fast_clear_compatible to brw_meta_util

--- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 59 src/mesa/drivers/dri/i965/brw_meta_util.c | 61 + 2 files changed, 61 insertions(+), 59 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c

[Mesa-dev] [PATCH 8/8] i965: Use blorp for all clears

We used to use a meta path on gen8 but we haven't since c7cf17ae758. We might as well delete the meta path since blorp works on all gens. --- src/mesa/drivers/dri/i965/Makefile.sources | 1 - src/mesa/drivers/dri/i965/brw_clear.c | 8 - src/mesa/drivers/dri/i965/brw_context.c

[Mesa-dev] [PATCH 3/8] i965; Move brw_meta_get_*_rect to brw_meta_util.c

--- src/mesa/drivers/dri/i965/brw_meta_fast_clear.c | 180 src/mesa/drivers/dri/i965/brw_meta_util.c | 180 2 files changed, 180 insertions(+), 180 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_meta_fast_clear.c

[Mesa-dev] [PATCH 30/28] i965/blorp: Stop doing f2i(i2f(sample_id))

NIR gets kind of awkward when you have a 3-component vector with two floats and one int. This led to us accidentally going through float for the sample index. It doesn't hurt anything but it also isn't needed. --- src/mesa/drivers/dri/i965/brw_blorp_blit.cpp | 36 ++-- 1

Re: [Mesa-dev] [PATCH v2 00/30] Finishing arb_gpu_shader_fp64 support to the i965 scalar backend

Samuel Iglesias Gonsálvez writes: > Hi, > > this version includes all the feedback received to v1 plus a few new > patches (22-27) that deal with 64bit URB read/writes, which was > missing in v1. Below is a list of patches that still need to get the Rb: > > [PATCH v2 02/30]

Re: [Mesa-dev] [PATCH 04/17] nir: add lowering pass for y-transform

On Monday, May 9, 2016 3:33:52 PM PDT Rob Clark wrote: > From: Rob Clark > > Signed-off-by: Rob Clark > Reviewed-by: Connor Abbott > --- > src/compiler/Makefile.sources| 1 + > src/compiler/nir/nir.h

[Mesa-dev] XDC 2016 : Call for paper

Hello, I have the pleasure to announce that the X.org Developer Conference 2016 will be held in Helsinki from September 21 to September 23. The venue is located at Haaga-Helia university[0], next to the Pasila station. The official page for the event is http://www.x.org/wiki/Events/XDC2016

Re: [Mesa-dev] [PATCH v2 11/15] glsl/linker: dvec3/dvec4 may consume twice input vertex attributes

On Thursday, May 12, 2016 8:28:17 PM PDT Antia Puentes wrote: > From: "Juan A. Suarez Romero" > > From the GL 4.5 core spec, section 11.1.1 (Vertex Attributes): > > "A program with more than the value of MAX_VERTEX_ATTRIBS > active attribute variables may fail to link,

Re: [Mesa-dev] [PATCH 5/5] glsl: add unit tests data vertex/expected outcome for unitialized warning

This is a good set, but, based on some of the previous issues, I think a couple more tests would be good. 1. Verify this doesn't generate any warnings void f(out float x); out float y; void main() { float will_be_defined; f(will_be_defined); y = will_be_defined; } 2. Verify this

Re: [Mesa-dev] [PATCH 3/5] glsl: add just-log option for the standalone compiler.

On 05/10/2016 12:13 AM, Alejandro Piñeiro wrote: > Add an option in order to ask to just print the InfoLog, without any > header or separator. Useful if we want to use the standalone compiler > to track only the warning/error messages. > --- > src/compiler/glsl/main.cpp | 20

Re: [Mesa-dev] [PATCH 0/5] Resubmit: uninitialized warning fix + unit tests

Patches 1, 2, and 4 are Reviewed-by: Ian Romanick I'm sending some comments on the other two. On 05/10/2016 12:13 AM, Alejandro Piñeiro wrote: > This is a resubmit of the pending patches related with the uninitialized > warning, after two weeks since last comment. >

Re: [Mesa-dev] [PATCH 1/3] glx: Implement the libglvnd interface.

On Thu, 2016-05-12 at 19:58 +0100, Emil Velikov wrote: > > In dispatch_ChooseFBConfigSGIX, if AddFBConfigsMapping fails, should it use > > free or XFree to free the memory? > > > In theory it should be XFree(). In practise that one has been a > wrapper around free() for a long time so I've went

[Mesa-dev] [RFC PATCH] clover: add LLVM version to device and platform version

Code generation (kernel compilation) may sometimes hit LLVM-specific bugs. Adding the used LLVM version to the version string may make bug triaging easier. Signed-off-by: Giuseppe Bilotta --- configure.ac | 2 +-

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