Re: [Mesa-dev] [PATCH 3/4] i965/tex_image: Reference the renderbuffer miptree in setTexBuffer2

On Tue, Sep 12, 2017 at 04:23:04PM -0700, Jason Ekstrand wrote: > The old code made a new miptree that referenced the same BO as the > renderbuffer and just trusted in the memory aliasing to work. There are > only two ways in which the new miptree is liable to differ from the one > in the

[Mesa-dev] [PATCH] radv/ac: bump params array for image atomic comp swap

From: Dave Airlie For the comp_swap case this was overflowing and crashing sometimes. Fixes: dEQP-VK.image.atomic_operations.compare_exchange.* Cc: "17.2" Signed-off-by: Dave Airlie ---

Re: [Mesa-dev] [PATCH] gallium/{r600, radeonsi}: Fix segfault with color format (v2)

Do you mean delete check in u_format.c:: util_format_is_supported? Could you please explain more? On Wed, Sep 13, 2017 at 1:32 AM, Marek Olšák wrote: > On Wed, Sep 13, 2017 at 12:31 AM, Marek Olšák wrote: > > I think we shouldn't be getting PIPE_FORMAT_COUNT

[Mesa-dev] [PATCH] radv/gfx9: fix image resource handling.

From: Dave Airlie GFX9 changes how images are layed out, so this needs updating. Fixes: dEQP-VK.query_pool.statistics_query.* CC: "17.2" --- src/amd/vulkan/radv_image.c | 27

[Mesa-dev] [PATCH] radv/gfx9: set mip0-depth correctly for 2d arrays/3d images

From: Dave Airlie This field covers the whole resource. Fixes: dEQP-VK.pipeline.image.suballocation.sampling_type.combined.view_type.3d.format.* dEQP-VK.texture.filtering.3d.combinations.* Cc: "17.2" Signed-off-by: Dave Airlie

Re: [Mesa-dev] [RFC] NIR serialization

I think the arguments for doing NIR serialization and deseriallization are pretty persuasive. I've started a skeleton of a NIR serialization implementation at https://cgit.freedesktop.org/~cwabbott0/mesa/log/?h=nir-serialize. Note that filling this in by following nir_clone should be mostly

Re: [Mesa-dev] [PATCH 1/2] radv/nir: call opt_remove_phis after trivial continues.

On 13/09/17 13:52, Timothy Arceri wrote: On 13/09/17 13:48, Dave Airlie wrote: On 13 September 2017 at 13:42, Timothy Arceri wrote: On 13/09/17 12:57, Dave Airlie wrote: From: Dave Airlie With the shaders in the ssao demo, the nir_opt_if

Re: [Mesa-dev] [PATCH 1/2] radv/nir: call opt_remove_phis after trivial continues.

On 13/09/17 13:48, Dave Airlie wrote: On 13 September 2017 at 13:42, Timothy Arceri wrote: On 13/09/17 12:57, Dave Airlie wrote: From: Dave Airlie With the shaders in the ssao demo, the nir_opt_if wasn't working properly without this, after

Re: [Mesa-dev] [PATCH 1/2] radv/nir: call opt_remove_phis after trivial continues.

On 13 September 2017 at 13:42, Timothy Arceri wrote: > > On 13/09/17 12:57, Dave Airlie wrote: >> >> From: Dave Airlie >> >> With the shaders in the ssao demo, the nir_opt_if wasn't >> working properly without this, after this the if gets optimised >>

Re: [Mesa-dev] [PATCH 2/2] [rfc] nir: bump unroll instruction count to 96.

On 13/09/17 12:57, Dave Airlie wrote: From: Dave Airlie This gets the ssao demo from 400->440 fps on radv with the previous patch. Now the demo does a 0->32 loop across a ubo with 32 members, I don't know if we still have that sort of information available about the UBO in

Re: [Mesa-dev] [PATCH] i965 : optimized bucket index calculation

>-Original Message- >From: Matt Turner [mailto:matts...@gmail.com] > >On Tue, Sep 12, 2017 at 10:19 AM, Ian Romanick wrote: >> On 09/12/2017 02:40 AM, Marathe, Yogesh wrote: >>> Hi Jason, >>> >>> >>> >>> On the asserts you’ve mentioned below, I assume we need to add

Re: [Mesa-dev] [PATCH 1/2] radv/nir: call opt_remove_phis after trivial continues.

On 13/09/17 12:57, Dave Airlie wrote: From: Dave Airlie With the shaders in the ssao demo, the nir_opt_if wasn't working properly without this, after this the if gets optimised so that loop unrolling gets called. (loop unrolling fails due to instruction count, but at

Re: [Mesa-dev] [PATCH 00/10] swr: update rasterizer

Reviewed-by: Bruce Cherniak > On Sep 11, 2017, at 2:28 PM, Tim Rowley wrote: > > Mostly some api changes, plus making the cpu topology code a bit more > robust in the face of some odd configurations seen in virtualized > environments. > >

[Mesa-dev] [PATCH 2/2] [rfc] nir: bump unroll instruction count to 96.

From: Dave Airlie This gets the ssao demo from 400->440 fps on radv with the previous patch. Now the demo does a 0->32 loop across a ubo with 32 members, I don't know if we still have that sort of information available about the UBO in question at this stage. Maybe someone

[Mesa-dev] [PATCH 1/2] radv/nir: call opt_remove_phis after trivial continues.

From: Dave Airlie With the shaders in the ssao demo, the nir_opt_if wasn't working properly without this, after this the if gets optimised so that loop unrolling gets called. (loop unrolling fails due to instruction count, but at least it gets to do that.) Signed-off-by:

[Mesa-dev] [Bug 102639] BadLength (poly request too large or internal Xlib length erro

https://bugs.freedesktop.org/show_bug.cgi?id=102639 thomas changed: What|Removed |Added Status|NEW |RESOLVED

Re: [Mesa-dev] [PATCH] radeonsi/uvd: fix interlaced video buffer height alignment

On 2017-09-12 02:39 PM, Christian König wrote: The problem is: In si_uvd.c struct pipe_video_buffer *si_video_buffer_create(struct pipe_context *pipe, const struct pipe_video_buffer *tmpl) { struct pipe_video_buffer template; template.height =

Re: [Mesa-dev] [Intel-gfx] [PATCH 1/2] drm/i915/kbl: Remove unused Kabylake pci ids

On Tue, Sep 12, 2017 at 08:30:47PM +, Paulo Zanoni wrote: > Em Seg, 2017-09-11 às 10:10 -0700, Rodrigo Vivi escreveu: > > On Mon, Sep 11, 2017 at 04:11:33PM +, Anuj Phogat wrote: > > > See Mesa commits: ebc5ccf and b2dae9f > > > > I believe we need to be in sync between multiple gfx stack

Re: [Mesa-dev] [RFC] NIR serialization

On 13/09/17 03:00, Ian Romanick wrote: On 09/11/2017 09:44 PM, Timothy Arceri wrote: On 12/09/17 14:23, Ian Romanick wrote: On 09/08/2017 01:59 AM, Kenneth Graunke wrote: On Thursday, September 7, 2017 4:26:04 PM PDT Jordan Justen wrote: On 2017-09-06 14:12:41, Daniel Schürmann wrote:

Re: [Mesa-dev] [PATCH] util: Query build-id by symbol address, not library name

On Tue, Sep 12, 2017 at 5:05 PM, Chad Versace wrote: > This patch renames build_id_find_nhdr() to > build_id_find_nhdr_for_addr(), and changes it to never examine the > library name. > > Tested on Fedora by confirming that build_id_get_data() returns the same > build-id as the

[Mesa-dev] [PATCH] util: Query build-id by symbol address, not library name

This patch renames build_id_find_nhdr() to build_id_find_nhdr_for_addr(), and changes it to never examine the library name. Tested on Fedora by confirming that build_id_get_data() returns the same build-id as the file(1) tool. For BSD, I confirmed that the API used (dladdr() and struct Dl_info)

Re: [Mesa-dev] [RFC] NIR serialization

On Tue, Sep 12, 2017 at 4:39 PM, Jason Ekstrand wrote: > On Tue, Sep 12, 2017 at 11:09 AM, Jason Ekstrand > wrote: >> >> On Tue, Sep 12, 2017 at 10:12 AM, Ian Romanick >> wrote: >>> >>> On 09/11/2017 11:17 PM, Kenneth Graunke

Re: [Mesa-dev] [PATCH] (UNTESTED) virgl: filter out 2D constant file accesses and declarations

On 13 September 2017 at 06:34, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > Sorry for the mess. > > I suspect something like this patch is needed. Is this sufficient to > fix the problem? Oops I missed this, I just posted almost identical patch,

Re: [Mesa-dev] [PATCH 4/4] radeonsi: rename variable to clarify its meaning

For the series: Reviewed-by: Marek Olšák Marek On Mon, Sep 11, 2017 at 5:06 PM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > --- > src/gallium/drivers/radeonsi/si_state.c | 20 ++-- > 1 file changed, 10

Re: [Mesa-dev] [PATCH 2/2] radeonsi: remove SET_PREDICATION workaround on newer firmware

For the series: Reviewed-by: Marek Olšák Marek On Mon, Sep 11, 2017 at 5:01 PM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > We need to keep the workaround for older firmware, though. > --- >

Re: [Mesa-dev] [PATCH 1/8] nir: add is_xfb_only to nir variable

Whoop subject should be: nir: add always_active_io to nir variable On 13/09/17 09:37, Timothy Arceri wrote: Will be used in nir link pass to decided if we can remove a varying or not. --- src/compiler/glsl/glsl_to_nir.cpp | 1 + src/compiler/nir/nir.h| 10 ++ 2 files

Re: [Mesa-dev] [PATCH 1.5/4] [RFC] ac/addrlib: relax an assertion

Reviewed-by: Marek Olšák Marek On Mon, Sep 11, 2017 at 3:26 PM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > --- > We hit this assertion with 3D textures on gfx9. > > I'm not aware of any 3D-texture-specific failures, but

Re: [Mesa-dev] [Mesa-stable] [PATCH 2/2] radeonsi: hard-code pixel center for interpolateAtSample without multisample buffers

For the series: Reviewed-by: Marek Olšák Marek On Mon, Sep 11, 2017 at 5:11 PM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > The GLSL rules for interpolateAtSample are unfortunate: > >"Returns the value of the input

[Mesa-dev] [PATCH 3/8] nir: add a helper for getting the bitmask for a variable's location

--- src/compiler/nir/nir.h | 31 +++ 1 file changed, 31 insertions(+) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index fab2110f619..e52a1006896 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -351,6 +351,37 @@ typedef struct

[Mesa-dev] [PATCH 4/8] nir: add some helpers for doing linking

The initial helpers as support for removing unused varyings between stages. --- src/compiler/Makefile.sources | 1 + src/compiler/nir/nir.h | 6 ++ src/compiler/nir/nir_linking_helpers.c | 136 + 3 files changed, 143 insertions(+)

[Mesa-dev] i965 NIR linking

This started out based off the work Jason did back in 2015 to add NIR linking to the Intel VK driver. It needed a reasonable amount of updates to work with the GL driver, tess, xfb, etc. As per the results in patch 8, it can provide some nice improvements despite the GLSL IR linker already doing

[Mesa-dev] [PATCH 8/8] i965: make use of nir linking

For now linking is just removing unused varyings between stages. shader-db results BDW: total instructions in shared programs: 13198288 -> 13191693 (-0.05%) instructions in affected programs: 48325 -> 41730 (-13.65%) helped: 473 HURT: 0 total cycles in shared programs: 541184926 -> 541159260

[Mesa-dev] [PATCH 1/8] nir: add is_xfb_only to nir variable

Will be used in nir link pass to decided if we can remove a varying or not. --- src/compiler/glsl/glsl_to_nir.cpp | 1 + src/compiler/nir/nir.h| 10 ++ 2 files changed, 11 insertions(+) diff --git a/src/compiler/glsl/glsl_to_nir.cpp b/src/compiler/glsl/glsl_to_nir.cpp index

[Mesa-dev] [PATCH 5/8] i965: create a brw_shader_gather_info() helper

This will help us call gather info at a later point and allow us to do some linking in nir. --- src/mesa/drivers/dri/i965/brw_program.c | 20 +--- src/mesa/drivers/dri/i965/brw_program.h | 3 +++ 2 files changed, 16 insertions(+), 7 deletions(-) diff --git

[Mesa-dev] [PATCH 7/8] i965/nir: export nir_optimize

--- src/intel/compiler/brw_nir.c | 14 +++--- src/intel/compiler/brw_nir.h | 4 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/src/intel/compiler/brw_nir.c b/src/intel/compiler/brw_nir.c index ce21c016699..a04f4af7b08 100644 --- a/src/intel/compiler/brw_nir.c +++

[Mesa-dev] [PATCH 6/8] i965: call brw_shader_gather_info() from the callers of brw_create_nir()

This will allow us to insert a nir linking step in brw_link_shader(). --- src/mesa/drivers/dri/i965/brw_link.cpp | 14 ++ src/mesa/drivers/dri/i965/brw_program.c | 11 --- 2 files changed, 18 insertions(+), 7 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_link.cpp

[Mesa-dev] [PATCH 2/8] glsl: mark xfb varyings as always active

This will be used by the nir linking pass so that we don't remove otherwise unused varyings. --- src/compiler/glsl/link_varyings.cpp | 3 +++ 1 file changed, 3 insertions(+) diff --git a/src/compiler/glsl/link_varyings.cpp b/src/compiler/glsl/link_varyings.cpp index 528506fd0eb..656bf79ca9d

Re: [Mesa-dev] [PATCH 4/4] i965: Use prepare_external instead of make_shareable in setTexBuffer2

Adding people who may have some shot at understanding this stuff On Tue, Sep 12, 2017 at 4:23 PM, Jason Ekstrand wrote: > The setTexBuffer2 hook from GLX is used to implement glxBindTexImageEXT > which has tighter restrictions than just "it's shared". In particular, > it

[Mesa-dev] [PATCH] virgl: drop const dimensions on first block.

From: Dave Airlie The virgl protocol version of tgsi doesn't handle this yet, transform it back to the old ways. Fixes: 41e342d5 tgsi/ureg: always emit constants (and their decls) as 2D Signed-off-by: Dave Airlie ---

[Mesa-dev] [PATCH 4/4] i965: Use prepare_external instead of make_shareable in setTexBuffer2

The setTexBuffer2 hook from GLX is used to implement glxBindTexImageEXT which has tighter restrictions than just "it's shared". In particular, it says that any rendering to the image while it is bound causes the contents to become undefined. This means that we can do whatever aux tracking we

[Mesa-dev] [PATCH 3/4] i965/tex_image: Reference the renderbuffer miptree in setTexBuffer2

The old code made a new miptree that referenced the same BO as the renderbuffer and just trusted in the memory aliasing to work. There are only two ways in which the new miptree is liable to differ from the one in the renderbuffer and neither of them matter: 1) It may have a different target.

[Mesa-dev] [PATCH 2/4] i965: Reset miptree aux state on update_image_buffer

When we get a miptree in through glxBindImageEXT, we don't know the current aux state so we have to assume the worst-case. If the image gets recreated, everything is fine because miptreecreate_for_dri_image sets it to the default. However, if our miptree is recycled, then we may have stale

[Mesa-dev] [PATCH 1/4] intel/isl: Add a drm_modifier_get_default_aux_state helper

--- src/intel/isl/isl.h | 20 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 3 +-- 2 files changed, 21 insertions(+), 2 deletions(-) diff --git a/src/intel/isl/isl.h b/src/intel/isl/isl.h index e77d7ee..d30b2de 100644 --- a/src/intel/isl/isl.h

[Mesa-dev] [PATCH 0/4] i965: Properly handle CCS in glxBindTexImageEXT

This little series fixes (I think!) a bug in glxBindTexImageEXT when using modifiers. Before, we were using make_shareable which resolves everything and then permanently throws away any aux information. In the world of modifiers, that aux information is suddenly important. This was causing

Re: [Mesa-dev] [PATCH] gallium/{r600, radeonsi}: Fix segfault with color format (v2)

On Wed, Sep 13, 2017 at 12:31 AM, Marek Olšák wrote: > I think we shouldn't be getting PIPE_FORMAT_COUNT in > is_format_supported in the first place, and therefore drivers don't > have to work around it. Or any other invalid formats, for that matter. Marek > > Marek > > On

Re: [Mesa-dev] [PATCH] gallium/{r600, radeonsi}: Fix segfault with color format (v2)

I think we shouldn't be getting PIPE_FORMAT_COUNT in is_format_supported in the first place, and therefore drivers don't have to work around it. Marek On Tue, Sep 12, 2017 at 10:38 PM, Denis Pauk wrote: > Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102552 > >

[Mesa-dev] [PATCH 2/2] radv: handle GFX9 1D textures

From: Dave Airlie As GFX9 can't handle 1D depth textures, radeonsi and apparantly pro just update all 1D textures to 2D, and work around it. This ports the workarounds from radeonsi. Cc: "17.2" Signed-off-by: Dave Airlie

[Mesa-dev] [PATCH 1/2] radv: don't use iview for meta image width/height.

From: Dave Airlie Work out the width/height from the level manually, as on GFX9 we won't minify the iview width/height. This fixes: dEQP-VK.api.image_clearing.core.clear_color_image* on gfx9 Cc: "17.2" Signed-off-by: Dave Airlie

Re: [Mesa-dev] [PATCH 22/23] HACK: anv: Fix query of ELF build-id on ARC++

On Mon 04 Sep 2017, Tapani Pälli wrote: > > > On 09/04/2017 08:37 AM, Tapani Pälli wrote: > > > > > > On 09/02/2017 11:17 AM, Chad Versace wrote: > > > NOT FOR UPSTREAM. > > > > > > To get the driver's build-id, anv_physical_device_init_uuids() searches > > > the current process for an ELF

Re: [Mesa-dev] [PATCH] r600/sb: remove superfluos assert

On Tue, 12 Sep 2017 19:25:18 +0200, Vadim Girlin wrote: On 09/12/2017 12:49 PM, Gert Wollny wrote: Am Dienstag, den 12.09.2017, 09:56 +0300 schrieb Vadim Girlin: On 09/11/2017 07:09 PM, Emil Velikov wrote: Anyway, if num_arrays is 0 there, I suspect it can be a

[Mesa-dev] [PATCH 0/3] RadeonSI sync_file fences

Hi, This series adds support for sync_file fences, enabling EGL_ANDROID_native_fence_sync. Dependencies: Kernel patches (based on drm-next): drm/syncobj: extract two helpers from drm_syncobj_create drm/syncobj: add a new helper drm_syncobj_get_fd drm/amdgpu: add FENCE_TO_HANDLE

[Mesa-dev] [PATCH 3/3] radeonsi: implement sync_file import/export

From: Marek Olšák --- src/gallium/drivers/radeon/r600_pipe_common.c | 77 ++- src/gallium/drivers/radeonsi/si_pipe.c| 4 +- 2 files changed, 79 insertions(+), 2 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c

[Mesa-dev] [PATCH 2/3] winsys/amdgpu: implement sync_file import/export

From: Marek Olšák syncobj is used internally for interactions with command submission. --- src/gallium/drivers/radeon/radeon_winsys.h | 12 +++ src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 115 +++-- src/gallium/winsys/amdgpu/drm/amdgpu_cs.h | 18

[Mesa-dev] [PATCH 1/3] ac: add radeon_info::has_sync_file

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 1 + src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeon/r600_pipe_common.c | 1 + 3 files changed, 3 insertions(+) diff --git a/src/amd/common/ac_gpu_info.c

Re: [Mesa-dev] [PATCH] gallium/{r600, radeonsi}: Fix segfault with color format

Thank you, i have sent new patch version. Current call sequence in backward order: r600 => * r600_state_common.c::r600_translate_texformat and r600_state_common.c::r600_translate_colorformat is called from evergreen_state::r600_is_colorbuffer_format_supported and

[Mesa-dev] [PATCH 1/3] ac: add radeon_info::has_sync_file

From: Marek Olšák --- src/amd/common/ac_gpu_info.c | 1 + src/amd/common/ac_gpu_info.h | 1 + src/gallium/drivers/radeon/r600_pipe_common.c | 1 + 3 files changed, 3 insertions(+) diff --git a/src/amd/common/ac_gpu_info.c

Re: [Mesa-dev] [RFC] NIR serialization

On Tue, Sep 12, 2017 at 11:09 AM, Jason Ekstrand wrote: > On Tue, Sep 12, 2017 at 10:12 AM, Ian Romanick > wrote: > >> On 09/11/2017 11:17 PM, Kenneth Graunke wrote: >> > On Monday, September 11, 2017 9:23:05 PM PDT Ian Romanick wrote: >> >> On

[Mesa-dev] [PATCH] gallium/{r600, radeonsi}: Fix segfault with color format (v2)

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=102552 v2: Patch cleanup proposed by Nicolai Hähnle. * deleted changes in si_translate_texformat. Cc: Nicolai Hähnle Cc: Ilia Mirkin --- src/gallium/auxiliary/util/u_format.c| 4

Re: [Mesa-dev] [PATCH] (UNTESTED) virgl: filter out 2D constant file accesses and declarations

FWIW, this patch should be a no-op without the offending "tgsi/ureg: always emit constants (and their decls) as 2D" commit. On 12.09.2017 22:34, Nicolai Hähnle wrote: From: Nicolai Hähnle Sorry for the mess. I suspect something like this patch is needed. Is this

[Mesa-dev] [PATCH] (UNTESTED) virgl: filter out 2D constant file accesses and declarations

From: Nicolai Hähnle Sorry for the mess. I suspect something like this patch is needed. Is this sufficient to fix the problem? Cheers, Nicolai --- src/gallium/drivers/virgl/virgl_tgsi.c | 24 1 file changed, 24 insertions(+) diff --git

Re: [Mesa-dev] [Intel-gfx] [PATCH 1/2] drm/i915/kbl: Remove unused Kabylake pci ids

Em Seg, 2017-09-11 às 10:10 -0700, Rodrigo Vivi escreveu: > On Mon, Sep 11, 2017 at 04:11:33PM +, Anuj Phogat wrote: > > See Mesa commits: ebc5ccf and b2dae9f > > I believe we need to be in sync between multiple gfx stack > components, > but I  don't believe we should remove ids. > > In the

Re: [Mesa-dev] [PATCH v2 02/12] tgsi/ureg: always emit constants (and their decls) as 2D

On Mon, Aug 28, 2017 at 3:58 AM, Nicolai Hähnle wrote: > From: Nicolai Hähnle > > Acked-by: Roland Scheidegger > Tested-by: Dieter Nützel > --- > src/gallium/auxiliary/tgsi/tgsi_ureg.c | 22

Re: [Mesa-dev] [PATCH 05/15] radv: dump the active shaders when a hang occured

On 09/12/2017 09:36 PM, Bas Nieuwenhuizen wrote: On Tue, Sep 12, 2017 at 9:30 PM, Samuel Pitoiset wrote: On 09/12/2017 09:16 PM, Bas Nieuwenhuizen wrote: On Tue, Sep 12, 2017 at 9:13 PM, Samuel Pitoiset wrote: On 09/12/2017 09:07

Re: [Mesa-dev] [PATCH 05/15] radv: dump the active shaders when a hang occured

On Tue, Sep 12, 2017 at 9:30 PM, Samuel Pitoiset wrote: > > > On 09/12/2017 09:16 PM, Bas Nieuwenhuizen wrote: >> >> On Tue, Sep 12, 2017 at 9:13 PM, Samuel Pitoiset >> wrote: >>> >>> >>> >>> On 09/12/2017 09:07 PM, Bas Nieuwenhuizen wrote:

Re: [Mesa-dev] [PATCH 05/15] radv: dump the active shaders when a hang occured

On 09/12/2017 09:16 PM, Bas Nieuwenhuizen wrote: On Tue, Sep 12, 2017 at 9:13 PM, Samuel Pitoiset wrote: On 09/12/2017 09:07 PM, Bas Nieuwenhuizen wrote: On Tue, Sep 12, 2017 at 8:57 PM, Samuel Pitoiset wrote: On 09/12/2017 08:12

Re: [Mesa-dev] [PATCH 05/15] radv: dump the active shaders when a hang occured

On Tue, Sep 12, 2017 at 9:13 PM, Samuel Pitoiset wrote: > > > On 09/12/2017 09:07 PM, Bas Nieuwenhuizen wrote: >> >> On Tue, Sep 12, 2017 at 8:57 PM, Samuel Pitoiset >> wrote: >>> >>> >>> >>> On 09/12/2017 08:12 PM, Bas Nieuwenhuizen wrote:

Re: [Mesa-dev] [PATCH 05/15] radv: dump the active shaders when a hang occured

On 09/12/2017 09:07 PM, Bas Nieuwenhuizen wrote: On Tue, Sep 12, 2017 at 8:57 PM, Samuel Pitoiset wrote: On 09/12/2017 08:12 PM, Bas Nieuwenhuizen wrote: On Tue, Sep 12, 2017 at 12:35 PM, Samuel Pitoiset wrote: Only the disassembly

Re: [Mesa-dev] [RFC] NIR serialization

On 12.09.2017 06:25, Ian Romanick wrote: On 09/07/2017 04:26 PM, Jordan Justen wrote: On 2017-09-06 14:12:41, Daniel Schürmann wrote: Hello together! Recently, we had a small discussion (off the list) about the NIR serialization, which was previously discussed in [RFC] ARB_gl_spirv and NIR

Re: [Mesa-dev] [PATCH 05/15] radv: dump the active shaders when a hang occured

On Tue, Sep 12, 2017 at 8:57 PM, Samuel Pitoiset wrote: > > > On 09/12/2017 08:12 PM, Bas Nieuwenhuizen wrote: >> >> On Tue, Sep 12, 2017 at 12:35 PM, Samuel Pitoiset >> wrote: >>> >>> Only the disassembly is currently dumped. >>> >>>

Re: [Mesa-dev] [PATCH 05/15] radv: dump the active shaders when a hang occured

On 09/12/2017 08:12 PM, Bas Nieuwenhuizen wrote: On Tue, Sep 12, 2017 at 12:35 PM, Samuel Pitoiset wrote: Only the disassembly is currently dumped. Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_debug.c | 78

Re: [Mesa-dev] [PATCH 01/15] radv: add a comment that describes the trace BO layout

On 09/12/2017 08:05 PM, Bas Nieuwenhuizen wrote: add something that the offsets are in multiple of 4 bytes? Okay. On Tue, Sep 12, 2017 at 12:35 PM, Samuel Pitoiset wrote: Signed-off-by: Samuel Pitoiset ---

Re: [Mesa-dev] [PATCH] radeonsi/uvd: fix interlaced video buffer height alignment

Am 12.09.2017 um 18:10 schrieb Leo Liu: On 09/12/2017 11:37 AM, Christian König wrote: Am 12.09.2017 um 17:32 schrieb Leo Liu: On 09/12/2017 11:23 AM, Christian König wrote: I don't think this is correct. A long long time ago I've came up with this because the firmware didn't liked what

Re: [Mesa-dev] [PATCH 15/15] radv: dump the list of enabled options when a hang occured

Okay, if you fix the few comments I sent, this series is Reviewed-by: Bas Nieuwenhuizen On Tue, Sep 12, 2017 at 12:35 PM, Samuel Pitoiset wrote: > Useful to know which debug/perftest options were enabled when > a hang report is generated. >

Re: [Mesa-dev] [PATCH 05/15] radv: dump the active shaders when a hang occured

On Tue, Sep 12, 2017 at 12:35 PM, Samuel Pitoiset wrote: > Only the disassembly is currently dumped. > > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_debug.c | 78 > ++--- > 1 file

Re: [Mesa-dev] [RFC] NIR serialization

On Tue, Sep 12, 2017 at 10:12 AM, Ian Romanick wrote: > On 09/11/2017 11:17 PM, Kenneth Graunke wrote: > > On Monday, September 11, 2017 9:23:05 PM PDT Ian Romanick wrote: > >> On 09/08/2017 01:59 AM, Kenneth Graunke wrote: > >>> On Thursday, September 7, 2017 4:26:04 PM

Re: [Mesa-dev] [PATCH 02/15] radv: save the bound pipeline pointers into the trace BO

On Tue, Sep 12, 2017 at 12:35 PM, Samuel Pitoiset wrote: > When a GPU hang is detected in radv_gpu_hang_occured() we know > which command buffer is faulty but the bound pipelines might > have been updated during the execution. > > The pointers to the radv_pipeline

Re: [Mesa-dev] [PATCH 01/15] radv: add a comment that describes the trace BO layout

add something that the offsets are in multiple of 4 bytes? On Tue, Sep 12, 2017 at 12:35 PM, Samuel Pitoiset wrote: > Signed-off-by: Samuel Pitoiset > --- > src/amd/vulkan/radv_debug.c | 6 ++ > 1 file changed, 6 insertions(+) > > diff

Re: [Mesa-dev] [PATCH 3/3] radv: clear push_constant_stages when resetting a command buffer

The series is Reviewed-by: Bas Nieuwenhuizen On Tue, Sep 12, 2017 at 7:08 PM, Samuel Pitoiset wrote: > Per the spec: > >"Resetting a command buffer is an operation that discards any >previously recorded commands and puts a command

[Mesa-dev] [Bug 102665] test_glsl_to_tgsi_lifetime.cpp:53:67: error: ‘?=>>=?UTF-8?Q?’ should be ‘?=> >=?UTF-8?Q?’ within a nested template argument list

https://bugs.freedesktop.org/show_bug.cgi?id=102665 --- Comment #4 from Vinson Lee --- In the travis build, the -std=c++11 option comes from LLVM_CXXFLAGS with llvm-3.9. Older llvm versions or builds without llvm will not have -std=c++11. -- You are receiving this mail

Re: [Mesa-dev] [PATCH] i965 : optimized bucket index calculation

On Tue, Sep 12, 2017 at 10:19 AM, Ian Romanick wrote: > On 09/12/2017 02:40 AM, Marathe, Yogesh wrote: >> Hi Jason, >> >> >> >> On the asserts you’ve mentioned below, I assume we need to add them >> after ‘bufmgr->num_buckets++’ in add_bucket() as num_buckets could be 0 >>

[Mesa-dev] [Bug 102682] vblank_mode ignored from ~/.drirc

https://bugs.freedesktop.org/show_bug.cgi?id=102682 --- Comment #3 from Gustaw Smolarczyk --- Was too fast. The passed driver name is not "loader" but "dri2". And I think it's intentional, since vblank_mode is not an option of a device driver but of the dri infrastructure.

[Mesa-dev] [Bug 102682] vblank_mode ignored from ~/.drirc

https://bugs.freedesktop.org/show_bug.cgi?id=102682 --- Comment #2 from Niklas Haas --- Verifying that your work-around does, indeed, work around the issue. -- You are receiving this mail because: You are the QA Contact for the bug. You are the assignee for the

Re: [Mesa-dev] [PATCH mesa] glsl: compile unused function out

On Tue, Sep 12, 2017 at 8:01 AM, Eric Engestrom wrote: > The function is only called from one place, which is hidden behind > the same `#ifdef DEBUG`. > > Fixes: ca73c3358c91434e68ab "glsl: Mark functions static" > Signed-off-by: Eric Engestrom

[Mesa-dev] [Bug 102682] vblank_mode ignored from ~/.drirc

https://bugs.freedesktop.org/show_bug.cgi?id=102682 --- Comment #1 from Gustaw Smolarczyk --- Hi, The problem seems to be with the `driver="radeonsi"' part (the screen attribute is not used when driver is present). It seems that there is a bug and an incorrect driver name

Re: [Mesa-dev] [PATCH] r600/sb: remove superfluos assert

On 09/12/2017 12:49 PM, Gert Wollny wrote: Am Dienstag, den 12.09.2017, 09:56 +0300 schrieb Vadim Girlin: On 09/11/2017 07:09 PM, Emil Velikov wrote: Anyway, if num_arrays is 0 there, I suspect it can be a result of some other issue. At the very least it looks like a potential performance 

Re: [Mesa-dev] [PATCH mesa] radv: compile out unused code

Reviewed-by: Bas Nieuwenhuizen On 12 Sep 2017 5:11 PM, "Eric Engestrom" wrote: Signed-off-by: Eric Engestrom --- src/amd/vulkan/radv_wsi.c | 2 ++ 1 file changed, 2 insertions(+) diff --git

Re: [Mesa-dev] [Intel-gfx] [PATCH 1/2] drm/i915/kbl: Remove unused Kabylake pci ids

On Mon, Sep 11, 2017 at 10:10 AM, Rodrigo Vivi wrote: > On Mon, Sep 11, 2017 at 04:11:33PM +, Anuj Phogat wrote: >> See Mesa commits: ebc5ccf and b2dae9f > > I believe we need to be in sync between multiple gfx stack components, > but I don't believe we should remove

Re: [Mesa-dev] [PATCH] i965 : optimized bucket index calculation

On 09/12/2017 02:40 AM, Marathe, Yogesh wrote: > Hi Jason, > > > > On the asserts you’ve mentioned below, I assume we need to add them > after ‘bufmgr->num_buckets++’ in add_bucket() as num_buckets could be 0 > initially. Another clarification on ~1%, we meant approx. 1% there, > that’s an

Re: [Mesa-dev] [PATCH] i965 : optimized bucket index calculation

On 09/08/2017 08:38 AM, Jason Ekstrand wrote: > In general, I'm very concerned about how this handles rounding > behavior. Almost everywhere, you round down when what you want to do is > round up. Also, as I said on IRC, I'd like to see some asserts in > add_bucket so that we are sure this

Re: [Mesa-dev] [RFC] NIR serialization

On 09/11/2017 11:17 PM, Kenneth Graunke wrote: > On Monday, September 11, 2017 9:23:05 PM PDT Ian Romanick wrote: >> On 09/08/2017 01:59 AM, Kenneth Graunke wrote: >>> On Thursday, September 7, 2017 4:26:04 PM PDT Jordan Justen wrote: On 2017-09-06 14:12:41, Daniel Schürmann wrote: >

[Mesa-dev] [PATCH 3/3] radv: clear push_constant_stages when resetting a command buffer

Per the spec: "Resetting a command buffer is an operation that discards any previously recorded commands and puts a command buffer in the initial state." As far I'm concerned, that flag can be changed by calling VkCmdPushConstants() (or any other functions which update it), so it should

[Mesa-dev] [PATCH 2/3] radv: add more radv_emit_XXX() helpers for the dynamic state

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_cmd_buffer.c | 117 ++- 1 file changed, 77 insertions(+), 40 deletions(-) diff --git a/src/amd/vulkan/radv_cmd_buffer.c b/src/amd/vulkan/radv_cmd_buffer.c index

[Mesa-dev] [PATCH 1/3] radv: remove useless 'cmd_buffer' param from radv_buffer_view_init()

Signed-off-by: Samuel Pitoiset --- src/amd/vulkan/radv_image.c | 5 ++--- src/amd/vulkan/radv_meta_blit2d.c | 2 +- src/amd/vulkan/radv_meta_bufimage.c | 2 +- src/amd/vulkan/radv_private.h | 3 +-- 4 files changed, 5 insertions(+), 7 deletions(-) diff

Re: [Mesa-dev] [RFC] NIR serialization

On 09/11/2017 09:44 PM, Timothy Arceri wrote: > On 12/09/17 14:23, Ian Romanick wrote: >> On 09/08/2017 01:59 AM, Kenneth Graunke wrote: >>> On Thursday, September 7, 2017 4:26:04 PM PDT Jordan Justen wrote: On 2017-09-06 14:12:41, Daniel Schürmann wrote: > Hello together! > Recently,

[Mesa-dev] [PATCH 2/3] glsl: Rename ir_constant::array_elements to ::const_elements

From: Ian Romanick The next patch will unify ::array_elements and ::components, so the name ::array_elements wouldn't be appropriate. A lot of things use the names array_elements and components, so grepping for either is pretty useless. Signed-off-by: Ian Romanick

[Mesa-dev] [PATCH 3/3] glsl: Unify ir_constant::const_elements and ::components

From: Ian Romanick There was no reason to treat array types and record types differently. Unifying them saves a bunch of code and saves a few bytes in every ir_constant. Signed-off-by: Ian Romanick --- src/compiler/glsl/glsl_to_nir.cpp

[Mesa-dev] [PATCH 1/3] glsl: Silence unused parameter warnings

From: Ian Romanick glsl/ast_type.cpp: In function ‘void merge_bindless_qualifier(YYLTYPE*, _mesa_glsl_parse_state*, const ast_type_qualifier&, const ast_type_qualifier&)’: glsl/ast_type.cpp:189:35: warning: unused parameter ‘loc’ [-Wunused-parameter]

[Mesa-dev] [Bug 102682] vblank_mode ignored from ~/.drirc

https://bugs.freedesktop.org/show_bug.cgi?id=102682 Bug ID: 102682 Summary: vblank_mode ignored from ~/.drirc Product: Mesa Version: 17.2 Hardware: Other OS: All Status: NEW Severity: normal

Re: [Mesa-dev] Is there a mesa Docker image available like on travis-ci? (was Re: [PATCH 1/2] gallium/targets/dri: Add libunwind to linker flags)

On Tuesday, 2017-09-12 17:26:43 +0200, Gert Wollny wrote: > Am Dienstag, den 12.09.2017, 12:26 +0100 schrieb Emil Velikov: > > On 12 September 2017 at 11:17, Gert Wollny > > wrote: > > > > > > > > > Is there a docker image available that resembles the travis-ci > > > build

[Mesa-dev] [Bug 102677] [OpenGL CTS] KHR-GL45.CommonBugs.CommonBug_PerVertexValidation fails

https://bugs.freedesktop.org/show_bug.cgi?id=102677 Bug ID: 102677 Summary: [OpenGL CTS] KHR-GL45.CommonBugs.CommonBug_PerVertexValidation fails Product: Mesa Version: unspecified Hardware: Other

  1   2   >