On Fri, Mar 01, 2019 at 10:11:42AM +, Dr. David Alan Gilbert wrote:
> * Peter Xu (pet...@redhat.com) wrote:
> > On Thu, Feb 28, 2019 at 12:28:22PM +, Dr. David Alan Gilbert wrote:
> > > * Daniel P. Berrangé (berra...@redhat.com) wrote:
> > > > On Thu, Feb 28, 2019 at 11:40:19AM +, Dr. D
Ping.
Can anyone review block-related patches?
Pavel Dovgalyuk
> -Original Message-
> From: Pavel Dovgalyuk [mailto:pavel.dovga...@ispras.ru]
> Sent: Thursday, February 21, 2019 2:04 PM
> To: qemu-devel@nongnu.org
> Cc: kw...@redhat.com; peter.mayd...@linaro.org; war2jor...@live.com;
> cr
This fixes a regression in rsp packet vCont, this was due to the
recently added multiprocess support. (Short commit hash: e40e520).
The result is that vCont now does not recognise the case where
no process/thread is provided after the action.
This may not show up with GDB, but using Lauterbach Tr
Magnus Damm writes:
> Hi guys,
>
> On Wed, Feb 20, 2019 at 2:31 AM Markus Armbruster wrote:
>>
>> Philippe Mathieu-Daudé writes:
>>
>> > On 2/19/19 4:45 PM, Markus Armbruster wrote:
>> >> Peter Maydell writes:
>> >>
>> >>> On Mon, 18 Feb 2019 at 13:07, Markus Armbruster
>> >>> wrote:
>>
Thomas Huth writes:
> g_test_message() takes care of the newline on its own, so we
> should not use \n in the strings here.
>
> Signed-off-by: Thomas Huth
Without "[PATCH] tests: Remove (mostly) useless architecture checks",
the patch misses four instances of '\n', so:
Based-on: <1551456970-46
We didn't specify the indent rule for multiline code here, which may
mislead users. And in current code, the code use various styles.
Add this rule in CODING_STYLE to make sure this is clear to every one.
Signed-off-by: Wei Yang
Suggested-by: Igor Mammedov
---
v6:
* add ) for last example o
All the example code are indented with four spaces except this one.
Fix this by adding four spaces here.
Signed-off-by: Wei Yang
Reviewed-by: Eric Blake
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Igor Mammedov
---
CODING_STYLE | 8
1 file changed, 4 insertions(+), 4 deletions(
The first one is suggested by Igor Mammedov to provide rule for multiline
code.
The second is a trivial fix to make example code all indented with 4 spaces.
v6:
* add ) for last example of function
v5:
* mostly address function variants
v4:
* one exception case for function
v3:
* fix typo
Daniel P. Berrangé writes:
> On Fri, Mar 01, 2019 at 06:33:28PM +0100, Igor Mammedov wrote:
>> On Fri, 1 Mar 2019 15:49:47 +
>> Daniel P. Berrangé wrote:
>>
>> > On Fri, Mar 01, 2019 at 04:42:15PM +0100, Igor Mammedov wrote:
>> > > The parameter allows to configure fake NUMA topology where
Markus Armbruster, le lun. 04 mars 2019 07:44:34 +0100, a ecrit:
> Samuel Thibault writes:
> > --- a/qapi/ui.json
> > +++ b/qapi/ui.json
> > @@ -1131,6 +1131,7 @@
> > # @full-screen: Start user interface in fullscreen mode (default: off).
> > # @window-close: Allow to quit qemu with window cl
On Thu, Feb 28, 2019 at 07:57:58PM -0300, Fabiano Rosas wrote:
> There are four scenarios being handled in this function:
>
> - single stepping
> - hardware breakpoints
> - software breakpoints
> - fallback (no debug supported)
>
> A future patch will add code to handle specific single step and
>
On Thu, Feb 28, 2019 at 07:57:57PM -0300, Fabiano Rosas wrote:
> This is in preparation for a refactoring of the kvm_handle_debug
> function in the next patch.
>
> Signed-off-by: Fabiano Rosas
Nice cleanup regardless of anything else. Applied to ppc-for-4.0.
> ---
> target/ppc/kvm.c | 47
On Thu, Feb 28, 2019 at 07:57:56PM -0300, Fabiano Rosas wrote:
> For single stepping (via KVM) of a guest vcpu to work, KVM needs not
> only to support the SET_GUEST_DEBUG ioctl but to also recognize the
> KVM_GUESTDBG_SINGLESTEP bit in the control field of the
> kvm_guest_debug struct.
>
> This p
flatview_add_to_dispatch() registers page based on the condition of
*section*, which may looks like this:
|s|PPP|s|
where s stands for subpage and P for page.
The procedure of this function could be described as:
- register first subpage
- register page
- register last subpa
Samuel Thibault writes:
> This uses iconv to convert glyphs from the specified VGA font encoding to
> unicode, and makes use of cchar_t instead of chtype when using ncursesw,
> which allows to store all wide char as well as the WACS values.
>
> Signed-off-by: Samuel Thibault
> Cc: Eddie Kohler
On Thu, Feb 28, 2019 at 07:57:55PM -0300, Fabiano Rosas wrote:
> Signed-off-by: Fabiano Rosas
> Reviewed-by: Alexey Kardashevskiy
This is a nice cleanup, regardless of the rest of the series. Applied
to ppc-for-4.0.
> ---
> target/ppc/excp_helper.c | 30 +++---
> 1 fil
On Sun, Mar 03, 2019 at 05:23:36PM +, Mark Cave-Ayland wrote:
> Instead of having multiple copies of the offset calculation logic, move it to
> a
> single fpr_offset() function.
>
> Signed-off-by: Mark Cave-Ayland
Applied to ppc-for-4.0, thanks.
> ---
> target/ppc/cpu.h | 7 ++-
On Sun, Mar 03, 2019 at 05:23:37PM +, Mark Cave-Ayland wrote:
> Instead of having multiple copies of the offset calculation logic, move it to
> a
> single vsrl_offset() function.
>
> This commit also renames the existing get_vsr()/set_vsr() functions to
> get_vsrl()/set_vsrl() which better de
On Sun, Mar 03, 2019 at 05:23:35PM +, Mark Cave-Ayland wrote:
> After some investigation into Andrew's report of corruption in his ppc64le
> tests at https://lists.gnu.org/archive/html/qemu-devel/2019-02/msg07234.html,
> I
> discovered the underlying cause was that the first 32 VSX registers a
On Fri, Mar 01, 2019 at 03:46:07PM +1100, Suraj Jitindar Singh wrote:
> This series is based on the ppc-for-4.0 branch with my large-decrementer
> and count-cache-flush series applied.
>
> Suraj Jitindar Singh (2):
> target/ppc/tcg: make spapr_caps apply cap-[cfpc/sbbc/ibs] non-fatal
> for t
Hi guys,
On Wed, Feb 20, 2019 at 2:31 AM Markus Armbruster wrote:
>
> Philippe Mathieu-Daudé writes:
>
> > On 2/19/19 4:45 PM, Markus Armbruster wrote:
> >> Peter Maydell writes:
> >>
> >>> On Mon, 18 Feb 2019 at 13:07, Markus Armbruster wrote:
>
> pflash_cfi02_register() takes a siz
On Mon, 4 Mar 2019, Andrew Randrianasulu wrote:
From: Amit Singh Tomar
Original commit message:
This patch adds an emulation model for i2c controller found on most of the FSL
SoCs.
It also integrates the RTC (ds1338) that sits on the i2c Bus with e500 machine
model.
Patch was originally writ
MSR IA32_CORE_CAPABILITY is a feature-enumerating MSR, which
enumerates the capabilitiy of enabling detection of split locks (bit 5
of MSR_TEST_CTL).
MSR IA32_CORE_CAPABILITY can be enumerated by CPUID.0X7.0:EDX[30].
Related kernel patches can be found here:
https://lkml.org/lkml/2019/3/1/749
Pat
On Mon, Feb 25, 2019 at 6:55 AM Alex Bennée wrote:
> Emilio G. Cota writes:
> > Signed-off-by: Emilio G. Cota
> > ---
> > target/xtensa/translate.c | 4 ++--
> > 1 file changed, 2 insertions(+), 2 deletions(-)
> >
> > diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
> > index
On Fri, Mar 01, 2019 at 04:25:17PM +, Stefan Hajnoczi wrote:
> On Thu, Feb 28, 2019 at 01:58:56PM +0800, Peter Xu wrote:
> > On Wed, Feb 27, 2019 at 01:38:38PM +, Stefan Hajnoczi wrote:
> > > On Fri, Feb 22, 2019 at 02:57:24PM +0800, Peter Xu wrote:
> > > > On Fri, Feb 22, 2019 at 07:37:02A
Patchew URL:
https://patchew.org/QEMU/20190304015401.14280-1-randrianas...@gmail.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20190304015401.14280-1-randrianas...@gmail.com
Subject: [Qemu-devel] [PATCH v2] Re-ap
From: Amit Singh Tomar
Original commit message:
This patch adds an emulation model for i2c controller found on most of the FSL
SoCs.
It also integrates the RTC (ds1338) that sits on the i2c Bus with e500 machine
model.
Patch was originally written by Amit Singh Tomar
see http://patchwork.ozla
On Fri, Mar 01, 2019 at 01:43:14PM +1100, Suraj Jitindar Singh wrote:
> Add spapr_cap SPAPR_CAP_LARGE_DECREMENTER to be used to control the
> availability of the large decrementer for a guest.
>
> Signed-off-by: Suraj Jitindar Singh
Series applied to ppc-for-4.0, thanks.
> ---
> hw/ppc/spapr.c
On Fri, Mar 01, 2019 at 03:26:45PM +1100, Suraj Jitindar Singh wrote:
> On Fri, 2019-03-01 at 14:19 +1100, Suraj Jitindar Singh wrote:
> > Introduce a new spapr_cap SPAPR_CAP_CCF_ASSIST to be used to indicate
> > the requirement for a hw-assisted version of the count cache flush
> > workaround.
> >
On Fri, Mar 01, 2019 at 04:33:38PM -0600, Michael Roth wrote:
> Quoting Greg Kurz (2019-03-01 13:32:37)
> > The RTAS event hotplug code for machine types 2.8 and newer depends on
> > the CAS negotiated ov5 in order to work properly. However, there's no
> > CAS when running under qtest. There has be
В сообщении от Monday 04 March 2019 02:57:28 David Gibson написал(а):
> On Sun, Mar 03, 2019 at 12:21:21AM +0300, Andrew Randrianasulu wrote:
> > From ad2b4baf8b369c8ef354e56f75ae780413acd989 Mon Sep 17 00:00:00 2001
> > From: Amit Singh Tomar
> > Date: Sun, 3 Mar 2019 00:05:04 +0300
> > Subject:
On 2019/3/4 7:38, Michael S. Tsirkin wrote:
On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
After the introduction of generic PCIe root port and PCIe-PCI bridge,
we will also have SHPC controller on ARM, so just enalbe SHPC native
hot plug.
Cc: Shannon Zhao
Cc: Peter Maydell
Cc:
On Sun, Mar 03, 2019 at 12:21:21AM +0300, Andrew Randrianasulu wrote:
> From ad2b4baf8b369c8ef354e56f75ae780413acd989 Mon Sep 17 00:00:00 2001
> From: Amit Singh Tomar
> Date: Sun, 3 Mar 2019 00:05:04 +0300
> Subject: [PATCH] Re-applying Freescale PPC E500 i2c/RTC patch
>
> Patch was originally w
On Fri, Mar 01, 2019 at 10:28:30AM +0800, Heyi Guo wrote:
> After the introduction of generic PCIe root port and PCIe-PCI bridge,
> we will also have SHPC controller on ARM, so just enalbe SHPC native
> hot plug.
>
> Cc: Shannon Zhao
> Cc: Peter Maydell
> Cc: "Michael S. Tsirkin"
> Cc: Igor Mam
On 3/3/19 9:23 AM, Mark Cave-Ayland wrote:
> static inline void get_cpu_vsrh(TCGv_i64 dst, int n)
> {
> -if (n < 32) {
> -get_fpr(dst, n);
> -} else {
> -get_avr64(dst, n - 32, true);
> -}
> +tcg_gen_ld_i64(dst, cpu_env, vsrh_offset(n));
> }
>
> static inline v
On 3/3/19 9:23 AM, Mark Cave-Ayland wrote:
> -static inline int fpr_offset(int i)
> +static inline int vsrh_offset(int i)
I don't agree with this. The original is clearer for its uses.
r~
On 3/3/19 9:23 AM, Mark Cave-Ayland wrote:
> When VSX support was initially added, the fpr registers were added at
> offset 0 of the VSR register and the vsrl registers were added at offset
> 1. This is in contrast to the VMX registers (the last 32 VSX registers) which
> are stored in host-endian o
On 3/3/19 9:23 AM, Mark Cave-Ayland wrote:
> These will become more useful later, but initially use this as an aid to
> simplify the offset calculation by replacing the HOST_TARGET_BIGENDIAN
> sections with the VsrD macro.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> target/ppc/cpu.h | 10 +
On 3/3/19 9:23 AM, Mark Cave-Ayland wrote:
> All TCG vector operations require pointers to the base address of the vector
> rather than separate access to the top and bottom 64-bits. Convert
> the VMX TCG instructions to use a new avr_offset() function instead of
> avr64_offset(), which can itself
On 3/3/19 9:23 AM, Mark Cave-Ayland wrote:
> Instead of having multiple copies of the offset calculation logic, move it to
> a
> single vsrl_offset() function.
>
> This commit also renames the existing get_vsr()/set_vsr() functions to
> get_vsrl()/set_vsrl() which better describes their purpose.
On 3/3/19 9:23 AM, Mark Cave-Ayland wrote:
> Instead of having multiple copies of the offset calculation logic, move it to
> a
> single fpr_offset() function.
>
> Signed-off-by: Mark Cave-Ayland
> ---
> target/ppc/cpu.h | 7 ++-
> target/ppc/translate.c | 4 ++--
> 2 files changed, 8
On Fri, Feb 08, 2019 at 14:58:40 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > Some async jobs do not need the BQL.
> >
> > Reviewed-by: Richard Henderson
> > Signed-off-by: Emilio G. Cota
(snip)
> So we now have a locking/scheduling hierarchy that goes:
>
> - run_on_cpu - sync
This hook was installed to close the device when VM is going down.
After the device is closed there is no need to be informed on VM
shutdown.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
---
hw/rdma/vmw/pvrdma_main.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/rdma/vmw/
Utilize error_report for all pr_err calls and some pr_dbg that are
considered as errors.
For the remaining pr_dbg calls, the important ones were replaced by
trace points while other deleted.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
---
hw/rdma/rdma_backend.c| 336 +++
Allow interrogating device internals through HMP interface.
The exposed indicators can be used for troubleshooting by developers or
sysadmin.
There is no need to expose these attributes to a management system (e.x.
libvirt) because (1) most of them are not "device-management' related
info and (2) t
This hook is not called and was implemented by mistake.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
---
hw/rdma/vmw/pvrdma_main.c | 6 --
1 file changed, 6 deletions(-)
diff --git a/hw/rdma/vmw/pvrdma_main.c b/hw/rdma/vmw/pvrdma_main.c
index b795f80666..4e4a43eac4 100644
--- a
When QP is destroyed the backend QP is destroyed as well. This ensures
we clean all received buffer we posted to it.
However, a contexts of these buffers are still remain in the device.
Fix it by maintaining a list of buffer's context and free them when QP
is destroyed.
Signed-off-by: Yuval Shaia
The function rdma_poll_cq is called from two contexts - completion
handler thread which sense new completion on backend channel and
explicitly as result of guest issuing poll_cq command.
Add lock to protect against concurrent executions.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
The function's argument rdma_dev_res is not needed as it is stored in
the backend_dev object at init.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
---
hw/rdma/rdma_backend.c | 13 ++---
hw/rdma/rdma_backend.h | 1 -
hw/rdma/vmw/pvrdma_qp_ops.c | 3 +--
3 files ch
To make code more readable move handling of protected list to a
rdma_utils
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
---
hw/rdma/rdma_backend.c | 20 +--
hw/rdma/rdma_backend_defs.h | 8 ++--
hw/rdma/rdma_utils.c| 39 +
Hi,
Please review the following patch-set which consist of cosmetics fixes to
device's user interface (traces, error_report and monitor) and some bug
fixes.
Thanks Markus, Eric, Marcel and David for reviewing v0.
David, please see version notes below, since i restructured the HMP part
your second
When device is going down free all saved MAD buffers.
Signed-off-by: Yuval Shaia
Reviewed-by: Marcel Apfelbaum
---
hw/rdma/rdma_backend.c| 34 +-
hw/rdma/vmw/pvrdma_main.c | 2 ++
2 files changed, 35 insertions(+), 1 deletion(-)
diff --git a/hw/rdma/rdma_ba
On Fri, Feb 08, 2019 at 11:33:32 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > It will gain some users soon.
> >
> > Suggested-by: Paolo Bonzini
> > Reviewed-by: Richard Henderson
> > Signed-off-by: Emilio G. Cota
> > ---
> > include/qom/cpu.h | 36 ++
By default, curses will only report single ESC key event after 1s delay,
since ESC is also used for keypad escape sequences. This however makes
users believe that ESC is not working. Reducing to 25ms provides good user
experience, while still allowing 25ms for keypad sequences to get in, which
shou
Now that the VSX registers are all in host endian order, there is no need to
go via different accessors depending upon the register number. Instead the
high and low parts can be accessed directly via vsrh_offset() and vsrl_offset()
accordingly.
Signed-off-by: Mark Cave-Ayland
---
target/ppc/tran
It isn't possible to include internal.h from cpu.h so move the Vsr* macros
into cpu.h alongside the other VMX/VSX register access functions.
Signed-off-by: Mark Cave-Ayland
---
target/ppc/cpu.h | 20
target/ppc/internal.h | 19 ---
2 files changed, 20 in
Now that both VSX and VMX registers are in host-endian order we can introduce
a vsrh_offset() function as a replacement for fpr_offset().
In addition the avrh_offset() and avrl_offset() functions can be simplified in
terms of vsrh_offset() and vsrl_offset().
Signed-off-by: Mark Cave-Ayland
---
After some investigation into Andrew's report of corruption in his ppc64le
tests at https://lists.gnu.org/archive/html/qemu-devel/2019-02/msg07234.html, I
discovered the underlying cause was that the first 32 VSX registers are not
stored in host endian order.
This is something that Richard and I h
All TCG vector operations require pointers to the base address of the vector
rather than separate access to the top and bottom 64-bits. Convert
the VMX TCG instructions to use a new avr_offset() function instead of
avr64_offset(), which can itself be written as a simple wrapper onto
vsr_full_offset
Instead of having multiple copies of the offset calculation logic, move it to a
single vsrl_offset() function.
This commit also renames the existing get_vsr()/set_vsr() functions to
get_vsrl()/set_vsrl() which better describes their purpose.
Signed-off-by: Mark Cave-Ayland
---
target/ppc/cpu.h
Warner Losh, le dim. 03 mars 2019 10:11:52 -0700, a ecrit:
> On Sun, Mar 3, 2019, 12:45 AM Samuel Thibault
> <[1]samuel.thiba...@ens-lyon.org>
> wrote:
>
> By default, curses will only report single ESC key event after 1s delay,
> since ESC is also used for keypad escape sequences. This h
When VSX support was initially added, the fpr registers were added at
offset 0 of the VSR register and the vsrl registers were added at offset
1. This is in contrast to the VMX registers (the last 32 VSX registers) which
are stored in host-endian order.
Switch the fpr/vsrl registers so that the lo
These will become more useful later, but initially use this as an aid to
simplify the offset calculation by replacing the HOST_TARGET_BIGENDIAN
sections with the VsrD macro.
Signed-off-by: Mark Cave-Ayland
---
target/ppc/cpu.h | 10 ++
target/ppc/translate.c | 24 ++
Instead of having multiple copies of the offset calculation logic, move it to a
single fpr_offset() function.
Signed-off-by: Mark Cave-Ayland
---
target/ppc/cpu.h | 7 ++-
target/ppc/translate.c | 4 ++--
2 files changed, 8 insertions(+), 3 deletions(-)
diff --git a/target/ppc/cpu.h b
On Sun, Mar 3, 2019, 12:45 AM Samuel Thibault
wrote:
> By default, curses will only report single ESC key event after 1s delay,
> since ESC is also used for keypad escape sequences. This however makes
> users
> believe that ESC is not working. Reducing to 0.2s provides good enough user
> experien
On 3/3/19 4:40 PM, Aleksandar Markovic wrote:
> On Sunday, March 3, 2019, BALATON Zoltan wrote:
>
>> At least two machines, the PPC mac99 and MIPS fulong2e, have an ATI
>> gfx chip by default (Rage 128 Pro and M6/RV100 respectively) and
>> guests running on these and the PMON2000 firmware of the
On 3/3/19 1:46 PM, BALATON Zoltan wrote:
> On Sun, 3 Mar 2019, Philippe Mathieu-Daudé wrote:
>> Hi Zoltan,
>>
>> On 3/3/19 12:34 AM, BALATON Zoltan wrote:
>>> At least two machines, the PPC mac99 and MIPS fulong2e, have an ATI
>>> gfx chip by default (Rage 128 Pro and M6/RV100 respectively) and
>>>
On Sunday, March 3, 2019, BALATON Zoltan wrote:
> At least two machines, the PPC mac99 and MIPS fulong2e, have an ATI
> gfx chip by default (Rage 128 Pro and M6/RV100 respectively) and
> guests running on these and the PMON2000 firmware of the fulong2e
> expect this to be available. Fortunately t
On 3/3/19 3:04 PM, BALATON Zoltan wrote:
> On Sun, 3 Mar 2019, Philippe Mathieu-Daudé wrote:
>> On 3/3/19 1:46 PM, BALATON Zoltan wrote:
>>> On Sun, 3 Mar 2019, Philippe Mathieu-Daudé wrote:
> diff --git a/hw/display/trace-events b/hw/display/trace-events
> index 37d3264bb2..6aed33eeaa 10
From: Zhang Chen
This series focus on COLO failover bug fix and optimization.
V3:
- Fix grammer issues in patch 4/7.
- Add more information in commit log of patch 5/7.
V2:
- Add patch 4/7 to handle failover state.
- Add new patches to optimize failover status.
V1:
- Init patch.
Zhang Ch
From: Zhang Chen
In migration_incoming_state_destroy(void) will check the mis->to_src_file
to double close the mis->to_src_file when occur COLO failover.
Signed-off-by: Zhang Chen
Reviewed-by: Dr. David Alan Gilbert
---
migration/colo.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/migr
From: Zhang Chen
When finished COLO failover, the status is FAILOVER_STATUS_COMPLETED.
The origin codes misunderstand the FAILOVER_STATUS_REQUIRE.
Signed-off-by: Zhang Chen
---
migration/colo.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/migration/colo.c b/migrat
From: Zhang Chen
Add the last_colo_mode to save the status after failover.
This patch can solve the issue that user got nothing to call
query_colo_status after failover.
Signed-off-by: Zhang Chen
---
migration/colo.c | 28 +++-
1 file changed, 23 insertions(+), 5 deleti
From: Zhang Chen
Delay to close COLO for auto start VM after failover.
Signed-off-by: Zhang Chen
Reviewed-by: Dr. David Alan Gilbert
---
migration/colo.c | 1 -
migration/migration.c | 3 +++
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/migration/colo.c b/migration/colo.
From: Zhang Chen
In this patch we add the processing state for COLOExitReason,
because we have to identify COLO in the failover processing state or
failover error state. In the way, we can handle all the failover state.
We have improved the description of the COLOExitReason by the way.
Signed-of
From: Zhang Chen
Signed-off-by: Zhang Chen
---
migration/colo.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/migration/colo.c b/migration/colo.c
index dbe2b88807..d1ae2e6d11 100644
--- a/migration/colo.c
+++ b/migration/colo.c
@@ -197,10 +197,16 @@ void colo_do
From: Zhang Chen
Remove the "active" variable in example for query-colo-status.
It is a doc bug from commit f56c0065
Signed-off-by: Zhang Chen
Reviewed-by: Eric Blake
---
qapi/migration.json | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qapi/migration.json b/qapi/migrati
On 01/03/2019 18.57, John Snow wrote:
>
>
> On 3/1/19 11:16 AM, Thomas Huth wrote:
>> These checks at the beginning of some of the tests are mostly useless:
>> We only run the tests on x86 anyway, and g_test_message() does not
>> print anything unless you call g_test_init() first.
>>
>> Signed-of
-Original Message-
From: Eric Blake [mailto:ebl...@redhat.com]
Sent: Friday, March 1, 2019 1:07 AM
To: Zhang, Chen ; Li Zhijian ;
Zhang Chen ; Dr. David Alan Gilbert ;
Juan Quintela ; zhanghailiang
; Markus Armbruster ;
qemu-dev
Subject: Re: [PATCH V2 5/7] qapi/migration.json: Remov
-Original Message-
From: Eric Blake [mailto:ebl...@redhat.com]
Sent: Friday, March 1, 2019 1:05 AM
To: Zhang, Chen ; Li Zhijian ;
Zhang Chen ; Dr. David Alan Gilbert ;
Juan Quintela ; zhanghailiang
; Markus Armbruster ;
qemu-dev
Subject: Re: [PATCH V2 4/7] Migration/colo.c: Add new C
On Sun, 3 Mar 2019, Philippe Mathieu-Daudé wrote:
On 3/3/19 1:46 PM, BALATON Zoltan wrote:
On Sun, 3 Mar 2019, Philippe Mathieu-Daudé wrote:
+??? case RBBM_STATUS:
? /* fall through */
+??? case GUI_STAT:
+??? val = 64; /* free CMDFIFO entries */
+??? break;
Obviously fall
On Sun, 03 Mar 2019 04:21:10 +0900,
Philippe Mathieu-Daudé wrote:
>
> Hi Yoshinori,
>
> On 3/2/19 7:21 AM, Yoshinori Sato wrote:
> > This module supported only non FIFO type.
> > Hardware manual.
> > https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf?key=086
On Sun, 03 Mar 2019 04:03:19 +0900,
Philippe Mathieu-Daudé wrote:
>
> On 3/2/19 7:21 AM, Yoshinori Sato wrote:
> > Signed-off-by: Yoshinori Sato
> > ---
> > MAINTAINERS | 20
> > 1 file changed, 20 insertions(+)
> >
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 5040d
On 3/3/19 1:46 PM, BALATON Zoltan wrote:
> On Sun, 3 Mar 2019, Philippe Mathieu-Daudé wrote:
>> Hi Zoltan,
>>
>> On 3/3/19 12:34 AM, BALATON Zoltan wrote:
>>> At least two machines, the PPC mac99 and MIPS fulong2e, have an ATI
>>> gfx chip by default (Rage 128 Pro and M6/RV100 respectively) and
>>>
On Sun, 3 Mar 2019, Philippe Mathieu-Daudé wrote:
Hi Zoltan,
On 3/3/19 12:34 AM, BALATON Zoltan wrote:
At least two machines, the PPC mac99 and MIPS fulong2e, have an ATI
gfx chip by default (Rage 128 Pro and M6/RV100 respectively) and
guests running on these and the PMON2000 firmware of the fu
Public bug reported:
Hi,
Using qemu version 3.1.0-1 on a host with the latest Archlinux 64-bit
distribution, and running the same OS as guest, the mouse doesn't work
when using both evdev passthrough and virtio-vga, or when using both
evdev passthrough and kvm.
The following command line runs a
On Sat, 2 Mar 2019 at 19:41, Philippe Mathieu-Daudé wrote:
>
> Hi Damien,
>
> On 3/1/19 5:52 PM, Peter Maydell wrote:
> > On Fri, 1 Mar 2019 at 15:34, Damien Hedde
> > wrote:
> >> On 3/1/19 12:43 PM, Peter Maydell wrote:
> >>> In my design the only thing that I thought would happen in phase 3
>
Hello,
This adds support for wide output in the curses frontend
Samuel Thibault (2):
iconv: detect and make curses depend on it
curses: add option to specify VGA font encoding
configure | 45 ++-
qapi/ui.json| 4 +-
qemu-options.hx | 5 +-
ui/curses.c | 315 ++
curses will use it for proper wide output support.
Signed-off-by: Samuel Thibault
---
configure | 40
vl.c | 2 +-
2 files changed, 41 insertions(+), 1 deletion(-)
diff --git a/configure b/configure
index 540bee19ba..9979ca708d 100755
--- a/configu
This uses iconv to convert glyphs from the specified VGA font encoding to
unicode, and makes use of cchar_t instead of chtype when using ncursesw,
which allows to store all wide char as well as the WACS values.
Signed-off-by: Samuel Thibault
Cc: Eddie Kohler
---
configure | 5 +-
qapi/u
On 3/1/19 12:03 PM, Alex Bennée wrote:
Currently this just includes Marcel who is a fairly prolific
contributor.
Cc: Marcel Apfelbaum
Signed-off-by: Alex Bennée
---
contrib/gitdm/group-map-janustech | 5 +
gitdm.config | 1 +
2 files changed, 6 insertions(+)
c
On 3/1/19 2:28 PM, Yuval Shaia wrote:
On Fri, Mar 01, 2019 at 08:17:02AM +0100, Markus Armbruster wrote:
Marcel Apfelbaum writes:
Hi Yuval,
On 2/27/19 4:06 PM, Yuval Shaia wrote:
Allow interrogating device internals through HMP interface.
The exposed indicators can be used for troublesho
On Sun, 03 Mar 2019 03:51:14 +0900,
Philippe Mathieu-Daudé wrote:
>
> Hi Yoshinori,
>
> On 3/2/19 7:21 AM, Yoshinori Sato wrote:
> > Hello.
> > This patch series is added Renesas RX target emulation.
> >
> > My git repository is bellow.
> > git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git
> >
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