Would like to get notified of changes in this area and review them.
Signed-off-by: Harsh Prateek Bora
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9b56ccdd92..be99e5c4e9 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1406,6 +1406,7 @@ M: Dan
Currently, in spapr_exit_nested(), it does a lot of register state
restoring from ptregs/hvstate after mapping each of those before
restoring the L1 host state. This patch breaks down those set of ops
to respective helper routines for better code readability/maintenance.
Signed-off-by: Harsh Prate
Currently, it asserts very late in the code flow if lpid is already initialized.
Ideally, it should assert in the beginning if that is the case. This patch
brings assert check in the beginning alongwith the related initialization.
Signed-off-by: Harsh Prateek Bora
---
hw/ppc/spapr_hcall.c | 6 ++
This patchset introduces helper routines to enable (and does) cleaning
up of h_enter_nested() and spapr_exit_nested() routines in existing api
for nested virtualization on Power/SPAPR for better code readability /
maintenance. No functional changes intended with this patchset.
Harsh Prateek Bora
The bits in cr reg are grouped into eight 4-bit fields represented
by env->crf[8] and the related calculations should be abstracted to
keep the calling routines simpler to read. This is a step towards
cleaning up the [h_enter|spapr_exit]_nested calls for better readability.
Signed-off-by: Harsh Pr
h_enter_nested() currently does a lot of register specific operations
which should be abstracted logically to simplify the code for better
readability. This patch breaks down relevant blocks into respective
helper routines to make use of them for better readability/maintenance.
Signed-off-by: Hars
On 2023/3/29 11:23, Weiwei Li wrote:
We should sync cpu_pc before storing it into badaddr when mis-aligned
exception is triggered.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/insn_trans/trans_rvi.c.inc | 1 +
target/riscv/translate.c| 1 +
2 fil
On Thu, 2023-03-30 at 18:18 -0400, Peter Xu wrote:
> On Thu, Mar 30, 2023 at 04:59:09PM +0100, Dr. David Alan Gilbert wrote:
> > * Daniel P. Berrangé (berra...@redhat.com) wrote:
> > > On Thu, Mar 30, 2023 at 10:36:11AM -0400, Peter Xu wrote:
> > > > On Thu, Mar 30, 2023 at 03:20:14PM +0100, Daniel
Fabiano Rosas writes:
> From: Nikolay Borisov
>
> Implement 'fixed-ram' feature. The core of the feature is to ensure that
> each ram page of the migration stream has a specific offset in the
> resulting migration stream. The reason why we'd want such behavior are
> two fold:
>
> - When doing a
On 2023/03/31 4:06, Markus Armbruster wrote:
> Yohei Kojima writes:
>
>> Add qemu_strerror() which follows the POSIX specification for
>> strerror(). While strerror() is not guaranteed to be thread-safe, this
>> function is thread-safe.
>
> Why not g_strerror()?
>
Because g_strerror() uses m
The existence of CF_PCREL can improve performance with the guest
kernel's address space randomization. Each guest process maps
libc.so (et al) at a different virtual address, and this allows
those translations to be shared.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv
Transform the fetch address in cpu_get_tb_cpu_state() when pointer
mask for instruction is enabled.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu.h| 1 +
target/riscv/cpu_helper.c | 20 +++-
target/riscv/csr.c| 2 --
3 files changed
actual_address = (requested_address & ~mpmmask) | mpmbase.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Reviewed-by: Daniel Henrique Barboza
Reviewed-by: LIU Zhiwei
---
target/riscv/vector_helper.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/riscv/vecto
write_mstatus() can only change current xl when in debug mode.
And we need update cur_pmmask/base in this case.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
Reviewed-by: LIU Zhiwei
---
target/riscv/csr.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/targe
Add a base save_pc For PC-relative translation(CF_PCREL).
Diable the directly sync pc from tb by riscv_cpu_synchronize_from_tb.
Sync pc before it's used or updated from tb related pc:
real_pc = (old)env->pc + target_pc(from tb) - ctx->save_pc
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wa
This patchset tries to fix some problem in current implementation for pointer
mask, and add support for pointer mask of instruction fetch.
The port is available here:
https://github.com/plctlab/plct-qemu/tree/plct-pm-fix-v2
v2:
* drop some error patchs
* Add patch 2 and 3 to fix the new problems
Compute the target address before storing it into badaddr
when mis-aligned exception is triggered.
Use a target_pc temp to store the target address to avoid
the confusing operation that udpate target address into
cpu_pc before misalign check, then update it into badaddr
and restore cpu_pc to curre
On 2023/3/29 11:23, Weiwei Li wrote:
write_mstatus() can only change current xl when in debug mode.
And we need update cur_pmmask/base in this case.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/csr.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
Adds reset values for the new registers added.
Signed-off-by: Joe Komlodi
Reviewed-by: Patrick Venture
---
hw/i3c/aspeed_i3c.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/hw/i3c/aspeed_i3c.c b/hw/i3c/aspeed_i3c.c
index ae247e03bb..034a17ff8e 100644
--- a/hw/i3c/aspee
Adds read-only field masks for the I3C device and controller registers.
Signed-off-by: Joe Komlodi
Reviewed-by: Patrick Venture
---
hw/i3c/aspeed_i3c.c | 56 +
1 file changed, 56 insertions(+)
diff --git a/hw/i3c/aspeed_i3c.c b/hw/i3c/aspeed_i3c.c
i
Adds an I3C bus and a target class.
The bus supports:
- I3C data transmission and reception
- CCCs (including ENTDAA)
- IBIs
- legacy I2C transactions
General usage of the bus is similar to I2C. Users are expected to
initialize a bus via i3c_init_bus, and use the bus returned from the
init functio
Adds a simple i3c device to be used for testing in lieu of a real
device.
The mock target supports the following features:
- A buffer that users can read and write to.
- CCC support for commonly used CCCs when probing devices on an I3C bus.
- IBI sending upon receiving a user-defined byte.
Signed
This adds support for hotplugging in I3C.
Conceptually this can be thought of as an I3C target being physically
socketed onto a board.
It is then the target's responsibility to go through the hot-join and
DAA process so it can participate on the bus.
Signed-off-by: Joe Komlodi
Reviewed-by: Patri
Adds functionality to the CTRL register.
Signed-off-by: Joe Komlodi
Reviewed-by: Titus Rwantare
Reviewed-by: Patrick Venture
---
hw/i3c/aspeed_i3c.c | 36
1 file changed, 36 insertions(+)
diff --git a/hw/i3c/aspeed_i3c.c b/hw/i3c/aspeed_i3c.c
index 055ad3
Adds handling for different IBI events that the controller can receive.
This includes:
- Handling a hot-join from a target
- Handling a secondary controller on the bus requesting to be the
primary bus controller
- Handling an interrupt request from a target.
When receiving an IBI, the controller
Moves the Aspeed I3C model and traces into hw/i3c and create I3C build
files.
Signed-off-by: Joe Komlodi
Reviewed-by: Patrick Venture
Reviewed-by: Titus Rwantare
---
hw/Kconfig| 1 +
hw/arm/Kconfig| 1 +
hw/i3c/Kconfig
Signed-off-by: Joe Komlodi
Reviewed-by: Patrick Venture
Reviewed-by: Hao Wu
---
hw/i3c/aspeed_i3c.c | 57 +
1 file changed, 57 insertions(+)
diff --git a/hw/i3c/aspeed_i3c.c b/hw/i3c/aspeed_i3c.c
index 2ed09234ff..b9aa1367d8 100644
--- a/hw/i3c/aspe
Hi all,
This series adds I3C bus support to QEMU and adds more functionality to the
Aspeed I3C controller.
This implementation is a basic implementation that introduces IBIs
(including hot-join), CCCs, and SDR data transfer. As-is, it doesnt support
multi-controller buses or HDR transfers.
First
This adds data and CCC transmission, reception, and the associated
queues required for data transmission and reception to happen.
The I3C controller transmits data by the user writing into a command
queue. When the queue has a command and an argument in it, the
controller starts executing the comm
This adds a remote I3C qtest using the Aspeed I3C controller and an
AST2600 board.
The qtest uses a basic Aspeed I3C driver to test:
- data transmission from controller to target
- data reception from target to controller
- target sending an IBI (with data bytes) to controller
Signed-off-by: Joe
Adds the rest of the fields laid out in the AST26xx datasheet.
Signed-off-by: Joe Komlodi
Reviewed-by: Patrick Venture
---
hw/i3c/aspeed_i3c.c | 260 ++--
1 file changed, 248 insertions(+), 12 deletions(-)
diff --git a/hw/i3c/aspeed_i3c.c b/hw/i3c/aspee
Adds a model to communicate to remote I3C devices over chardev. This
allows QEMU to communicate to I3C targets that exist outside of QEMU.
The remote I3C protocol is as follows:
On an I3C private and CCC TX (controller -> target)
- 1-byte opcode
- 4-byte number of bytes in the packet as a LE uint3
RESET_CTRL and INTR_FORCE are write-only.
Signed-off-by: Joe Komlodi
Reviewed-by: Patrick Venture
---
hw/i3c/aspeed_i3c.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/i3c/aspeed_i3c.c b/hw/i3c/aspeed_i3c.c
index 6f514bef5e..79715f462d 100644
--- a/hw/i3c/aspeed_i3c.c
+++ b/hw/i3c/
Adds behavior to the device reset register.
Signed-off-by: Joe Komlodi
Reviewed-by: Patrick Venture
Reviewed-by: Stephen Longfield
---
hw/i3c/aspeed_i3c.c | 110 +---
hw/i3c/trace-events | 1 +
2 files changed, 104 insertions(+), 7 deletions(-)
diff
The registers are only 32 bits wide, so we should cast the 64-bit value
passed in to only be 32 bits wide.
Signed-off-by: Joe Komlodi
Reviewed-by: Patrick Venture
Reviewed-by: Titus Rwantare
---
hw/i3c/aspeed_i3c.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/i3
Xuerui,
Thanks for your mail, it is a good suggestion. Now we are planing to move
LoongArch uefi bios from edk2-platform to edk2 repo, so that uefi bios
supporting LoongArch can be auto compiled and uploaded to qemu repo. Only that
process is somwhat slow since lacking of hands, however we are
The VOUT_MODE command is described in the PMBus Specification,
Part II, Ver 1.3 Section 8.3
VOUT_MODE has a three bit mode and 4 bit parameter, the three bit
mode determines whether voltages are formatted as uint16, uint16,
VID, and Direct modes. VID and Direct modes use the remaining 5 bits
to sc
VCAP is a register for devices with energy storage capacitors.
Reviewed-by: Benjamin Streb
Signed-off-by: Titus Rwantare
---
hw/i2c/pmbus_device.c | 8
include/hw/i2c/pmbus_device.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/hw/i2c/pmbus_device.c b/hw/i2c/pmbus_devic
PMBus devices can send and receive variable length data using the
block read and write format, with the first byte in the payload
denoting the length.
This is mostly used for strings and on-device logs. Devices can
respond to a block read with an empty string.
Reviewed-by: Hao Wu
Signed-off-by:
Devices models calling pmbus_send_string can't be relied upon to
send a non-zero pointer. This logs an error and doesn't segfault.
Reviewed-by: Patrick Venture
Signed-off-by: Titus Rwantare
---
hw/i2c/pmbus_device.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/i2c/pmbus_device.
PMBus devices may integrate fans whose operation is configurable
over PMBus. This commit allows the driver to read and write the
fan control registers but does not model the operation of fans.
Reviewed-by: Stephen Longfield
Signed-off-by: Titus Rwantare
---
hw/i2c/pmbus_device.c | 176 +
The ADM1266 can have string fields written by the driver, so
it's worth specifically testing.
Reviewed-by: Hao Wu
Signed-off-by: Titus Rwantare
---
tests/qtest/adm1266-test.c | 123 +
tests/qtest/meson.build| 1 +
2 files changed, 124 insertions(+)
The ADM1266 is a cascadable super sequencer with margin control and
fault recording.
This commit adds basic support for its PMBus commands and models
the identification registers that can be modified in a firmware
update.
Reviewed-by: Hao Wu
Signed-off-by: Titus Rwantare
---
hw/arm/Kc
This patch series contains fixes and improvements to PMBus support in QEMU.
The following has been added:
- Support for block receive
- Support for devices with fans
- Support for the VCAP register for devices with onboard energy storage
- A bitfield struct for the vout mode register,
Apologies. I've updated the commit descriptions and added a sensor using
this code in v2.
While doing block receive I discovered that it is valid behaviour to erase
a field and have it be an empty string.
-Titus
On Thu, 30 Mar 2023 at 09:18, Corey Minyard wrote:
> It's generally frowned upon t
On Thu, Mar 30, 2023 at 04:59:09PM +0100, Dr. David Alan Gilbert wrote:
> * Daniel P. Berrangé (berra...@redhat.com) wrote:
> > On Thu, Mar 30, 2023 at 10:36:11AM -0400, Peter Xu wrote:
> > > On Thu, Mar 30, 2023 at 03:20:14PM +0100, Daniel P. Berrangé wrote:
> > > > On Mon, Mar 27, 2023 at 01:15:1
On Thu, Mar 30, 2023 at 03:03:20PM -0300, Fabiano Rosas wrote:
> From: Nikolay Borisov
>
> Implement 'fixed-ram' feature. The core of the feature is to ensure that
> each ram page of the migration stream has a specific offset in the
> resulting migration stream. The reason why we'd want such beha
On Thu, Mar 30, 2023 at 03:03:10PM -0300, Fabiano Rosas wrote:
> Hi folks,
Hi,
>
> I'm continuing the work done last year to add a new format of
> migration stream that can be used to migrate large guests to a single
> file in a performant way.
>
> This is an early RFC with the previous code +
Reviewed-by: Richard Henderson
r~
On Thu, 30 Mar 2023, 03:19 Peter Maydell, wrote:
> In commit 049edada we added some code to handle HSTR_EL2 traps, which
> we did as an inline "conditionally branch over a
> gen_exception_insn()". Unfortunately this fails to take account of
> the fact that ge
Yohei Kojima writes:
> Add qemu_strerror() which follows the POSIX specification for
> strerror(). While strerror() is not guaranteed to be thread-safe, this
> function is thread-safe.
Why not g_strerror()?
> This function is added to solve the following issue:
> https://gitlab.com/qemu-project
Daniel P. Berrangé writes:
> On Thu, Mar 30, 2023 at 11:17:41AM +0100, Daniel P. Berrangé wrote:
>> On Thu, Mar 30, 2023 at 11:11:41AM +0100, Alex Bennée wrote:
>> > Apparently the docker-in-docker approach has some flaws including
>> > needing privileged mode to run and being quite slow. An al
Allow multifd to open file-backed channels. This will be used when
enabling the fixed-ram migration stream format which expects a
seekable transport.
The QIOChannel read and write methods will use the preadv/pwritev
versions which don't update the file offset at each call so we can
reuse the fd wi
We're about to enable support for other transports in multifd, so
remove direct references to sockets.
Signed-off-by: Fabiano Rosas
---
migration/multifd.c | 22 --
1 file changed, 16 insertions(+), 6 deletions(-)
diff --git a/migration/multifd.c b/migration/multifd.c
index
From: Nikolay Borisov
In order to allow analyze-migration.py script to work with migration
streams that have the 'fixed-ram' capability, it's required to have
access to the stream's configuration object. This commit enables this
by making migration json writer part of MigrationState struct,
allow
From: Nikolay Borisov
file-based migration requires the target to initiate its migration after
the source has finished writing out the data in the file. Currently
there's no easy way to initiate 'migrate-incoming', allow this by
introducing migrate_incoming_qmp helper, similarly to migrate_qmp.
From: Nikolay Borisov
Add basic tests for 'fixed-ram' migration.
Signed-off-by: Nikolay Borisov
Signed-off-by: Fabiano Rosas
---
tests/qtest/migration-test.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/tests/qtest/migration-test.c b/tests/qtest/migration-test.c
Hi folks,
I'm continuing the work done last year to add a new format of
migration stream that can be used to migrate large guests to a single
file in a performant way.
This is an early RFC with the previous code + my additions to support
multifd and direct IO. Let me know what you think!
Here ar
From: Nikolay Borisov
The upcoming 'fixed-ram' feature will require qemu to write data to
(and restore from) specific offsets of the migration file.
Add a minimal implementation of pwritev/preadv and expose them via the
io_pwritev and io_preadv interfaces.
Signed-off-by: Nikolay Borisov
Signed
Add support to the new migration features:
- 'file' transport;
- 'fixed-ram' stream format capability;
- 'direct-io' parameter;
Usage:
$ ./guestperf.py --binary --initrd \
--transport file --dst-file migfile --multifd --fixed-ram \
--multifd-channels 4 --output
Currently multifd does not need to have knowledge of pages on the
receiving side because all the information needed is within the
packets that come in the stream.
We're about to add support to fixed-ram migration, which cannot use
packets because it expects the ramblock section in the migration fi
From: Nikolay Borisov
Add basic tests for file-based migration.
Signed-off-by: Nikolay Borisov
Signed-off-by: Fabiano Rosas
---
(farosas) fix segfault when connect_uri is not set
---
tests/qtest/migration-test.c | 24
1 file changed, 24 insertions(+)
diff --git a/tes
From: Nikolay Borisov
Add a generic QIOChannel feature SEEKABLE which would be used by the
qemu_file* apis. For the time being this will be only implemented for
file channels.
Signed-off-by: Nikolay Borisov
Signed-off-by: Fabiano Rosas
Reviewed-by: Daniel P. Berrangé
---
include/io/channel.h
Add a completion tracepoint that provides basic stats for
debug. Displays throughput (MB/s and pages/s) and total time (ms).
Usage:
$QEMU ... -trace migration_status
Output:
migration_status 1506 MB/s, 436725 pages/s, 8698 ms
Signed-off-by: Fabiano Rosas
---
migration/migration.c | 6 +++-
For the upcoming support to fixed-ram migration with multifd, we need
to be able to accept an iovec array with non-contiguous data.
Add a pwritev and preadv version that splits the array into contiguous
segments before writing. With that we can have the ram code continue
to add pages in any order
We'll need to set the shadow_bmap bits from outside ram.c soon and
TARGET_PAGE_BITS is poisoned, so add a wrapper to it.
Signed-off-by: Fabiano Rosas
---
migration/ram.c | 9 +
migration/ram.h | 1 +
2 files changed, 10 insertions(+)
diff --git a/migration/ram.c b/migration/ram.c
index
For the upcoming support to the new 'fixed-ram' migration stream
format, we cannot use multifd packets because each write into the
ramblock section in the migration file is expected to contain only the
guest pages. They are written at their respective offsets relative to
the ramblock section header
Add the direct-io migration parameter that tells the migration code to
use O_DIRECT when opening the migration stream file whenever possible.
This is currently only used for the secondary channels of fixed-ram
migration, which can guarantee that writes are page aligned.
However the parameter coul
From: Nikolay Borisov
Implement 'fixed-ram' feature. The core of the feature is to ensure that
each ram page of the migration stream has a specific offset in the
resulting migration stream. The reason why we'd want such behavior are
two fold:
- When doing a 'fixed-ram' migration the resulting f
From: Nikolay Borisov
Add the necessary code to parse the format changes for the 'fixed-ram'
capability.
One of the more notable changes in behavior is that in the 'fixed-ram'
case ram pages are restored in one go rather than constantly looping
through the migration stream.
Also due to idiosync
Signed-off-by: Fabiano Rosas
---
tests/qtest/migration-test.c | 27 +++
1 file changed, 27 insertions(+)
diff --git a/tests/qtest/migration-test.c b/tests/qtest/migration-test.c
index 84b4c761ad..2e0911996d 100644
--- a/tests/qtest/migration-test.c
+++ b/tests/qtest/migra
The new fixed-ram stream format uses a file transport and puts ram
pages in the migration file at their respective offsets and can be
done in parallel by using the pwritev system call which takes iovecs
and an offset.
Add support to enabling the new format along with multifd to make use
of the thr
From: Nikolay Borisov
To facilitate the implementation of the 'fixed-ram' migration restore,
factor out the code responsible for parsing the ramblocks
headers. This also makes ram_load_precopy easier to comprehend.
Signed-off-by: Nikolay Borisov
Signed-off-by: Fabiano Rosas
---
migration/ram.
On the receiving side we don't need to differentiate between main
channel and threads, so whichever channel is defined first gets to be
the main one. And since there are no packets, use the atomic channel
count to index into the params array.
Signed-off-by: Fabiano Rosas
---
migration/file.c
For the incoming fixed-ram migration we need to read the ramblock
headers, get the pages bitmap and send the host address of each
non-zero page to the multifd channel thread for writing.
To read from the migration file we need a preadv function that can
read into the iovs in segments of contiguous
From: Nikolay Borisov
Add utility methods that will be needed when implementing 'fixed-ram'
migration capability.
qemu_file_is_seekable
qemu_put_buffer_at
qemu_get_buffer_at
qemu_set_offset
qemu_get_offset
Signed-off-by: Nikolay Borisov
Signed-off-by: Fabiano Rosas
---
fixed total_transferred
From: Nikolay Borisov
Introduce basic pwritev/preadv support in the generic channel layer.
Specific implementation will follow for the file channel as this is
required in order to support migration streams with fixed location of
each ram page.
Signed-off-by: Nikolay Borisov
Signed-off-by: Fabia
From: Nikolay Borisov
Implement support for a "file:" uri so that a migration can be initiated
directly to a file from QEMU.
Unlike other migration protocol backends, the 'file' protocol cannot
honour non-blocking mode. POSIX file/block storage will always report
ready to read/write, regardless
From: Nikolay Borisov
This is a counterpart to the 'file:' uri support for source migration,
now a file can also serve as the source of an incoming migration.
Unlike other migration protocol backends, the 'file' protocol cannot
honour non-blocking mode. POSIX file/block storage will always repor
On Thu, Mar 30, 2023 at 05:31:13PM +0100, Peter Maydell wrote:
> On Wed, 15 Mar 2023 at 14:52, Guenter Roeck wrote:
> >
> > The SOC on i.MX6UL and i.MX7 has 2 Ethernet interfaces. The PHY on each may
> > be connected to separate MDIO busses, or both may be connected on the same
> > MDIO bus using
strerror() is not guaranteed to be thread-safe as described in
(https://gitlab.com/qemu-project/qemu/-/issues/416).
This commit changes files under /target/i386 that call strerror() to
call the safer qemu_strerror().
Signed-off-by: Yohei Kojima
---
target/i386/kvm/kvm.c | 49 +++
strerror() is not guaranteed to be thread-safe as described in
(https://gitlab.com/qemu-project/qemu/-/issues/416).
This commit changes files under /linux-user that call strerror() to call
the safer qemu_strerror().
Signed-off-by: Yohei Kojima
Reviewed-by: Alex Bennée
---
linux-user/elfload.c
Add qemu_strerror() which follows the POSIX specification for
strerror(). While strerror() is not guaranteed to be thread-safe, this
function is thread-safe.
This function is added to solve the following issue:
https://gitlab.com/qemu-project/qemu/-/issues/416
Signed-off-by: Yohei Kojima
---
in
strerror() is not guaranteed to be thread-safe as described in
(https://gitlab.com/qemu-project/qemu/-/issues/416).
This commit changes files under /accel that call strerror() to call
the safer qemu_strerror().
Signed-off-by: Yohei Kojima
---
accel/kvm/kvm-all.c | 32 ++-
This patch series adds qemu_strerror() function, which is thread-safe
version of the libc strerror(). The first patch introduces the
qemu_strerror() function, and the second patch replaces strerror()
function in linux-user/* with qemu_strerror() function.
The difference between this patch series a
On 3/29/23 18:09, liweiwei wrote:
@@ -51,26 +59,43 @@ static bool trans_jal(DisasContext *ctx, arg_jal *a)
static bool trans_jalr(DisasContext *ctx, arg_jalr *a)
{
TCGLabel *misaligned = NULL;
+ TCGv succ_pc = tcg_temp_new();
succ_pc can by null for !CF_PCREL...
I think this is OK
Even if Device-TLB and PCI ATS is enabled, the guest can reject to use
it. For example, this situation appears when Windows Server 2022 is
running with intel-iommu with device-iotlb=on and virtio-net-pci with
vhost=on. The guest implies that no address translation info cached in
device IOTLB and do
On Wed, 15 Mar 2023 at 14:52, Guenter Roeck wrote:
>
> The SOC on i.MX6UL and i.MX7 has 2 Ethernet interfaces. The PHY on each may
> be connected to separate MDIO busses, or both may be connected on the same
> MDIO bus using different PHY addresses. Commit 461c51ad4275 ("Add a phy-num
> property t
On Thu, Mar 30, 2023 at 11:11:33AM +0100, Alex Bennée wrote:
> We don't update these often but if you are the sort of person who
> enjoys debating and tuning project policies you could now add yourself
> as a reviewer here so you don't miss the next debate over tabs vs
> spaces ;-)
>
> Who's with
On Thu, Mar 30, 2023 at 11:20:11AM -0500, Corey Minyard wrote:
> I almost never say this, as patches are usually too large :), but it
> would be nice if you combined this with the patch that uses the
> structure so we can see what it's used for. Especially since that patch
> is several patches dow
On Wed, Mar 22, 2023 at 05:55:13PM +, Titus Rwantare wrote:
> VCAP is a register for devices with energy storage capacitors.
Acked-by: Corey MInyard
>
> Reviewed-by: Benjamin Streb
> Signed-off-by: Titus Rwantare
> ---
> hw/i2c/pmbus_device.c | 8
> include/hw/i2c/pmbus_
On Wed, Mar 22, 2023 at 05:55:12PM +, Titus Rwantare wrote:
> Devices models calling pmbus_send_string can't be relied upon to
> send a non-zero pointer. This logs an error and doesn't segfault.
Yes, a good idea.
Acked-by: Corey Minyard
>
> Reviewed-by: Patrick Venture
> Signed-off-by: Ti
Empty description, but the code itself looks ok.
Acked-by: Corey Minyard
On Wed, Mar 22, 2023 at 05:55:11PM +, Titus Rwantare wrote:
> Reviewed-by: Stephen Longfield
> Signed-off-by: Titus Rwantare
> ---
> hw/i2c/pmbus_device.c | 176 ++
> include/h
I almost never say this, as patches are usually too large :), but it
would be nice if you combined this with the patch that uses the
structure so we can see what it's used for. Especially since that patch
is several patches down the line.
-corey
On Wed, Mar 22, 2023 at 05:55:10PM +, Titus Rw
It's generally frowned upon to have empty descriptions, some rationale
would be helpful. For instance, you remove a length check from the send
string, why did you do that?
Any why is this being added? What's it supporting?
-corey
On Wed, Mar 22, 2023 at 05:55:09PM +, Titus Rwantare wrote:
On 2023/03/30 23:08, Alex Bennée wrote:
>
> Yohei Kojima writes:
>
>> strerror() is not guaranteed to be thread-safe as described in
>> (https://gitlab.com/qemu-project/qemu/-/issues/416).
>>
>> This commit changes files under /linux-user that call strerror() to call
>> the safer qemu_strerror
* Daniel P. Berrangé (berra...@redhat.com) wrote:
> On Thu, Mar 30, 2023 at 10:36:11AM -0400, Peter Xu wrote:
> > On Thu, Mar 30, 2023 at 03:20:14PM +0100, Daniel P. Berrangé wrote:
> > > On Mon, Mar 27, 2023 at 01:15:18PM -0300, Leonardo Bras wrote:
> > > > Since the introduction of multifd, it's
On 30/03/2023 17.33, Peter Maydell wrote:
On Thu, 30 Mar 2023 at 16:27, Thomas Huth wrote:
Booting a Linux kernel with the malta machine is currently broken
on big endian hosts. The cpu_to_gt32 macro wants to byteswap a value
for little endian targets only, but uses the wrong way to do this:
c
Alex,
On Thu, Mar 30, 2023 at 12:11 PM Alex Bennée wrote:
> We don't update these often but if you are the sort of person who
> enjoys debating and tuning project policies you could now add yourself
> as a reviewer here so you don't miss the next debate over tabs vs
> spaces ;-)
>
> Who's with m
On Thu, 30 Mar 2023 at 16:27, Thomas Huth wrote:
>
> Booting a Linux kernel with the malta machine is currently broken
> on big endian hosts. The cpu_to_gt32 macro wants to byteswap a value
> for little endian targets only, but uses the wrong way to do this:
> cpu_to_[lb]e32 works the other way ro
Alex Bennée writes:
> We don't update these often but if you are the sort of person who
> enjoys debating and tuning project policies you could now add yourself
> as a reviewer here so you don't miss the next debate over tabs vs
> spaces ;-)
>
> Who's with me?
>
> Signed-off-by: Alex Bennée
> Cc
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