[PATCH qemu v3 06/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 09/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 08/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 14/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 01/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up and count down modes. This

[PATCH qemu v3 05/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 02/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 13/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 10/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 18/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 07/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 20/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 17/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 04/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 15/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 03/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 16/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 19/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 12/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v3 00/20] Fix malfunctioning of T2-T5 timers on the STM32 platform

2023-12-02 Thread ~lbryndza
Current implementation of T2 - T5 times on the STM32 platform does not work properly. After configuring the timer-counter circuit to report interrupts every 10ms, in reality the first interrupt is reported only once after a few seconds, while subsequent interrupts do not come. The current code

[PATCH qemu v3 11/20] Fixing the basic functionality of STM32 timers

2023-12-02 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up an count down modes. This commit

[PATCH qemu v2] Fixing the basic functionality of STM32 timers

2023-10-30 Thread ~lbryndza
From: Lucjan Bryndza The current implementation of timers does not work properly even in basic functionality. A counter configured to report an interrupt every 10ms reports the first interrupts after a few seconds. There are also no properly implemented count up and count down modes. This