On Fri, May 08, 2020 at 10:43:05AM +0200, Greg Kurz wrote:
> On Thu, 7 May 2020 23:51:54 +1000
> David Gibson wrote:
>
> > On Thu, May 07, 2020 at 09:48:24PM +1000, Nicholas Piggin wrote:
> > > Commit a77fed5bd926 ("ppc/pnv: Add support for NMI interface") got the
>
> Please note that the
>> of a pending interrupt. It occurs on a SMP PowerNV machine when it is
>> stressed with IO, such as scp of a big file.
>>
>> I am suspecting more and more an issue with an interrupt being handled
>> when the CPU is coming out of idle. I haven't seen anything wrong in
>
> So you can't hit it
On Thu, 7 May 2020 23:51:54 +1000
David Gibson wrote:
> On Thu, May 07, 2020 at 09:48:24PM +1000, Nicholas Piggin wrote:
> > Commit a77fed5bd926 ("ppc/pnv: Add support for NMI interface") got the
Please note that the culprit patch was merged with a different SHA1:
Excerpts from Cédric Le Goater's message of May 8, 2020 3:14 am:
> On 5/7/20 1:48 PM, Nicholas Piggin wrote:
>> Commit a77fed5bd926 ("ppc/pnv: Add support for NMI interface") got the
>> SRR1 setting wrong for sresets that hit outside of power-save states.
>>
>> Fix this, better documenting the
Patchew URL: https://patchew.org/QEMU/20200507114824.788942-1-npig...@gmail.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20200507114824.788942-1-npig...@gmail.com
Subject: [PATCH] ppc/pnv: Fix NMI system reset SRR1 value
On Thu, May 07, 2020 at 09:48:24PM +1000, Nicholas Piggin wrote:
> Commit a77fed5bd926 ("ppc/pnv: Add support for NMI interface") got the
> SRR1 setting wrong for sresets that hit outside of power-save states.
>
> Fix this, better documenting the source for the bit definitions.
>
> Fixes:
On 5/7/20 1:48 PM, Nicholas Piggin wrote:
> Commit a77fed5bd926 ("ppc/pnv: Add support for NMI interface") got the
> SRR1 setting wrong for sresets that hit outside of power-save states.
>
> Fix this, better documenting the source for the bit definitions.
>
> Fixes: a77fed5bd926 ("ppc/pnv: Add
Commit a77fed5bd926 ("ppc/pnv: Add support for NMI interface") got the
SRR1 setting wrong for sresets that hit outside of power-save states.
Fix this, better documenting the source for the bit definitions.
Fixes: a77fed5bd926 ("ppc/pnv: Add support for NMI interface") got the
Cc: Cédric Le
