On 1/12/24 06:09, Thomas Huth wrote:
On 11/01/2024 23.28, Helge Deller wrote:
On 1/9/24 17:01, Richard Henderson wrote:
On 1/9/24 22:16, Helge Deller wrote:
On 1/9/24 10:57, Richard Henderson wrote:
On 1/8/24 00:22, del...@kernel.org wrote:
From: Helge Deller
Add support for the qemu
Regarding pseries, migration compat broke because of 5bc8d26de20c
("spapr: allocate the ICPState object from under sPAPRCPUCore") which
is similar to the changes proposed by this series, it impacts the QOM
hierarchy. Here is the workaround/fix from Greg : 46f7afa37096
("spapr: fix migration of
Am 12.01.24 um 07:35 schrieb Markus Armbruster:
Thomas Huth writes:
We can simply use the g_ascii_isxdigit() from the glib instead.
... or even use unescape_string() from the glib?
https://docs.gtk.org/glib/type_func.Uri.unescape_string.html
Regards,
Stefan
Thomas Huth writes:
> We can simply use the g_ascii_isxdigit() from the glib instead.
>
> Signed-off-by: Thomas Huth
> ---
> util/uri.c | 11 +--
> 1 file changed, 1 insertion(+), 10 deletions(-)
>
> diff --git a/util/uri.c b/util/uri.c
> index dcb3305236..7411c5ba14 100644
> ---
LAM uses CR3[61] and CR3[62] to configure/enable LAM on user pointers.
LAM uses CR4[28] to configure/enable LAM on supervisor pointers.
For CR3 LAM bits, no additional handling needed:
- TCG
LAM is not supported for TCG of target-i386. helper_write_crN() and
helper_vmrun() check max physical
Linear-address masking (LAM) [1], modifies the checking that is applied to
*64-bit* linear addresses, allowing software to use of the untranslated
address bits for metadata and masks the metadata bits before using them as
linear addresses to access memory.
When the feature is virtualized and
From: Robert Hoo
Linear Address Masking (LAM) is a new Intel CPU feature, which allows
software to use of the untranslated address bits for metadata.
The bit definition:
CPUID.(EAX=7,ECX=1):EAX[26]
Add CPUID definition for LAM.
Note LAM feature is not supported for TCG of target-i386, LAM
On 1/12/24 10:42, Thomas Huth wrote:
On 12/01/2024 05.57, Harsh Prateek Bora wrote:
On 1/11/24 22:16, Thomas Huth wrote:
The character "+" is now forbidden in QOM device names (see commit
b447378e1217 - "Limit type names to alphanumerical and some few special
characters"). For the
We can simply use the g_ascii_isxdigit() from the glib instead.
Signed-off-by: Thomas Huth
---
util/uri.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff --git a/util/uri.c b/util/uri.c
index dcb3305236..7411c5ba14 100644
--- a/util/uri.c
+++ b/util/uri.c
@@ -1561,15
On 12/01/2024 05.57, Harsh Prateek Bora wrote:
On 1/11/24 22:16, Thomas Huth wrote:
The character "+" is now forbidden in QOM device names (see commit
b447378e1217 - "Limit type names to alphanumerical and some few special
characters"). For the "power5+" and "power7+" CPU names, there is
On 11/01/2024 23.28, Helge Deller wrote:
On 1/9/24 17:01, Richard Henderson wrote:
On 1/9/24 22:16, Helge Deller wrote:
On 1/9/24 10:57, Richard Henderson wrote:
On 1/8/24 00:22, del...@kernel.org wrote:
From: Helge Deller
Add support for the qemu --nodefaults option, which will disable
On 1/11/24 22:16, Thomas Huth wrote:
The character "+" is now forbidden in QOM device names (see commit
b447378e1217 - "Limit type names to alphanumerical and some few special
characters"). For the "power5+" and "power7+" CPU names, there is
currently a hack in type_name_is_valid() to still
Hello,
this series adds xtensa core 'sample_controller32' with 32 foreground
entry MPU, adds missing translation for the 'wsr.mpucfg' opcode and
makes xtensa/tcg/tests work with the new core.
Max Filippov (4):
target/xtensa: add translation for wsr.mpucfg
target/xtensa: import
- atomctl is available not only in the presence of s32c1i, but also with
the exclusive access option
- cacheadrdis SR has the same number as cacheattr, mpuenb SR has the
same number as rasid and mpucfg SR has the same number as dtlbcfg,
add MPU case to the tests of these SR numbers
Drop MEMORY clause and related size definitions and output section
region specifications. Drop .rodata output section as the tests don't
use it. Add DATA_SEGMENT_ALIGN/DATA_SEGMENT_END around .data and .bss to
let the linker make an RW segment for data. Reserve 1M for stack instead
of almost 128M.
Although MPUCFG is not writable, the opcode wsr.mpucfg is defined and it
just does nothing. Define wsr.mpucfg as nop.
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/target/xtensa/translate.c b/target/xtensa/translate.c
On Thu, Jan 11, 2024 at 5:20 AM Daniel Henrique Barboza
wrote:
>
> Himanshu,
>
> We spoke offline but let's make everyone aware:
>
> - 'sdtrig' should be marked with 'x-' and be an experimental extension since
> the spec isn't yet frozen;
>
> - Alvin sent a patch to the ML adding the 'mcontext'
On 1/12/24 02:10, Richard Henderson wrote:
On 1/12/24 01:23, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
tests/plugin/inline.c | 17 -
1 file changed, 17 deletions(-)
Was this supposed to be together with patch 6?
My goal was to have a version that
On 1/3/24 21:33, Alex Bennée wrote:
We can only request a list of registers once the vCPU has been
initialised so the user needs to use either call the get function on
vCPU initialisation or during the translation phase.
We don't expose the reg number to the plugin instead hiding it behind
an
On Wed, Jan 10, 2024 at 2:03 PM Himanshu Chauhan
wrote:
>
> This patch makes the debug trigger (sdtrig) capability
> as an extension and exports it as an ISA string. The sdtrig
> extension may or may not be implemented in a system. The
> -cpu rv64,sdtrig=
> option can be used to
On Wed, Jan 10, 2024 at 2:03 PM Himanshu Chauhan
wrote:
>
> When sdtrig is turned off by "sdtrig=false" option, raise
> and illegal instruction exception on any read/write to
> sdtrig CSRs.
>
> Signed-off-by: Himanshu Chauhan
> ---
> target/riscv/csr.c | 20
> 1 file
On Sat, Jan 6, 2024 at 9:07 AM Daniel Henrique Barboza
wrote:
>
> Hi,
>
> This new version contains changes due to a rebase with current
> riscv-to-apply.next, after "[PATCH v13 00/26] riscv: RVA22 profiles
> support" was queued.
>
> Most notable change is a new patch (12) that was added to
There is no "size" field in vring address structure. Remove it.
Fixes: 5fc0e00291 ("Add vhost-user protocol documentation")
Signed-off-by: Andrey Ignatov
---
docs/interop/vhost-user.rst | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/docs/interop/vhost-user.rst
Hi Phil,
On 1/11/24 18:21, Philippe Mathieu-Daudé wrote:
On 11/1/24 08:30, Gavin Shan wrote:
On 1/11/24 16:47, Philippe Mathieu-Daudé wrote:
Per cpu_model_from_type() docstring (added in commit 445946f4dd):
* Returns: CPU model name or NULL if the CPU class doesn't exist
We must check
On Sat, Jan 6, 2024 at 9:09 AM Daniel Henrique Barboza
wrote:
>
> Keep all class properties in riscv_cpu_properties[].
>
> Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 110 +++--
> 1 file
On Sat, Jan 6, 2024 at 9:07 AM Daniel Henrique Barboza
wrote:
>
> Keep all class properties in riscv_cpu_properties[].
>
> Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 68 --
> 1 file
On Sat, Jan 6, 2024 at 9:09 AM Daniel Henrique Barboza
wrote:
>
> Keep all class properties in riscv_cpu_properties[].
>
> Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 69 +-
> 1 file
On Fri, Jan 12, 2024 at 2:17 AM Rob Bradford wrote:
>
> Add support for the new (fast track) 'B' extension [1] this extension
> uses the misa.B bit to indicate that the Zba, Zbb and Zbs extensions are
> present.
>
> Since this extension is not yet frozen it is exposed via the 'x-b' cpu
> option.
On Thu, Jan 11, 2024 at 03:46:02PM -0300, Fabiano Rosas wrote:
> > (1) Does this apply to all io channel users, or only migration?
>
> All file channel users.
I meant the whole idea of flushing on close, on whether there will be
iochannel users that will prefer not do so? It's a matter of where
On Sat, Jan 6, 2024 at 9:09 AM Daniel Henrique Barboza
wrote:
>
> Do the same we did with 'cbom_blocksize' in the previous patch.
>
> Signed-off-by: Daniel Henrique Barboza
Reviewed-by: Alistair Francis
Alistair
> ---
> target/riscv/cpu.c | 38 +-
> 1
On Sat, Jan 6, 2024 at 10:09 AM Daniel Henrique Barboza
wrote:
>
> To turn cbom_blocksize and cboz_blocksize into class properties we need
> KVM specific changes.
>
> KVM is creating its own version of these options with a customized
> setter() that prevents users from picking an invalid value
On Wed, Jan 10, 2024 at 5:47 AM Inès Varhol
wrote:
>
> The SYSCFG input GPIOs aren't connected yet. When the STM32L4x5 GPIO
> device will be implemented, its output GPIOs will be connected to the
> SYSCFG input GPIOs.
>
> Tested-by: Philippe Mathieu-Daudé
> Reviewed-by: Philippe Mathieu-Daudé
>
On Tue, Jan 9, 2024 at 1:43 AM Alex Bennée wrote:
>
> Alex Bennée writes:
>
> > From: Akihiko Odaki
> >
> > It is initialized with a simple assignment and there is little room for
> > error. In fact, the validation is even more complex.
> >
> > Signed-off-by: Akihiko Odaki
> > Acked-by: LIU
On Thu, Jan 4, 2024 at 5:04 AM Alex Bennée wrote:
>
> From: Akihiko Odaki
>
> misa_mxl_max is now a class member and initialized only once for each
> class. This also moves the initialization of gdb_core_xml_file which
> will be referenced before realization in the future.
>
> Signed-off-by:
On Thu, Jan 4, 2024 at 3:44 AM Alex Bennée wrote:
>
> From: Akihiko Odaki
>
> misa_mxl_max is common for all instances of a RISC-V CPU class so they
> are better put into class.
>
> Signed-off-by: Akihiko Odaki
> Message-Id: <20231213-riscv-v7-3-a760156a3...@daynix.com>
> Signed-off-by: Alex
On Thu, Jan 11, 2024 at 02:59:05PM +, Jonathan Cameron wrote:
> From: Hyeonggon Yoo <42.hye...@gmail.com>
>
> In the current mdev_reg_read() implementation, it consistently returns
> that the Media Status is Ready (01b). This was fine until commit
> 25a52959f99d ("hw/cxl: Add support for
On Thu, Jan 11, 2024 at 11:05 PM Philippe Mathieu-Daudé
wrote:
>
> The tcg_cpu_FOO() names are riscv specific, so rename
> them as riscv_tcg_cpu_FOO() (as other names in this file)
> to ease navigating the code.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
On Thu, Jan 11, 2024 at 10:05 PM Philippe Mathieu-Daudé
wrote:
>
> accel_init_ops_interfaces() is system specific, so
> rename it as accel_system_init_ops_interfaces() to
> ease navigating the code.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Alistair
> ---
>
On Fri, Jan 12, 2024 at 2:17 AM Rob Bradford wrote:
>
> If the B extension is enabled warn if the user has disabled any of the
> required extensions that are part of the 'B' extension. Conversely
> enable the extensions that make up the 'B' extension if it is enabled.
>
> Signed-off-by: Rob
On Fri, Jan 12, 2024 at 3:38 AM Rob Bradford wrote:
>
> Add the infrastructure for the 'B' extension which is the union of the
> Zba, Zbb and Zbs instructions.
>
> Signed-off-by: Rob Bradford
> Reviewed-by: Daniel Henrique Barboza
> Reviewed-by: Andrew Jones
Reviewed-by: Alistair Francis
On 1/9/24 17:01, Richard Henderson wrote:
On 1/9/24 22:16, Helge Deller wrote:
On 1/9/24 10:57, Richard Henderson wrote:
On 1/8/24 00:22, del...@kernel.org wrote:
From: Helge Deller
Add support for the qemu --nodefaults option, which will disable the
following default devices:
- lsi53c895a
On Thu, Jan 11, 2024 at 4:33 AM Markus Armbruster wrote:
>
> John Snow writes:
>
> > On Thu, Nov 23, 2023, 8:03 AM Markus Armbruster wrote:
> >
> >> John Snow writes:
> >>
> >> > On Wed, Nov 22, 2023 at 7:59 AM Markus Armbruster
> >> > wrote:
> >> >>
> >> >> John Snow writes:
> >> >>
> >>
On 1/12/24 01:23, Pierrick Bouvier wrote:
Since we need a fixed offset between count memory location, we now need
a contiguous array of CPUCount (instead of array of pointers).
Signed-off-by: Pierrick Bouvier
---
tests/plugin/bb.c | 54 +++
1 file
On 1/12/24 01:23, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
tests/plugin/insn.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson
@@ -195,6 +200,7 @@ QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id_t
id,
On 1/12/24 01:23, Pierrick Bouvier wrote:
Introduce a lock so global count is correct.
This was found by comparing with new inline per_vcpu inline op.
Signed-off-by: Pierrick Bouvier
---
tests/plugin/mem.c | 3 +++
1 file changed, 3 insertions(+)
Reviewed-by: Richard Henderson
r~
On 1/12/24 01:23, Pierrick Bouvier wrote:
Signed-off-by: Pierrick Bouvier
---
tests/plugin/inline.c | 17 -
1 file changed, 17 deletions(-)
Was this supposed to be together with patch 6?
r~
diff --git a/tests/plugin/inline.c b/tests/plugin/inline.c
index
On 1/12/24 01:23, Pierrick Bouvier wrote:
Extends API with three new functions:
qemu_plugin_register_vcpu_{tb, insn, mem}_exec_inline_per_vcpu().
Compared to non per_vcpu versions, ptr is now a base, and current
cpu_index and an offset are used to compute memory location on which
operation
On 1/12/24 01:23, Pierrick Bouvier wrote:
Instead of working on a fixed memory location, allow to index it based
on cpu_index and a given offset (ptr + cpu_index * offset).
Current semantic is not modified as we use a 0 offset, thus inline
operation still targets always the same memory location.
On 1/12/24 03:24, Philippe Mathieu-Daudé wrote:
Due to missing headers, when including "tb-jmp-cache.h" we might get:
accel/tcg/tb-jmp-cache.h:21:21: error: field ‘rcu’ has incomplete type
21 | struct rcu_head rcu;
| ^~~
Hi Richard, Alistair
On 10/30/23 14:17, Richard Henderson wrote:
> diff --git a/linux-user/riscv/Makefile.vdso b/linux-user/riscv/Makefile.vdso
> new file mode 100644
> index 00..2c257dbfda
> --- /dev/null
> +++ b/linux-user/riscv/Makefile.vdso
> @@ -0,0 +1,15 @@
> +include
On 1/12/24 03:18, Philippe Mathieu-Daudé wrote:
Since the CPUState::start-powered-off property is irrelevant
to user emulation, restrict it to system emulation.
Signed-off-by: Philippe Mathieu-Daudé
---
cpu-target.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
Reviewed-by:
On 1/12/24 03:20, Philippe Mathieu-Daudé wrote:
Keep system/watchpoint.c accelerator-agnostic by moving
TCG specific code to accel/tcg/watchpoint.c. Update meson.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/watchpoint.c | 143 +
Solaris has net/if_arp.h and netinet/if_ether.h rather than net/ethernet.h,
but does not define ETHER_ADDR_LEN, instead providing ETHERADDRL.
Signed-off-by: Nick Briggs
---
qga/commands-posix.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/qga/commands-posix.c
Solaris has #defines for htonll and ntohll which cause syntax errors
when compiling code that attempts to (re)define these functions..
Signed-off-by: Nick Briggs
---
migration/rdma.c | 4
1 file changed, 4 insertions(+)
diff --git a/migration/rdma.c b/migration/rdma.c
index
> -Original Message-
> From: Taylor Simpson
> Sent: Sunday, December 10, 2023 4:07 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain ; Matheus Bernardino (QUIC)
> ; Sid Manning ; Marco
> Liebel (QUIC) ; richard.hender...@linaro.org;
> phi...@linaro.org; a...@rev.ng; a...@rev.ng;
> -Original Message-
> From: Taylor Simpson
> Sent: Sunday, December 10, 2023 4:07 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain ; Matheus Bernardino (QUIC)
> ; Sid Manning ; Marco
> Liebel (QUIC) ; richard.hender...@linaro.org;
> phi...@linaro.org; a...@rev.ng; a...@rev.ng;
> -Original Message-
> From: Taylor Simpson
> Sent: Sunday, December 10, 2023 4:07 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain ; Matheus Bernardino (QUIC)
> ; Sid Manning ; Marco
> Liebel (QUIC) ; richard.hender...@linaro.org;
> phi...@linaro.org; a...@rev.ng; a...@rev.ng;
> -Original Message-
> From: Taylor Simpson
> Sent: Sunday, December 10, 2023 4:07 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain ; Matheus Bernardino (QUIC)
> ; Sid Manning ; Marco
> Liebel (QUIC) ; richard.hender...@linaro.org;
> phi...@linaro.org; a...@rev.ng; a...@rev.ng;
> -Original Message-
> From: Taylor Simpson
> Sent: Sunday, December 10, 2023 4:07 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain ; Matheus Bernardino (QUIC)
> ; Sid Manning ; Marco
> Liebel (QUIC) ; richard.hender...@linaro.org;
> phi...@linaro.org; a...@rev.ng; a...@rev.ng;
> -Original Message-
> From: Taylor Simpson
> Sent: Sunday, December 10, 2023 4:07 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain ; Matheus Bernardino (QUIC)
> ; Sid Manning ; Marco
> Liebel (QUIC) ; richard.hender...@linaro.org;
> phi...@linaro.org; a...@rev.ng; a...@rev.ng;
> -Original Message-
> From: Taylor Simpson
> Sent: Sunday, December 10, 2023 4:07 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain ; Matheus Bernardino (QUIC)
> ; Sid Manning ; Marco
> Liebel (QUIC) ; richard.hender...@linaro.org;
> phi...@linaro.org; a...@rev.ng; a...@rev.ng;
> -Original Message-
> From: Taylor Simpson
> Sent: Sunday, December 10, 2023 4:07 PM
> To: qemu-devel@nongnu.org
> Cc: Brian Cain ; Matheus Bernardino (QUIC)
> ; Sid Manning ; Marco
> Liebel (QUIC) ; richard.hender...@linaro.org;
> phi...@linaro.org; a...@rev.ng; a...@rev.ng;
Sort of resolved: We were able to find a good-enough workaround. In case
anyone else is running into this, here's what we did:
By dropping to the uboot console and running the command
```
mw.l 0x1e6e2188 0xbabecafe
```
The magic number is set in the SCU regardless of how the race goes, and the
11.01.2024 15:02, Philippe Mathieu-Daudé :
The tcg_cpu_FOO() names are x86 specific, so rename
them as x86_tcg_cpu_FOO() (as other names in this file)
to ease navigating the code.
Reviewed-by: Michael Tokarev
Wow, that's a large list of recipients..
Signed-off-by: Philippe Mathieu-Daudé
I will be leaving Nutanix so updating my email in MAINTAINERS to my
personal email for now.
Signed-off-by: Raphael Norwitz
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 00ec1f7eca..d7bb52bfd1 100644
--- a/MAINTAINERS
+++
It should use T8_BASE instead of T0_BASE.
Felix Wu (1):
SMBIOS type 8 should use T8_BASE.
hw/smbios/smbios.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--
2.43.0.275.g3460e3d667-goog
---
hw/smbios/smbios.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/smbios/smbios.c b/hw/smbios/smbios.c
index 2a90601ac5..7dda84b284 100644
--- a/hw/smbios/smbios.c
+++ b/hw/smbios/smbios.c
@@ -591,6 +591,7 @@ bool smbios_skip_table(uint8_t type, bool required_table)
Check if the listener has been registered or not, so it needs to be
registered again at start.
Signed-off-by: Eugenio Pérez
---
include/hw/virtio/vhost-vdpa.h | 6 ++
hw/virtio/vhost-vdpa.c | 7 ++-
2 files changed, 12 insertions(+), 1 deletion(-)
diff --git
Since commit f6fe3e333f ("vdpa: move memory listener to
vhost_vdpa_shared") this piece of code repeatedly assign
shared->listener members. This was not a problem as it was not used
until device start.
However next patches move the listener registration to this
vhost_vdpa_init function. When the
Current memory operations like pinning may take a lot of time at the
destination. Currently they are done after the source of the migration is
stopped, and before the workload is resumed at the destination. This is a
period where neigher traffic can flow, nor the VM workload can continue
The backend does not reset them until the vdpa file descriptor is closed
so there is no harm in doing it only once.
This allows the destination of a live migration to premap memory in
batches, using VHOST_BACKEND_F_IOTLB_BATCH.
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-vdpa.c | 7
To map the guest memory while it is migrating we need to create the
iova_tree, as long as the destination uses x-svq=on. Checking to not
override it.
The function vhost_vdpa_net_client_stop clear it if the device is
stopped. If the guest starts the device again, the iova tree is
recreated by
It will be used directly by vhost_vdpa_init.
Signed-off-by: Eugenio Pérez
---
hw/virtio/vhost-vdpa.c | 60 +-
1 file changed, 30 insertions(+), 30 deletions(-)
diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c
index ddae494ca8..33ae285f87
Current memory operations like pinning may take a lot of time at the
destination. Currently they are done after the source of the migration is
stopped, and before the workload is resumed at the destination. This is a
period where neigher traffic can flow, nor the VM workload can continue
> On Jan 10, 2024, at 8:01 AM, Philippe Mathieu-Daudé wrote:
>
> IIUC Goldfish virtual HW is maintained externally by Google
> https://android.googlesource.com/platform/external/qemu/+/master/docs/GOLDFISH-VIRTUAL-HARDWARE.TXT
>
> I suppose the spec needs to be updated before the change can
Peter Xu writes:
> On Mon, Nov 27, 2023 at 05:25:47PM -0300, Fabiano Rosas wrote:
>> From: Nikolay Borisov
>>
>> Add utility methods that will be needed when implementing 'fixed-ram'
>> migration capability.
>>
>> qemu_file_is_seekable
>> qemu_put_buffer_at
>> qemu_get_buffer_at
>>
Peter Xu writes:
> On Mon, Nov 27, 2023 at 05:25:46PM -0300, Fabiano Rosas wrote:
>> Make sure the data is flushed to disk before closing file
>> channels. This will ensure data is on disk at the end of a migration
>> to file.
>
> Looks reasonable, but just two (possibly naive) questions:
>
>
Peter Xu writes:
> On Mon, Nov 27, 2023 at 05:25:42PM -0300, Fabiano Rosas wrote:
>> Hi,
>>
>> In this v3:
>>
>> Added support for the "file:/dev/fdset/" syntax to receive multiple
>> file descriptors. This allows the management layer to open the
>> migration file beforehand and pass the file
On 11/01/2024 13.02, Philippe Mathieu-Daudé wrote:
cpu_class_init() is specific to s390x SCLP, so rename
it as sclp_cpu_class_init() (as other names in this file)
to ease navigating the code.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/s390x/sclpcpu.c | 4 ++--
1 file changed, 2
We’ve noticed inconsistent behavior when running a large number of aspeed
ast2600 executions, that seems to be tied to a race condition in the smp
boot when executing on TCG-QEMU, and were wondering what a good mediation
strategy might be.
The problem first shows up as part of SMP boot. On a run
When running the command `qemu-img snapshot -l SNAPSHOT` the output of
VM_CLOCK (measures the offset between host and VM clock) cannot to
accommodate values in the order of thousands (4-digit).
This line [1] hints on the problem. Additionally, the column width for
the VM_CLOCK field was reduced
On 1/11/24 17:46, Thomas Huth wrote:
For consistency we should drop the names with a "+" in it in the
long run.
Signed-off-by: Thomas Huth
---
docs/about/deprecated.rst | 9 +
1 file changed, 9 insertions(+)
diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst
index
On 1/11/24 17:46, Thomas Huth wrote:
The character "+" is now forbidden in QOM device names (see commit
b447378e1217 - "Limit type names to alphanumerical and some few special
characters"). For the "power5+" and "power7+" CPU names, there is
currently a hack in type_name_is_valid() to still
On 1/11/24 19:57, Philippe Mathieu-Daudé wrote:
Hi Pierrick,
On 11/1/24 15:23, Pierrick Bouvier wrote:
For now, it simply performs instruction, bb and mem count, and ensure
that inline vs callback versions have the same result. Later, we'll
extend it when new inline operations are added.
Use
On 08/01/2024 16.13, Alex Bennée wrote:
With the latest fixes for #2010 and #2013 these tests look pretty
stable now. Of course the only way to be really sure is to run it in
the CI infrastructure and see what breaks.
Acked-by: Pavel Dovgalyuk
Signed-off-by: Alex Bennée
Message-Id:
From: Peter Maydell
Sometimes the CI "pages" job fails with a message like this from
htags:
$ htags -anT --tree-view=filetree -m qemu_init -t "Welcome to the QEMU
sourcecode"
htags: Negative exec line limit = -371
This is due to a bug in hflags where if the environment is too large it
falls
From: Zhao Liu
g_path_get_basename() is a portable utility function that has the
advantage of not modifying the string argument, so it should be
preferred over basename().
And also to avoid potential compile breakage with the Musl C library
similar to [1], replace basename() with
From: Zhao Liu
As commit 3e015d815b3f ("use g_path_get_basename instead of basename")
said, g_path_get_dirname() should be preferred over dirname() since
the former is a portable utility function that has the advantage of not
modifying the string argument.
Replace dirname() with
From: Daniel P. Berrangé
This reverts commit cadfc7293977ecadc2d6c48d7cffc553ed2f85f1.
The test was not timing out because of slow execution. It was
timing out due to a race condition leading to the client QEMU
attempting (and fatally failing) to connect before the server
QEMU was listening.
From: Samuel Tardieu
An apparent copy-paste error tests for the presence of the
virtio-rng-ccw device in order to perform tests on the virtio-scsi-ccw
device.
Signed-off-by: Samuel Tardieu
Message-ID: <20240106130121.1244993-1-...@rfc1149.net>
Fixes: 65331bf5d1 ("tests/qtest: Check for
From: Ilya Leoshkevich
LAE should set the access register corresponding to the first operand,
instead, it always modifies access register 1.
Co-developed-by: Ido Plat
Cc: qemu-sta...@nongnu.org
Fixes: a1c7610a6879 ("target-s390x: implement LAY and LAEY instructions")
Reviewed-by: David
From: Daniel P. Berrangé
This reverts commit dc864d3a3777424187280e50c9bfb84dced54f12.
This functionality is not required after the previous revert
Signed-off-by: "Daniel P. Berrangé"
Message-ID: <20240104162942.211458-3-berra...@redhat.com>
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Thomas
It's a common scenario to copy guest images from one host to another
to run the guest on the other machine. This (of course) does not work
with "secure execution" guests since they are encrypted with one certain
host key. However, if you still (accidentally) do it, you only get a
very
From: Daniel P. Berrangé
When running 'info network', if the stream backend is still in
the process of connecting, or waiting for an incoming connection,
no information is displayed.
There is also no way to distinguish whether the server is still
in the process of setting up the listener
From: Daniel P. Berrangé
This reverts commit 0daaf2761f6d268ffaa2d01d450e202e127452b1.
The test was not timing out because of slow execution. It was
timing out due to a race condition leading to the client QEMU
attempting (and fatally failing) to connect before the server
QEMU was listening.
From: Mark Cave-Ayland
There is no need to dynamically allocate the memory region from the heap.
Signed-off-by: Mark Cave-Ayland
Message-ID: <20231227210212.245106-1-mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Thomas Huth
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Laurent Vivier
From: Daniel P. Berrangé
QMP device_add does not historically validate the parameter types.
At some point it will likely change to enforce correct types, to
match behaviour of -device. The failover property is expected to
be a boolean in JSON.
Signed-off-by: "Daniel P. Berrangé"
Message-ID:
From: Ilya Leoshkevich
Add a small test to prevent regressions. Userspace runs in primary
mode, so LAE should always set the access register to 0.
Signed-off-by: Ilya Leoshkevich
Message-ID: <20240111092328.929421-3-...@linux.ibm.com>
Reviewed-by: Thomas Huth
Signed-off-by: Thomas Huth
---
Hi Peter!
The following changes since commit 34eac35f893664eb8545b98142e23d9954722766:
Merge tag 'pull-riscv-to-apply-20240110' of
https://github.com/alistair23/qemu into staging (2024-01-10 11:41:56 +)
are available in the Git repository at:
https://gitlab.com/thuth/qemu.git
From: Daniel P. Berrangé
When naming glib tests if the name of one test is a substring of the
name of another test, it is not possible to use the '-p /the/name'
option to run a single test.
Signed-off-by: "Daniel P. Berrangé"
Message-ID: <20240104162942.211458-7-berra...@redhat.com>
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