Re: [Ql-Users] Re-upping QL-SD new driver [OT]

2018-01-23 Thread Wolf via Ql-Users
Hi Per, Keep on dealing! :) Are you waiting for the next bug-fix? Wolfgang ___ QL-Users Mailing List

[Ql-Users] Re-upping QL-SD new driver [OT]

2018-01-23 Thread pjwitte via Ql-Users
On 23/01/2018 11:33, Wolfgang Lenerz via Ql-Users wrote: Hi, Re-upped! Been watching The Wire? - The wire? I dont want to muddy the list with OT, but I think its only polite to reply: The Wire is a US TV series about the drug epidemic in Baltimore, and no doubt elsewhere in Americastan.

Re: [Ql-Users] QL-SD new driver

2018-01-23 Thread pgraf--- via Ql-Users
On 23 Jan 2018 at 9:21, Graeme Gregory via Ql-Users wrote: > > I've already started putting together a clone using an Xilinx > > XC9572XL, which I have lying around. The Verilog file compiled from > > the get-go, I just had to remove the additional SS lines because of > > Pin restrictions in the

Re: [Ql-Users] QL-SD new driver

2018-01-23 Thread Derek via Ql-Users
Hi, There is no parallel port on the Gold Card. There is a Parallel Port on the Super Gold Card. But it is not bi-directional. Only works as a simple printer port. But maybe some output pins could be turned into Inputs. RegardsDerek Original message From: Graeme Gregory via

Re: [Ql-Users] QL-SD new driver

2018-01-23 Thread Wolfgang Lenerz via Ql-Users
Hi, > Re-upped! Been watching The Wire? - The wire? > Well, youre certainly keeping us QL junkies happy! ;) That's an unintended side-effect. Wolfgang ___ QL-Users Mailing List

Re: [Ql-Users] QL-SD new driver

2018-01-23 Thread pjwitte via Ql-Users
On 23/01/2018 05:48, Wolf via Ql-Users wrote: > done, re-upped with the keys. Ah, thats better, thanks :) Re-upped! Been watching The Wire? - Well, youre certainly keeping us QL junkies happy! ;) Per BTW, I forgot to add that the driver is for v. 0.82 of the interface. If you have v. 0.75,

Re: [Ql-Users] QL-SD new driver

2018-01-23 Thread Marcel Kilgus via Ql-Users
Graeme Gregory via Ql-Users wrote: > Doesnt gold card have a parralell port? > > That should be enough IO pins to connect an SD card which just needs SPI. I think bit-banging would noticably reduce the transfer speed. Marcel ___ QL-Users Mailing List

Re: [Ql-Users] QL-SD new driver

2018-01-23 Thread Graeme Gregory via Ql-Users
> I've already started putting together a clone using an Xilinx > XC9572XL, which I have lying around. The Verilog file compiled from > the get-go, I just had to remove the additional SS lines because of > Pin restrictions in the small chip on my eval board. The long lines to > the board might not

Re: [Ql-Users] QL-SD new driver

2018-01-23 Thread Marcel Kilgus via Ql-Users
Tobias Fröschle via Ql-Users wrote: > that Schmidt-trigger is already there. Nice little SMD bug under > the socket that sits in the ROMOEH line. Apparently, it doesn't help. At this point I'm just glad that my idea was not nonsense but turns out to be actually implemented in the design :-) And