Re: [PATCH v6 3/4] clk: pistachio: Fix PLL rate calculation in integer mode

2015-08-26 Thread Stephen Boyd
On 08/26, Govindraj Raja wrote: From: Zdenko Pulitika zdenko.pulit...@imgtec.com .recalc_rate callback for the fractional PLL doesn't take operating mode into account when calculating PLL rate. This results in the incorrect PLL rates when PLL is operating in integer mode. Operating mode

Re: [PATCH v6 2/4] clk: pistachio: Fix override of clk-pll settings from boot loader

2015-08-26 Thread Stephen Boyd
On 08/26, Govindraj Raja wrote: From: Zdenko Pulitika zdenko.pulit...@imgtec.com PLL enable callbacks are overriding PLL mode (int/frac) and Noise reduction (on/off) settings set by the boot loader which results in the incorrect clock rate. PLL mode and noise reduction are defined by the

Re: [PATCH v6 4/4] clk: pistachio: correct critical clock list

2015-08-26 Thread Stephen Boyd
On 08/26, Govindraj Raja wrote: From: Damien.Horsley damien.hors...@imgtec.com Current critical clock list for pistachio enables only mips and sys clocks by default but there are also other clocks that are not claimed by anyone and needs to be enabled by default. This patch updates the

Re: [PATCH v6 1/4] clk: pistachio: Fix 32bit integer overflows

2015-08-26 Thread Stephen Boyd
On 08/26, Govindraj Raja wrote: From: Zdenko Pulitika zdenko.pulit...@imgtec.com This commit fixes 32bit integer overflows throughout the pll driver (i.e. wherever the result of integer multiplication may exceed the range of u32). One of the functions affected by this problem is

[PATCH v3 1/2] ARM: dma-mapping: Don't use outer_flush_range when the L2C is coherent

2015-08-26 Thread Gregory CLEMENT
When a L2 cache controller is used in a system that provides hardware coherency, the entire outer cache operations are useless, and can be skipped. Moreover, on some systems, it is harmful as it causes deadlocks between the Marvell coherency mechanism, the Marvell PCIe controller and the

[PATCH v6 4/4] clk: pistachio: correct critical clock list

2015-08-26 Thread Govindraj Raja
From: Damien.Horsley damien.hors...@imgtec.com Current critical clock list for pistachio enables only mips and sys clocks by default but there are also other clocks that are not claimed by anyone and needs to be enabled by default. This patch updates the critical clocks that need to be enabled

[PATCH v6 2/4] clk: pistachio: Fix override of clk-pll settings from boot loader

2015-08-26 Thread Govindraj Raja
From: Zdenko Pulitika zdenko.pulit...@imgtec.com PLL enable callbacks are overriding PLL mode (int/frac) and Noise reduction (on/off) settings set by the boot loader which results in the incorrect clock rate. PLL mode and noise reduction are defined by the DSMPD and DACPD bits of the PLL control

[PATCH v6 1/4] clk: pistachio: Fix 32bit integer overflows

2015-08-26 Thread Govindraj Raja
From: Zdenko Pulitika zdenko.pulit...@imgtec.com This commit fixes 32bit integer overflows throughout the pll driver (i.e. wherever the result of integer multiplication may exceed the range of u32). One of the functions affected by this problem is .recalc_rate. It returns incorrect rate for some

[PATCH v6 3/4] clk: pistachio: Fix PLL rate calculation in integer mode

2015-08-26 Thread Govindraj Raja
From: Zdenko Pulitika zdenko.pulit...@imgtec.com .recalc_rate callback for the fractional PLL doesn't take operating mode into account when calculating PLL rate. This results in the incorrect PLL rates when PLL is operating in integer mode. Operating mode of fractional PLL is based on the value

[PATCH v6 0/4] clk: pistachio: Fixes for pll calculations.

2015-08-26 Thread Govindraj Raja
From: Govindraj Raja govindraj.r...@imgtec.com Patch 1/4 to 3/4 are pll calculation fixes for clock settings. Patch 4/4: Is a reword and repost based on earlier thread: http://patchwork.linux-mips.org/patch/10108/ Series Based on 4.2-rc7 Tested with Pistachio Bring-up-Board. Changes from v5:

[PATCH v3] mm: Check if section present during memory block registering

2015-08-26 Thread Yinghai Lu
Tony found on his setup, if memory block size 512M will cause crash during booting. BUG: unable to handle kernel paging request at ea007420 IP: [81670527] get_nid_for_pfn+0x17/0x40 PGD 128ffcb067 PUD 128ffc9067 PMD 0 Oops: [#1] SMP Modules linked in: CPU: 0 PID: 1

+ mm-check-if-section-present-during-memory-block-registering.patch added to -mm tree

2015-08-26 Thread akpm
The patch titled Subject: mm: check if section present during memory block registering has been added to the -mm tree. Its filename is mm-check-if-section-present-during-memory-block-registering.patch This patch should soon appear at

[folded-merged] mm-check-if-section-present-during-memory-block-unregistering.patch removed from -mm tree

2015-08-26 Thread akpm
The patch titled Subject: mm: check if section present during memory block (un)registering has been removed from the -mm tree. Its filename was mm-check-if-section-present-during-memory-block-unregistering.patch This patch was dropped because it was folded into

Re: [PATCH v3] mm: Check if section present during memory block registering

2015-08-26 Thread Andrew Morton
On Wed, 26 Aug 2015 14:38:35 -0700 (PDT) David Rientjes rient...@google.com wrote: --- linux-2.6.orig/drivers/base/node.c +++ linux-2.6/drivers/base/node.c @@ -390,7 +390,18 @@ int register_mem_sect_under_node(struct sect_end_pfn = section_nr_to_pfn(mem_blk-end_section_nr);

Re: [PATCH v3] mm: Check if section present during memory block registering

2015-08-26 Thread David Rientjes
On Wed, 26 Aug 2015, Andrew Morton wrote: Yup. I was feeling lazy but you motivated me. grunt, wheeze --- a/drivers/base/node.c~mm-check-if-section-present-during-memory-block-registering-fix +++ a/drivers/base/node.c @@ -390,14 +390,13 @@ int register_mem_sect_under_node(struct

Re: [PATCH v3] mm: Check if section present during memory block registering

2015-08-26 Thread David Rientjes
On Wed, 26 Aug 2015, Yinghai Lu wrote: Tony found on his setup, if memory block size 512M will cause crash during booting. BUG: unable to handle kernel paging request at ea007420 IP: [81670527] get_nid_for_pfn+0x17/0x40 PGD 128ffcb067 PUD 128ffc9067 PMD 0 Oops:

Re: [Intel-gfx] [PATCH] drm/i915: Check DP link status on long hpd too

2015-08-26 Thread Daniel Vetter
On Fri, Aug 21, 2015 at 09:40:12AM +0300, Jani Nikula wrote: On Thu, 20 Aug 2015, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä ville.syrj...@linux.intel.com We are no longer checkling the DP link status on long hpd. We used to do that from the .hot_plug() handler, but it was

[PATCH 1/3] IB/uverbs: reject invalid or unknown opcodes

2015-08-26 Thread Christoph Hellwig
We have many WR opcodes that are only supported in kernel space and/or require optional information to be copied into the WR structure. Reject all those not explicitly handled so that we can't pass invalid information to drivers. Cc: stable@vger.kernel.org Signed-off-by: Christoph Hellwig

Re: [Intel-gfx] [PATCH] drm/i915: Flush pipecontrol post-sync writes

2015-08-26 Thread Chris Wilson
On Wed, Aug 26, 2015 at 11:16:34AM +0200, Daniel Vetter wrote: On Fri, Aug 21, 2015 at 04:08:41PM +0100, Chris Wilson wrote: In order to flush the results from in-batch pipecontrol writes (used for example in glQuery) before declaring the batch complete (and so declaring the query results

Re: [Intel-gfx] [PATCH] drm/i915: Flush pipecontrol post-sync writes

2015-08-26 Thread Daniel Vetter
On Fri, Aug 21, 2015 at 04:08:41PM +0100, Chris Wilson wrote: In order to flush the results from in-batch pipecontrol writes (used for example in glQuery) before declaring the batch complete (and so declaring the query results coherent), we need to set the FlushEnable bit in our flushing

[PATCH] drm/i915: Set the map-and-fenceable flag for preallocated objects

2015-08-26 Thread Chris Wilson
As we mark the preallocated objects as bound, we should also flag them correctly as being map-and-fenceable (if appropriate!) so that latter users do not get confused and try and rebind the pinned vma in order to get a map-and-fenceable binding. Signed-off-by: Chris Wilson

Re: [RFC v2] netlink: add NETLINK_CAP_ACK socket option

2015-08-26 Thread Jiri Benc
On Tue, 25 Aug 2015 21:43:29 +0200, Christophe Ricard wrote: void netlink_ack(struct sk_buff *in_skb, struct nlmsghdr *nlh, int err) { + struct netlink_sock *nlk; struct sk_buff *skb; struct nlmsghdr *rep; struct nlmsgerr *errmsg; size_t payload =

Re: [PATCH] drm/i915: Set the map-and-fenceable flag for preallocated objects

2015-08-26 Thread Daniel Vetter
On Wed, Aug 26, 2015 at 03:06:59PM +0200, Daniel Vetter wrote: On Wed, Aug 26, 2015 at 12:55:57PM +0100, Chris Wilson wrote: As we mark the preallocated objects as bound, we should also flag them correctly as being map-and-fenceable (if appropriate!) so that latter users do not get confused

Re: [PATCH] of: device: fix NULL pointer dereference on driver removal

2015-08-26 Thread Rob Herring
On Tue, Aug 25, 2015 at 2:34 PM, Felipe Balbi ba...@ti.com wrote: If we don't insert resources into the resource tree, calls to of_platform_depopulate() will end up in NULL pointer dereferences because the resource parent will be set to NULL even though we still have more resources to go

Re: [PATCH] of: device: fix NULL pointer dereference on driver removal

2015-08-26 Thread Felipe Balbi
On Wed, Aug 26, 2015 at 08:14:36AM -0500, Rob Herring wrote: On Tue, Aug 25, 2015 at 2:34 PM, Felipe Balbi ba...@ti.com wrote: If we don't insert resources into the resource tree, calls to of_platform_depopulate() will end up in NULL pointer dereferences because the resource parent will

Re: [PATCH] drm/i915: Set the map-and-fenceable flag for preallocated objects

2015-08-26 Thread Daniel Vetter
On Wed, Aug 26, 2015 at 12:55:57PM +0100, Chris Wilson wrote: As we mark the preallocated objects as bound, we should also flag them correctly as being map-and-fenceable (if appropriate!) so that latter users do not get confused and try and rebind the pinned vma in order to get a

Re: [PATCH] drm/i915: Set the map-and-fenceable flag for preallocated objects

2015-08-26 Thread Chris Wilson
On Wed, Aug 26, 2015 at 03:06:59PM +0200, Daniel Vetter wrote: On Wed, Aug 26, 2015 at 12:55:57PM +0100, Chris Wilson wrote: As we mark the preallocated objects as bound, we should also flag them correctly as being map-and-fenceable (if appropriate!) so that latter users do not get confused