Attila Kinali wrote:
On Sun, 23 Dec 2012 22:45:40 +0100
Fabio Eboli wrote:
Il 2012-12-23 07:42 Bruce Griffiths ha scritto:
The classic TAC using current mode switching is similar to the
attached circuit schematic.
http://pastebin.com/EkgqmgfE
I have a couple of smal
On Thu, 3 Jan 2013 21:28:17 +0100
Attila Kinali wrote:
> What is the reason behind the emitter followers Q1 and Q9?
> Respecitvely, why shouldnt R3/R4, R7/R8 be connected directly to V+/V-?
Scratch that question. Looking at the schematics again, it became obvious.
Attila
On Sun, 23 Dec 2012 22:45:40 +0100
Fabio Eboli wrote:
> Il 2012-12-23 07:42 Bruce Griffiths ha scritto:
>
> > The classic TAC using current mode switching is similar to the
> > attached circuit schematic.
>
> http://pastebin.com/EkgqmgfE
I have a couple of small questions about this circuit.
Fabio Eboli wrote:
Hello, hope you all had a happy Christmas.
Back to the topic.
Bob Camp asked:
Hi
One very simple question - how good would it do if you just did it
all with logic gates? Tri-state buffers and things like that….
Now that you are up to a 100 to 200 ns long pulse, a lot of the
Hi
You should check out the leakage of a typical tristate buffer. It's specified
at a level that makes it easy to test. Most of the parts you find have very low
leakage. Varicap diodes are similar in that respect, the leakage of real parts
is much lower than the 1 ua you see on the old specs.
Hello, hope you all had a happy Christmas.
Back to the topic.
Bob Camp asked:
Hi
One very simple question - how good would it do if you just did it all
with logic gates? Tri-state buffers and things like that….
Now that you are up to a 100 to 200 ns long pulse, a lot of the fiddly
stuff about
Fabio
The simplest (lowest part count and least number of power supplies)
consists of a tristate buffer driving an RC circuit.
The PPS signal is connected directly to the buffer input whilst the
output of the PPS synchroniser (at least 2 stages to minimise the
probability of metastabilty at th
Fabio Eboli wrote:
Il 2012-12-23 11:36 Bruce Griffiths ha scritto:
The simulation indicates that the TAC capacitor charging current is
far from constant whilst charging.
This is due to the use of saturated switches rather than current
steering switches.
The capacitor charging current is poorly c
Fabio Eboli wrote:
Il 2012-12-23 07:42 Bruce Griffiths ha scritto:
The classic TAC using current mode switching is similar to the
attached circuit schematic.
Bruce I tried to replicate the circuit
you attached, the pic was low resolution
so I tried to figure the values.
This is the circuit as
Il 2012-12-23 07:42 Bruce Griffiths ha scritto:
The classic TAC using current mode switching is similar to the
attached circuit schematic.
Bruce I tried to replicate the circuit
you attached, the pic was low resolution
so I tried to figure the values.
This is the circuit asc text
http://pasteb
Il 2012-12-23 11:36 Bruce Griffiths ha scritto:
The simulation indicates that the TAC capacitor charging current is
far from constant whilst charging.
This is due to the use of saturated switches rather than current
steering switches.
The capacitor charging current is poorly controlled.
So in thi
Fabio Eboli wrote:
Hello, Bruce
Using saturated transistors as switches in the current source and
elsewhere isn't conducive to fast switching.
The traditional arrangement using current mode switches is much
faster and more predictable.
This is something I'd like to understand better.
I'm ref
Hi
One very simple question - how good would it do if you just did it all with
logic gates? Tri-state buffers and things like that….
Now that you are up to a 100 to 200 ns long pulse, a lot of the fiddly stuff
about "can't get a 2 ns pulse through it" goes away.
I'm not suggesting you tear up
Google "baker clamp" for more on this.
Tom
- Original Message -
From: "Alan Melia"
To: "Discussion of precise time and frequency measurement"
Sent: Saturday, December 22, 2012 6:28 PM
Subject: Re: [time-nuts] Questions about TAC frontend, and some
ECL, MECL, or PECL logic family schematics.
Alan
G3NYK
- Original Message -
From: "Fabio Eboli"
To: "Discussion of precise time and frequency measurement"
Sent: Saturday, December 22, 2012 11:00 PM
Subject: Re: [time-nuts] Questions about TAC frontend, and some m
Hello, Bruce
Using saturated transistors as switches in the current source and
elsewhere isn't conducive to fast switching.
The traditional arrangement using current mode switches is much
faster and more predictable.
This is something I'd like to understand better.
I'm referring to this schem
When it comes to phase, your interpolator may also be sensitive.
Dont know if I was clear enough, just in case I wasnt able
to explain well before: the data I collected didnt came from
the analog interpolator, but from the OutD that is a digital
out. The interpolator is still in it's infancy.
Magnus Danielson wrote:
Dear Fabio,
On 12/22/2012 02:34 PM, fabi...@quipo.it wrote:
I answer here to Bob Bill and Magnus.
Hi
I think I would grab some sort of USB thermometer and start logging
the room temperature.
CMOS input op-amps are a pretty good way to buffer the integrating
capacitor.
Dear Fabio,
On 12/22/2012 02:34 PM, fabi...@quipo.it wrote:
I answer here to Bob Bill and Magnus.
Hi
I think I would grab some sort of USB thermometer and start logging
the room temperature.
CMOS input op-amps are a pretty good way to buffer the integrating
capacitor.
They are cheap and have v
Hi
It is often harder to measure a pulse that goes from 0 to 100 ns than it is to
measure one that goes from 100 to 200 ns.
The resolution on the 0 to 100 measure will be 2X, but the non-linearities at
zero are quite difficult to deal with. The 100 to 200 measure can get to the
same resolutio
I answer here to Bob Bill and Magnus.
Hi
I think I would grab some sort of USB thermometer and start logging
the room temperature.
CMOS input op-amps are a pretty good way to buffer the integrating
capacitor.
They are cheap and have very low bias currents.
Bob
The suspect is temperature, th
Hi Fabio,
On 12/21/2012 01:43 PM, fabi...@quipo.it wrote:
Hello, while waiting fot the final doom, or a new
job (tough times here) here is another update of
the work I'm doing, sorry for the looong mail,
hope I'm not boring the readers.
I have a question about a some measurements I
made, and I'
Hi Fabio,
I am not crazy about your 10 MHz input circuit. You might want to consider
investigating John Miles input arrangement at the following web site:
http://www.ke5fx.com/ac.htm
I used it to drive an input to a divider chip without the output resistor or
capacitor.
BillWB6BNQ
fabi..
Hi
I think I would grab some sort of USB thermometer and start logging the room
temperature.
CMOS input op-amps are a pretty good way to buffer the integrating capacitor.
They are cheap and have very low bias currents.
Bob
On Dec 21, 2012, at 7:43 AM, fabi...@quipo.it wrote:
> Hello, while
Hello, while waiting fot the final doom, or a new
job (tough times here) here is another update of
the work I'm doing, sorry for the looong mail,
hope I'm not boring the readers.
I have a question about a some measurements I
made, and I'd like an opinion about a frontend
schematic I designed.
Fi
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