On Wednesday 17 December 2008, Jens Gehrlein wrote:
The following patches should increase the performance of the CFI
driver, particularly with regard to single word programming mode.
I tested it on TQM5200S with NOR-Flash Samsung K8P2815UQB, which has
no write buffer. At least no write
2008/12/3 Kim Phillips kim.phill...@freescale.com:
On Wed, 26 Nov 2008 09:38:27 +0100
Simon Boman simon.bo...@gmail.com wrote:
I have a modifed MPC8360 platform with a U-boot git-version from October.
Now I'm trying to install a Linux kernel and everything looks fine
until it starts to
Use CONFIG_SYS_BOOT_BLOCK_{EPN,RPN,PAGESZ} in start.S for the boot
block TLB for AS=1 mapping. Reduce the default size from 16M to 1M.
Change bne to blt in 85xx clear_bss to protect against the pointer
never being equal to _end if _end is not word aligned.
Signed-off-by: Ed Swarthout
Dear Jens,
In message 49489b37.9020...@tqs.de you wrote:
Because I'm neither familiar with qemu nor with svn I can't do that
with little effort (installation, familiarization, etc.). Beside that,
Actually you just have to check out and run it - that does not require
an in-depth understanding
On 07:24 Wed 17 Dec , Jens Gehrlein wrote:
Dear Jean-Christophe,
Jean-Christophe PLAGNIOL-VILLARD schrieb:
On 17:46 Tue 16 Dec , Jens Gehrlein wrote:
Jean-Christophe PLAGNIOL-VILLARD schrieb:
On 17:25 Tue 16 Dec , Jens Gehrlein wrote:
Hi list,
The following patches should
Use CONFIG_SYS_BOOT_BLOCK_{EPN,RPN,PAGESZ} in start.S for the boot
block TLB for AS=1 mapping. Reduce the default size from 16M to 1M.
Change bne to blt in 85xx clear_bss to protect against the pointer
never being equal to _end if _end is not word aligned.
Signed-off-by: Ed Swarthout
Change bne to blt in 85xx clear_bss to protect against the pointer
never being equal to _end if _end is not word aligned.
snip
@@ -917,7 +929,7 @@ clear_bss:
stw r0,0(r3)
addir3,r3,4
cmplw 0,r3,r4
- bne 5b
+ blt 5b
6:
Should not they be
Hi all,
Stefan Roese wrote:
Hi Michael,
On Friday 12 December 2008, michael wrote:
In the last ehci patch I add myself in the author of the code. I'm not
sure if it possible. I change
the codes and test it but I don't know if the change are sufficient.
You added yourself not as
On Tue, Dec 16, 2008 at 04:32:40PM -0700, Liu Dave wrote:
are available in the git repository at:
git://git.denx.de/u-boot-nand-flash.git master
Scott Wood (1):
NAND: Mark the BBT as scanned prior to calling scan_bbt.
Scott,
could you pick the patch
[PATCH v3]
Hi Santosh,
santosh pattar wrote:
Dear Ben,
Thank you very much for the suggestion. Actually i could able to get
the TFTP server up in u-boot. This Server wont run in the background
all the time. The senario is like this, Board comes up and checks for
validation of the image on the flash.
Hi Wolfgang,
Thank you for your quick response.
Actually I need to get one image which composed by the kernel ramdisk
image. I'd like to use the ramdisk as root file system. The combined
imageg is made by `mkimage -T multi...` command...
And I found that the image can not startup successfully
Jean-Christophe PLAGNIOL-VILLARD wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
doc/README.qemu_mips | 37 -
1 files changed, 36 insertions(+), 1 deletions(-)
Applied and pushed out, thanks.
One comment bellow.
diff
On 12:56 Wed 17 Dec , Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 1229513662-2128-1-git-send-email-plagn...@jcrosoft.com you wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
common/cmd_i2c.c | 58
Dear Santosh,
In message 19f3dfd10812170156l211f73fft61d1ad25f5724...@mail.gmail.com you
wrote:
We want to have server on the board so that it does what
we(Application running in different place/system) wants it to do.We
dont want the board to initiate the transfer.Always the application
Hi Dirk,
On Wednesday 17 December 2008, Dirk Eibach wrote:
Board support for the Guntermann Drunck PowerPC 440 ETX module.
Based on the AMCC Yosemite board support by Stefan Roese.
Signed-off-by: Dirk Eibach eib...@gdsys.de
---
- Fixup NOR mapping in ft_board_setup()
Why is this needed?
Add USB ehci ixp4xx host controller. Test on ixdp465 board.
(Re)start USB...
USB: IXP4XX init hccr cd000100 and hcor cd000140 hc_length 64
Register 10011 NbrPorts 1
USB EHCI 1.00
scanning bus for devices... 2 USB Device(s) found
scanning bus for storage devices... 1 Storage Device(s)
Hi All,
I am using u-boot 1.2.0 and tried to boot kernel with one ramdisk, but
it seems the u-boot doesn't load my ramdisk image at all. Please view
the below log message for detailed informations.
= tftpboot a080 uRamdisk
= iminfo a080
## Checking Image at a080 ...
Image Name:
Stefan Althoefer wrote:
Jean-Christophe PLAGNIOL-VILLARD schrieb:
diff -uprN u-boot-orig//lib_arm/board.c u-boot/lib_arm/board.c
--- u-boot-orig//lib_arm/board.c2008-12-02 17:25:32.0 +0100
+++ u-boot/lib_arm/board.c 2008-12-02 23:29:36.0 +0100
@@ -441,6 +441,11 @@
Greetings,
I've read the FAQ in
http://www.denx.de/wiki/view/DULG/LinuxHangsAfterUncompressingKernel,
concerning the 'Linux hangs after uncompression' problem.
And I'm not sure how to verify if the device tree I've generated (along
with the image) is alright or not. I don't know where I can find
Fixing the get_timer function to return time in miliseconds instead of
ticks. Also fixed PXA boards to use the conventional value of 1000 for
CONFIG_SYS_HZ.
Signed-off-by: Micha Kalfon smichak...@gmail.com
---
cpu/pxa/interrupts.c | 25 ++---
Kumar Gala wrote:
/* virt_to_phys will only work when address is in P1 or P2 */
-static __inline__ unsigned long virt_to_phys(volatile void *address)
+static inline phys_addr_t virt_to_phys(volatile void *address)
{
Is the volatile really needed?
The problem is that the 'packet'
Hi Stefan
Subject: Re: [U-Boot] [PATCH v7] ppc4xx: Add GDsys PowerPC
440 ETX board support.
Hi Dirk,
On Wednesday 17 December 2008, Dirk Eibach wrote:
Board support for the Guntermann Drunck PowerPC 440 ETX module.
Based on the AMCC Yosemite board support by Stefan Roese.
On Dec 17, 2008, at 9:47 AM, Haavard Skinnemoen wrote:
Kumar Gala wrote:
diff --git a/include/asm-avr32/io.h b/include/asm-avr32/io.h
index 06e52b1..d22cd35 100644
--- a/include/asm-avr32/io.h
+++ b/include/asm-avr32/io.h
@@ -125,4 +125,9 @@ static inline void unmap_physmem(void *vaddr,
On 14:10 Wed 17 Dec , michael wrote:
michael wrote:
Stefan Althoefer wrote:
Jean-Christophe PLAGNIOL-VILLARD schrieb:
diff -uprN u-boot-orig//lib_arm/board.c u-boot/lib_arm/board.c
--- u-boot-orig//lib_arm/board.c 2008-12-02 17:25:32.0 +0100
+++
Kumar Gala wrote:
Lets go w/volatile for now and worry about this post v2009.01
Sounds good to me.
Haavard
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On 15:15 Wed 17 Dec , Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20081217115717.gd26...@game.jcrosoft.org you wrote:
- enum { unknown, EDO, SDRAM, DDR2 } type;
+ enum { unknown, edo, sdram, ddr2 } type;
Sorry again, but lower case
Jean-Christophe PLAGNIOL-VILLARD wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
doc/README.qemu_mips | 67 +++--
1 files changed, 58 insertions(+), 9 deletions(-)
Applied and pushed out, thanks.
By the way, let
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 1229513662-2128-1-git-send-email-plagn...@jcrosoft.com you wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
common/cmd_i2c.c | 58 ++---
1 files changed, 28
Kumar Gala wrote:
diff --git a/include/asm-avr32/io.h b/include/asm-avr32/io.h
index 06e52b1..d22cd35 100644
--- a/include/asm-avr32/io.h
+++ b/include/asm-avr32/io.h
@@ -125,4 +125,9 @@ static inline void unmap_physmem(void *vaddr, unsigned
long len)
}
+static inline phys_addr_t
On Wednesday 17 December 2008, Eibach, Dirk wrote:
- Fixup NOR mapping in ft_board_setup()
Why is this needed? Doesn't the 4xx-common function handle
this correctly?
It is _not_ needed. You are right, 4xx-common handles everything well.
It was an error in my dts. And having a quick
michael wrote:
Stefan Althoefer wrote:
Jean-Christophe PLAGNIOL-VILLARD schrieb:
diff -uprN u-boot-orig//lib_arm/board.c u-boot/lib_arm/board.c
--- u-boot-orig//lib_arm/board.c 2008-12-02 17:25:32.0 +0100
+++ u-boot/lib_arm/board.c 2008-12-02 23:29:36.0 +0100
Hi,
Remy Bohmer wrote:
Hello Michael,
2008/12/17 Michael Trimarchi trimar...@gandalf.sssup.it:
Add USB ehci pci support. This patch doesn't include any
pci_ids and it is not tested on real hardware. To use it
add (for example) the following in the board configuration file:
#define
Stefan Roese wrote:
On Wednesday 17 December 2008, Michael Trimarchi wrote:
USB ehci code cleanup. Use handshake instead of infinite while loop
to check the STD_ASS status
Signed-off-by: Michael Trimarchi trimarchimich...@yahoo.it
---
drivers/usb/usb_ehci_core.c | 53
On Wednesday 17 December 2008, Michael Trimarchi wrote:
USB ehci code cleanup. Use handshake instead of infinite while loop
to check the STD_ASS status
Signed-off-by: Michael Trimarchi trimarchimich...@yahoo.it
---
drivers/usb/usb_ehci_core.c | 53
Hi Wolfgang,
please pull U-Boot/MIPS repository to pick up the following changes.
Thanks in advance,
Shinya
---
The following changes since commit aced78d852d0b009e8aaa1445af8cb40861ee549:
Wolfgang Denk (1):
Prepare 2009.01-rc1
are available in the git repository at:
Jean-Christophe PLAGNIOL-VILLARD schrieb:
On 14:10 Wed 17 Dec , michael wrote:
michael wrote:
Stefan Althoefer wrote:
Jean-Christophe PLAGNIOL-VILLARD schrieb:
diff -uprN u-boot-orig//lib_arm/board.c u-boot/lib_arm/board.c
--- u-boot-orig//lib_arm/board.c 2008-12-02
Hi Michael,
On Wednesday 17 December 2008, michael wrote:
I have rewrite and clean the support for ehci-pci but I don't have any
hardware to test on it. My
code is like this:
int ehci_hcd_init(void)
{
pci_dev_t pdev;
uint32_t addr;
pdev =
Hello Michael,
2008/12/17 Michael Trimarchi trimar...@gandalf.sssup.it:
Add USB ehci pci support. This patch doesn't include any
pci_ids and it is not tested on real hardware. To use it
add (for example) the following in the board configuration file:
#define CONFIG_CMD_USB 1
#define
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20081217115717.gd26...@game.jcrosoft.org you wrote:
- enum { unknown, EDO, SDRAM, DDR2 } type;
+ enum { unknown, edo, sdram, ddr2 } type;
Sorry again, but lower case enum labels violate the coding style
either:
Chapter 12:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Sami Nurmenniemi sanur...@sysart.fi
---
board/m501sk/Makefile|2 -
board/m501sk/memsetup.S | 200 --
include/configs/m501sk.h | 33
3 files changed, 33
On Dec 16, 2008, at 10:55 PM, Liu Dave wrote:
NAND boot
Lets post this as part of the NAND boot patch series so it can be
reviewed in that context. Its not that I'm against this change.
However I was trying to isolate explicit knowledge of LAW registers
from the rest of the code base
Board support for the Guntermann Drunck PowerPC 440 ETX module.
Based on the AMCC Yosemite board support by Stefan Roese.
Signed-off-by: Dirk Eibach eib...@gdsys.de
---
- Fixup NOR mapping in ft_board_setup()
MAINTAINERS |1 +
MAKEALL
Using the latest toolchain from CodeSourcery (4.3-50), I can't seem to
build U-Boot for the MPC8313 ERDB platform. I've tried this with both
2008.10 and 2009.01-rc1. Grabbing a fresh copy of U-Boot and doing
make MPC8313ERDB_33_config make seems to work at first, but near
the end when it does:
USB ehci code cleanup. Use handshake instead of infinite while loop
to check the STD_ASS status
Signed-off-by: Michael Trimarchi trimarchimich...@yahoo.it
---
drivers/usb/usb_ehci_core.c | 53 ++-
1 files changed, 27 insertions(+), 26 deletions(-)
diff
Add USB ehci pci support. This patch doesn't include any
pci_ids and it is not tested on real hardware. To use it
add (for example) the following in the board configuration file:
#define CONFIG_CMD_USB 1
#define CONFIG_USB_STORAGE 1
#define CONFIG_USB_EHCI
#define CONFIG_USB_EHCI_PCI 1
#define
On Dec 16, 2008, at 5:47 PM, Liu Dave wrote:
was code breaking or just fixing it up to match the docs?
not break the system, because the bit[55] is reserved zero for
e500/e500mc.
so just fixied it to match the e500/e500mc docs.
Ok. I'd prefer we just expand the field to 0x3ff to match the
Hi Remy,
-Original Message-
From: l.ping...@gmail.com [mailto:l.ping...@gmail.com] On
Behalf Of Remy Bohmer
Sent: Wednesday, December 17, 2008 1:48 AM
To: Abraham, Thomas
snip
Same, Michael combined slow+high into 1 single element called
'speed', what I would prefer here.
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
---
common/cmd_i2c.c | 58 ++---
1 files changed, 28 insertions(+), 30 deletions(-)
diff --git a/common/cmd_i2c.c b/common/cmd_i2c.c
index 448f2fe..9f7a1ea 100644
---
Dear mike xu,
In message 7103aeea0812170706p3e1fa7cby7093a87d4d01e...@mail.gmail.com you
wrote:
I am using u-boot 1.2.0 and tried to boot kernel with one ramdisk, but
it seems the u-boot doesn't load my ramdisk image at all. Please view
This is correct. U-Boot does not load the RAMdisk
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 1229547702-20400-1-git-send-email-plagn...@jcrosoft.com you wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Sami Nurmenniemi sanur...@sysart.fi
---
board/m501sk/memsetup.S| 134
On 22:41 Wed 17 Dec , Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 1229547702-20400-1-git-send-email-plagn...@jcrosoft.com you
wrote:
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD plagn...@jcrosoft.com
Cc: Sami Nurmenniemi sanur...@sysart.fi
---
On 05:38 Wed 03 Dec , Maxim Artamonov wrote:
Signed-off-by: Maxim Artamonov scn1874 at yandex.ru
Apply to u-boot-arm
Best Regards,
J.
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Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20081217214818.gc10...@game.jcrosoft.org you wrote:
+#define CONFIG_SYS_SDRC_MR_VAL2 0x0003 /* Load Mode Register */
+#define CONFIG_SYS_SDRC_MR_VAL3 0x /* Normal Mode */
#define SDRC_TR 0xFF94
-#define SDRC_TR_VAL
NOTE: If there are still concerns about the ds4510 driver, feel
free to leave it out of this patch series and only apply
Add support for PCA953x I2C gpio devices and XPedite5370
board support. I'd rather get those 2 changes merged in for
the upcoming release and deal with the ds4510 later if need
Initial support for NXP's 4 and 8 bit I2C gpio expanders
(eg pca9537, pca9557, etc). The CONFIG_PCA953X define
enables support for the devices while the CONFIG_CMD_PCA953X
define enables the pca953x command. The CONFIG_CMD_PCA953X_INFO
define enables an 'info' sub-command which provides summary
Initial support for the DS4510, a CPU supervisor with
integrated EEPROM, SRAM, and 4 programmable non-volatile
GPIO pins. The CONFIG_DS4510 define enables support
for the device while the CONFIG_CMD_DS4510 define
enables the ds4510 command. The additional
CONFIG_DS4510_INFO, CONFIG_DS4510_MEM, and
On 23:30 Wed 17 Dec , Wolfgang Denk wrote:
Dear Jean-Christophe PLAGNIOL-VILLARD,
In message 20081217214818.gc10...@game.jcrosoft.org you wrote:
+#define CONFIG_SYS_SDRC_MR_VAL2 0x0003 /* Load Mode Register */
+#define CONFIG_SYS_SDRC_MR_VAL3 0x /* Normal Mode */
On Tue, Dec 02, 2008 at 11:48:51AM +0800, Dave Liu wrote:
we load the secondary stage u-boot image from NAND to
system memory by nand_load, but we did not flush d-cache
to memory, not invalidate i-cache before we jump to RAM.
when the system is cache enable and the TLB/page attribute
of
For high spped devices that are connected via hubs, the information
that the device is high speed is recorded. This is required by Mentor
USB Host controller driver.
Signed-off-by: Ravi Babu ravib...@ti.com
Signed-off-by: Swaminathan S swami.i...@ti.com
Signed-off-by: Thomas Abraham
Resubmitting after baselining with U-Boot USB 'next' branch.
This patch series adds Mentor Graphics USB OTG host controller
driver support and MSC support for DM6446 (TI DaVinci) platform.
- [PATCH v2 1/6] usb : musb : Record speed of high speed devices connected to
hub.
- [PATCH v2 2/6] usb
Adding Mentor USB core functionality and Mentor USB Host controller
functionality for Mentor USB OTG controller (musbhdrc).
Signed-off-by: Ravi Babu ravib...@ti.com
Signed-off-by: Swaminathan S swami.i...@ti.com
Signed-off-by: Thomas Abraham t-abra...@ti.com
Signed-off-by: Ajay Kumar Gupta
Adding USB VBUS enable functionality for DM644x DVEVM (TI DaVinci)
platform.
Signed-off-by: Ravi Babu ravib...@ti.com
Signed-off-by: Swaminathan S swami.i...@ti.com
Signed-off-by: Thomas Abraham t-abra...@ti.com
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
board/davinci/dvevm/dvevm.c |
Adding DM6446 (TI DaVinci) platform specific USB functionality for
USB Phy and VBUS initialization.
Signed-off-by: Ravi Babu ravib...@ti.com
Signed-off-by: Swaminathan S swami.i...@ti.com
Signed-off-by: Thomas Abraham t-abra...@ti.com
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
Enabling DM6446 (TI DaVinci) USB module power and MUSB low-level
controller hook up to USB core layer.
Signed-off-by: Ravi Babu ravib...@ti.com
Signed-off-by: Swaminathan S swami.i...@ti.com
Signed-off-by: Thomas Abraham t-abra...@ti.com
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
Enabling USB MSC support for DM6446 (TI DaVinci) platform in the
configuration file.
Signed-off-by: Ravi Babu ravib...@ti.com
Signed-off-by: Swaminathan S swami.i...@ti.com
Signed-off-by: Thomas Abraham t-abra...@ti.com
Signed-off-by: Ajay Kumar Gupta ajay.gu...@ti.com
---
On 07:33 Mon 08 Dec , Jim Don wrote:
Hello,
I would like to compile uboot for a gumstix verdex (but on qemu) ...
I just finished building a cross compiler with ulibc:
- armv5te-softfloat-linux-gnueabi-gcc
Now I need to know which Makefile target I should use to config for a
Hi Wolfgang Denk,
@@ -304,9 +355,7 @@ void pci_ixp_init (struct pci_controller
pci_write_config_word (0, PCI_CFG_COMMAND, INITIAL_PCI_CMD);
REG_WRITE (PCI_CSR_BASE, PCI_ISR_OFFSET, PCI_ISR_PSE
| PCI_ISR_PFE | PCI_ISR_PPE | PCI_ISR_AHBE);
-#ifdef
Ok. I'd prefer we just expand the field to 0x3ff to match the EREF
spec since the upper bits are reserved we'll always read them
as 0 so no harm. And we dont have to change the code again in
the future if we expand into those upper bits.
If match the EREF, it should be 0x7ff.
and it also
Lets post this as part of the NAND boot patch series so it can be
reviewed in that context. Its not that I'm against this change.
However I was trying to isolate explicit knowledge of LAW registers
from the rest of the code base when I added fsl_law.c
You are right, it should be post
---
The patch is to be done, It is only giving the context
why move the definition of fsl_law from .c to .h.
Makefile | 13 +-
board/freescale/mpc8572ds/config.mk |5 +
board/freescale/mpc8572ds/nand_boot.c | 75
On Dec 18, 2008, at 12:20 AM, Dave Liu wrote:
diff --git a/board/freescale/mpc8572ds/nand_boot.c b/board/freescale/
mpc8572ds/nand_boot.c
new file mode 100644
index 000..1fb0acd
--- /dev/null
+++ b/board/freescale/mpc8572ds/nand_boot.c
@@ -0,0 +1,75 @@
+/*
+
+#include common.h
On Dec 18, 2008, at 12:20 AM, Dave Liu wrote:
---
The patch is to be done, It is only giving the context
why move the definition of fsl_law from .c to .h.
Makefile | 13 +-
board/freescale/mpc8572ds/config.mk |5 +
+void board_init_f(ulong bootflag)
+{
+ volatile ccsr_local_ecm_t *ecm = (void *)
(CONFIG_SYS_MPC85xx_ECM_ADDR);
+ u32 mas0, mas1, mas2, mas3;
+
+ /* init serial port */
+ NS16550_init((NS16550_t)(CONFIG_SYS_CCSRBAR + 0x4500),
+ get_bus_clk() /
1. patch should be split into at least two patches. One for
the first stage loader changes and one for the second stage
u-boot
absolutely correct. It is also my desired.
Because you query the LAW, I submit the patch for that purpose.
2. we should look at refactoring common code so not to
I'll apply it to the next branch, but it's not needed for
the upcoming release because there's no board upstream
with d-cache enabled.
It is fine, thanks.
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