Am 04.01.2011 08:47, schrieb Alexander Holler:
Only CONFIG_CMD_SHA1SUM should have been used.
---
README |2 +-
common/cmd_mem.c |4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
Sorry, have forgotten that
Signed-off-by: Alexander Holler hol...@ahsoftware.de
On 27 December 2010 18:02, Minkyu Kang mk7.k...@samsung.com wrote:
Because of the bss area is cleared after relocation, we've lost pointers.
This patch fixed it.
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: Kyungmin Park kyungmin.p...@samsung.com
---
Use the global data instead of bss variable, replace as follow.
timer_load_val - timer_rate_hz
timestamp - timer_reset_value
lastdec - lastinc
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
Signed-off-by: Darius Augulis augulis.dar...@gmail.com
cc: Heiko Schocher h...@denx.de
---
This patch add UART support for Freescale MX53 processor
Signed-off-by: Jason Liu r64...@freescale.com
---
drivers/serial/serial_mxc.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/serial_mxc.c b/drivers/serial/serial_mxc.c
index f96b21f..805f4c5
This patch add FEC support for Freescale MX53 processor
Signed-off-by: Jason Liu r64...@freescale.com
---
drivers/net/fec_mxc.c |2 +-
drivers/net/fec_mxc.h |4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/net/fec_mxc.c b/drivers/net/fec_mxc.c
index
This patch add I2C interface for fsl_pmic driver support
Signed-off-by: Jason Liu r64...@freescale.com
---
Changes for v2:
- Address the comments from Stefano,
- factor out the param_check in pmic_reg for both spi/i2c
- Address the comments from Stefano,
- Remvove call i2c_init again
- Fix
This patch add I2C support for Freescale MX53 processor
Signed-off-by: Jason Liu r64...@freescale.com
---
Changes for v2:
-address the comments of Heiko, add #if defined(CONFIG_MX31)
to avoid break MX31 build. Move CONFIG_HARD_I2C to the top
of the file and fix the error message from:
This patch add the MX53 boot image support.
This patch has been tested on Freescale MX53EVK board
and MX51EVK board.
Signed-off-by: Jason Liu r64...@freescale.com
---
Changes for v2:
- Address the following comments from Stefano,
- Get rid of #ifdef in the imximage.h and .c file and use
Add initial support for MX53EVK board support.
FEC, SD/MMC, UART, I2C, have been supported.
Signed-off-by: Jason Liu r64...@freescale.com
---
Changes for v2:
-Address the comments from Stefano, Albert and Wolfgang,
-remove the ivt.S file and use imximage.cfg instead,
-remove the
Need to check that location is valid on RAM before the fixup.
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
---
arch/arm/cpu/armv7/start.S |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index
Some new platform's esdhc pins don't share with other function.
The eSDHC shouldn't be disabled, even if esdhc isn't defined
in hwconfig env variable.
Use CONFIG_FSL_ESDHC_PIN_MUX to fix this problem.
Signed-off-by: Chenhui Zhao b26...@freescale.com
Signed-off-by: Li Yang le...@freescale.com
---
Need to check that location is valid on RAM before the fixup.
Why this change? The [PATCH RFC] armv7: fixloop: don't fixup if location is NULL
should be what you need.
You could mention what causes these NULL fixups, here is commit
entry for powerpc:
powerpc: do not fixup NULL ptrs
The
Dear Joakim Tjernlund,
On 4 January 2011 18:49, Joakim Tjernlund joakim.tjernl...@transmode.se wrote:
Need to check that location is valid on RAM before the fixup.
Why this change? The [PATCH RFC] armv7: fixloop: don't fixup if location is
NULL
should be what you need.
Some bss variables
On 01/04/2011 08:55 AM, qq wrote:
These words show me that net/eth.c has eth_send and drivers/net/rtl8019.c
also has eth_send function as the same name.
My board use RTL8019AS ethernet controller,s3c44b0 CPU.
i couldn`t figure out what is wrong with the code and how to fix it,Thanks a
lot
Minkyu Kang proms...@gmail.com wrote on 2011/01/04 11:04:57:
Dear Joakim Tjernlund,
On 4 January 2011 18:49, Joakim Tjernlund joakim.tjernl...@transmode.se
wrote:
Need to check that location is valid on RAM before the fixup.
Why this change? The [PATCH RFC] armv7: fixloop: don't
Dear Joakim Tjernlund,
On 4 January 2011 19:31, Joakim Tjernlund joakim.tjernl...@transmode.se wrote:
Minkyu Kang proms...@gmail.com wrote on 2011/01/04 11:04:57:
Dear Joakim Tjernlund,
On 4 January 2011 18:49, Joakim Tjernlund joakim.tjernl...@transmode.se
wrote:
Need to check that
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
---
common/cmd_mmc.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/common/cmd_mmc.c b/common/cmd_mmc.c
index 4323f76..6166749 100644
--- a/common/cmd_mmc.c
+++ b/common/cmd_mmc.c
@@ -104,7 +104,8 @@ static void
Signed-off-by: Minkyu Kang mk7.k...@samsung.com
---
drivers/mmc/mmc.c |1 -
1 files changed, 0 insertions(+), 1 deletions(-)
diff --git a/drivers/mmc/mmc.c b/drivers/mmc/mmc.c
index 6805b33..1df759f 100644
--- a/drivers/mmc/mmc.c
+++ b/drivers/mmc/mmc.c
@@ -30,7 +30,6 @@
#include part.h
Faraday ftwdt010 watchdog is an architecture independant
watchdog. It is usaually used in SoC chip design.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
drivers/watchdog/Makefile |1 +
drivers/watchdog/ftwdt010_wdt.c | 95 ++
---
arch/powerpc/include/asm/processor.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/powerpc/include/asm/processor.h
b/arch/powerpc/include/asm/processor.h
index 9cafe85..71fafa3 100644
--- a/arch/powerpc/include/asm/processor.h
+++
Faraday ftwdt010 watchdog is an architecture independant
watchdog. It is usaually used in SoC chip design.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Change v2:
Fix the wrong title of ftwdt010_wdt patch.
drivers/watchdog/Makefile |1 +
drivers/watchdog/ftwdt010_wdt.c |
---
drivers/i2c/fsl_i2c.c |8
1 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/i2c/fsl_i2c.c b/drivers/i2c/fsl_i2c.c
index cb13dee..8350fbe 100644
--- a/drivers/i2c/fsl_i2c.c
+++ b/drivers/i2c/fsl_i2c.c
@@ -381,12 +381,12 @@ i2c_read(u8 dev, uint addr, int alen,
Hi John,
On Tuesday, December 28, 2010 6:17 AM, John Rigby wrote:
Signed-off-by: John Rigby john.ri...@linaro.org
---
common/image.c|1 +
include/image.h |1 +
tools/Makefile|2 +
tools/mkimage.c |2 +
tools/omapimage.c | 226
cpu.h should be better place to hold the structure definiton.
Our intend is to make soc.h as a place only hold register base
address.
Signed-off-by: Lei Wen lei...@marvell.com
---
arch/arm/include/asm/arch-armada100/armada100.h | 57 ---
Signed-off-by: Lei Wen lei...@marvell.com
---
drivers/serial/serial.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c
index cd3439e..4032dfd 100644
--- a/drivers/serial/serial.c
+++ b/drivers/serial/serial.c
@@ -33,6
Pantheon Family processors are highly integrated SoCs
based on Sheeva_88SV331x-v5 PJ1 cpu core.
Ref:
http://www.marvell.com/products/processors/communications/marvell_pantheon_910_920_pb.pdf
SoC versions Supported:
1) PANTHEON920 (TD)
2) PANTHEON910 (TTC)
Signed-off-by: Lei Wen
Since there are lots of difference between kirkwood and mmp series,
it is better to seperate them but still keep the most common file
shared by all marvell platform in the mv-common configure file.
This patch move the kirkwood only driver definitoin in mv-common to
the kirkwood.h and it is tested
This patch adds the support MFP support for Marvell PANTHEON SoCs
Signed-off-by: Lei Wen lei...@marvell.com
---
arch/arm/include/asm/arch-pantheon/mfp.h | 42 ++
drivers/gpio/mvmfp.c |2 +
2 files changed, 44 insertions(+), 0 deletions(-)
DKB is a Development Board for PANTHEON TD/TTC(pxa920/pxa910) with
* Processor upto 806Mhz
* LPDDR1/2
* x8/x16 SLC/MLC NAND
* Footprints for eMMC MMC x8 card
With Peripherals:
* Parallel LCD I/F
* Audio codecs (88PM8607)
* MIPI CSI-2 camera
* Marvell 88W8787 802.11n/BT module
* Marvell 2G/3G RF
This patch set is based on previous Prafulla armada100 soc support
patch set. It add Marvell Pantheon SOC and dkb board support and do
some clean up.
[PATCH 1/6] Armada100: change the definition place for apb and mpmu
[PATCH 2/6] mv: seperate kirkwood and mmp from common setting
[PATCH 3/6] ARM:
On 01/04/2011 04:14 PM, Minkyu Kang wrote:
Use the global data instead of bss variable, replace as follow.
timer_load_val - timer_rate_hz
timestamp - timer_reset_value
lastdec - lastinc
I have already test the patch on s3c6410 . It is work perfect.
Thanks,
seedshope
Signed-off-by: Minkyu
On 01/04/2011 10:46 PM, seedshope wrote:
On 01/04/2011 04:14 PM, Minkyu Kang wrote:
Use the global data instead of bss variable, replace as follow.
timer_load_val - timer_rate_hz
timestamp - timer_reset_value
lastdec - lastinc
I have already test the patch on s3c6410 . It is work perfect.
On Tue, Jan 4, 2011 at 6:43 AM, Bedia, Vaibhav vaibhav.be...@ti.com wrote:
Hi John,
On Tuesday, December 28, 2010 6:17 AM, John Rigby wrote:
Signed-off-by: John Rigby john.ri...@linaro.org
---
common/image.c | 1 +
include/image.h | 1 +
tools/Makefile | 2 +
Minkyu Kang proms...@gmail.com wrote on 2011/01/04 12:02:29:
Dear Joakim Tjernlund,
On 4 January 2011 19:31, Joakim Tjernlund joakim.tjernl...@transmode.se
wrote:
Minkyu Kang proms...@gmail.com wrote on 2011/01/04 11:04:57:
Dear Joakim Tjernlund,
On 4 January 2011 18:49, Joakim
(sending again, this time to the list)
Le 04/01/2011 12:02, Minkyu Kang a écrit :
Some bss variables are initialized to 0x in my test case.
In this case we should skip the fixup too.
So, I make v2 patch for check it.
0x? What variables? Feels like a some other bug to me.
Hi,
I want disable the ability to interrupt the boot process.
Setting bootdelay to 0 speeds the start, but if I hit a key at the right (or
wrong, depending on point of view) I can still break out into the U-Boot
command line.
Any hints/tips on how to do this ?
Thanks,
Andrew
On Sat, Dec 18, 2010 at 05:16:28AM -0700, Alexander Holler wrote:
The variable i has to be static, otherwise it would be always zero.
Signed-off-by: Alexander Holler hol...@ahsoftware.de
---
drivers/mtd/nand/nand.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
Applied to
On Wed, Dec 08, 2010 at 12:20:45AM -0600, Xiangfu Liu wrote:
Signed-off-by: Xiangfu Liu xian...@openmobilefree.net
---
nand_spl/board/xburst/nanonote/Makefile | 96
nand_spl/board/xburst/nanonote/u-boot.lds | 63 ++
nand_spl/nand_boot_jz4740.c | 344
On Wed, Dec 08, 2010 at 12:20:46AM -0600, Xiangfu Liu wrote:
+ do {
+ status = readl(EMC_NFINTS);
+ } while(!(status EMC_NFINTS_ENCF));
+
+ /* disable ecc */
+ writel(readl(EMC_NFECR) ~EMC_NFECR_ECCE, EMC_NFECR);
readl() and other I/O accessors take pointers,
On Tue, Dec 28, 2010 at 01:21:06AM +0100, Florian Fainelli wrote:
+ /* check version */
+ val = le16_to_cpu(p-revision);
+ if (val == 1 || val (1 4)) {
+ printk(KERN_INFO %s: unsupported ONFI version: %d\n,
__func__, val);
Line length.
+
Steve Sakoman sakoman at gmail.com writes:
On Fri, Oct 1, 2010 at 10:59 PM, John Tobias jtobias at viaas.com wrote:
Hi Steve,
Thanks for the response. The processor is OMAP4 and I am in the last stage
of bringing up the board. I took the source code from the omapzoom git tree.
How do I
Dear Andrew Holt (SE),
In message 1697cdb1-f968-4361-8895-c52ec77ec...@electrans.com you wrote:
I want disable the ability to interrupt the boot process.
Setting bootdelay to 0 speeds the start, but if I hit a key at the right (or
wrong, depending on point of view) I can still break out
Hi Andrew,
On Tue, Jan 4, 2011 at 1:38 PM, Andrew Holt (SE)
andrew.h...@electrans.com wrote:
Hi,
I want disable the ability to interrupt the boot process.
Setting bootdelay to 0 speeds the start, but if I hit a key at the right (or
wrong, depending on point of view) I can still break out
On Tue, Jan 04, 2011 at 04:08:29PM -0600, Scott Wood wrote:
On Mon, Dec 27, 2010 at 05:47:01PM -0700, John Rigby wrote:
diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c
index 76b8566..1ae2cd0 100644
--- a/nand_spl/nand_boot.c
+++ b/nand_spl/nand_boot.c
@@ -27,6 +27,15 @@
On Mon, Dec 27, 2010 at 05:47:01PM -0700, John Rigby wrote:
Some platforms read the nand type to make configuration
choices. For example, some versions of OMAP3 Beagle use
the NAND type as a hint of the DRAM type.
That seems rather hacky... are you sure it makes sense to use a single
U-Boot
On Mon, Dec 27, 2010 at 05:47:05PM -0700, John Rigby wrote:
CC: Scott Wood scootw...@freescale.com
It's scottwood, not scootwood.
+static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ int i;
+ struct nand_chip *chip = mtd-priv;
+
+#ifndef
On Wed, Dec 29, 2010 at 11:07:08AM +0530, Aneesh V wrote:
On Wednesday 29 December 2010 05:56 AM, John Rigby wrote:
On Mon, Dec 27, 2010 at 11:50 PM, Aneesh Vane...@ti.com wrote:
How big is the spl now? For the OMAP4 spl, using '-ffunction-sections'
and '--gc-sections' reduced the image
The Blackfin SPORT RX/TX registers have to be accessed as 16-bit or
32-bit only, depending on the configured SPORT data word length.
Everything else leads to an exception.
In the various cdef headers
arch/blackfin/include/asm/mach-bfXXX/BFXXX_cdef.h
there are only 32-bit variants.
The manual
Previously we passed in a specifically named struct pci_controller to
determine if we had setup the particular PCI bus. Now we can search for
the struct so we dont have to depend on the name or the struct being
statically allocated.
Introduced new find_hose_by_cfg_addr() to get back a
On Dec 17, 2010, at 5:33 PM, Kumar Gala wrote:
Instead of a #define use a null weak function for fsl_serdes_init
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/cpu_init.c |8 ++--
include/configs/MPC8536DS.h |1 -
On Dec 17, 2010, at 5:33 PM, Kumar Gala wrote:
Created a section in the Makefile for SoC specific SERDES code. Also
added P1013 SERDES (use P1022 SERDES code).
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/Makefile |7 +--
1 files changed, 5
On Dec 17, 2010, at 5:33 PM, Kumar Gala wrote:
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES. This mimics the code we have in place
for the 85xx platforms.
On Dec 17, 2010, at 5:33 PM, Kumar Gala wrote:
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
On Dec 17, 2010, at 5:33 PM, Kumar Gala wrote:
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
On Dec 17, 2010, at 5:33 PM, Kumar Gala wrote:
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
On Dec 17, 2010, at 5:33 PM, Kumar Gala wrote:
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
On Dec 17, 2010, at 5:33 PM, Kumar Gala wrote:
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
On Dec 17, 2010, at 5:33 PM, Kumar Gala wrote:
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
On Dec 17, 2010, at 5:33 PM, Kumar Gala wrote:
Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
On Dec 13, 2010, at 10:12 PM, Kumar Gala wrote:
The ATUM8548 board is no longer maintained and thus we are removing
support for it.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
MAINTAINERS|4 -
board/atum8548/Makefile| 57 --
On Dec 13, 2010, at 10:12 PM, Kumar Gala wrote:
The MPC8540EVAL board is no longer maintained and thus we are removing
support for it.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
board/mpc8540eval/Makefile | 54 ---
board/mpc8540eval/ddr.c | 73
On Dec 13, 2010, at 10:12 PM, Kumar Gala wrote:
The PM854/PM856 boards are no longer maintained and thus we are removing
support for them.
Signed-off-by: Kumar Gala ga...@kernel.crashing.org
---
board/pm854/Makefile| 53 --
board/pm854/ddr.c | 73
On Jan 4, 2011, at 7:32 AM, Piergiorgio Beruto wrote:
---
arch/powerpc/include/asm/processor.h |4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
applied, in the future please provide a 'Signed-off-by'
- k
___
U-Boot mailing list
On Jan 4, 2011, at 3:23 AM, Chenhui Zhao wrote:
Some new platform's esdhc pins don't share with other function.
The eSDHC shouldn't be disabled, even if esdhc isn't defined
in hwconfig env variable.
Use CONFIG_FSL_ESDHC_PIN_MUX to fix this problem.
Signed-off-by: Chenhui Zhao
On Dec 17, 2010, at 5:34 PM, Kumar Gala wrote:
Use new is_serdes_configured to determine if TSECs are in SGMII mode and
report that on the various boards that use or can be configured in SGMII
mode in board_eth_init() instead of in the PCI init code.
Signed-off-by: Kumar Gala
On Dec 17, 2010, at 5:17 PM, Becky Bruce wrote:
Also, change this code to use phys_size_t instead of long int.
Using common naming for this function will enable us to use the common
initdram() for 85xx going forward. Other than the type change,
this is just a code rearrange.
On Dec 17, 2010, at 5:17 PM, Becky Bruce wrote:
Some platforms might want to override the default wimge=0 for
DDR. Add CONFIG_SYS_PPC_DDR_WIMGE for those platforms to use.
This will initially only be used by TQM85xx, but could be
useful for other boards or testing going forward. Note that
On Dec 17, 2010, at 5:17 PM, Becky Bruce wrote:
Correct initdram to use phys_size_t to represent the size of
dram; instead of changing this all over the place, and correcting
all the other random errors I've noticed, create a
common initdram that is used by all non-corenet 85xx parts. Most
On Dec 17, 2010, at 5:17 PM, Becky Bruce wrote:
sdram_init() is used to initialize sdram on the lbc. Rename it
accordingly.
Signed-off-by: Becky Bruce bec...@kernel.crashing.org
---
arch/powerpc/cpu/mpc85xx/cpu.c |2 +-
arch/powerpc/cpu/mpc8xxx/fsl_lbc.c |4 ++--
On Dec 17, 2010, at 5:17 PM, Becky Bruce wrote:
This config option is for an erratum workaround; rename it to be more
clear. Also, drop it from config files don't need it and were
undefining it.
Signed-off-by: Becky Bruce bec...@kernel.crashing.org
---
On Dec 17, 2010, at 5:17 PM, Becky Bruce wrote:
Add spaces to cause the informational prints to line up with
the ones from init_func_ram() in board.c. Output now looks like
this:
DRAM: Detected 4096 MB of memory
This U-Boot only supports 4G of DDR
You could rebuild
hi:
I have some question(problem) when i using D-cache.The mcu i use is mpc8308.I
did a test like that.
1 Add cmd_cache in u-boot.
2 Disable D-cache,there is no problem.The D-cache is disabled and the u-boot
still run.
3 Enable D-cache,U-boot is halt.
Then i test by defined
Faraday ftwdt010 watchdog is an architecture independant
watchdog. It is usaually used in SoC chip design.
Signed-off-by: Macpaul Lin macp...@andestech.com
---
Change v2:
Fix the wrong title of ftwdt010_wdt patch.
Change v3:
Patch v2 was encoded in utf-8. Fixed to ASCII.
Hi there
Happy New Year to you from all of us at Aspire!
As you are probably already aware, your organisation has been invited to
participate in the exclusive Aspire Property Magazine, for the Spring 2011
edition (and beyond).
As the brainchild of Aspire Estate Agents, SW London, this
On 5 January 2011 02:02, Albert ARIBAUD albert.arib...@free.fr wrote:
(sending again, this time to the list)
Le 04/01/2011 12:02, Minkyu Kang a écrit :
Some bss variables are initialized to 0x in my test case.
In this case we should skip the fixup too.
So, I make v2 patch for check
Hi ,
I am working on S3C2440. I need to load the initrd with the uboot. The base
address for my RAM is 0x3000. As per the documentations, the kernel is
loaded to 0x30008000 and the initrd is loaded to 0x3080. On the NAND flash,
zImage is loaded at address 0x20. I loaded the ramdisk
Hi,
On Wed, Dec 29, 2010 at 09:02:33PM -0500, Mike Frysinger wrote:
On Monday, December 27, 2010 02:00:24 Nobuhiro Iwamatsu wrote:
This move linker option used by the last of u-boot in LDFLAGS_u-boot
variable. And the option to use in ld uses LDFLAGS variable.
Nobuhiro: could you repost
-Original Message-
From: Lei Wen [mailto:lei...@marvell.com]
Sent: Tuesday, January 04, 2011 8:21 PM
To: u-boot@lists.denx.de; Prafulla Wadaskar; Yu Tang; Ashish Karkare;
Prabhanjan Sarnaik; adrian.w...@gmail.com
Subject: [U-BOOT] [PATCH 6/6] Pantheon: Add Board Support for Marvell
Dear seedshope,
On 4 January 2011 23:56, seedshope bocui...@gmail.com wrote:
On 01/04/2011 10:46 PM, seedshope wrote:
On 01/04/2011 04:14 PM, Minkyu Kang wrote:
Use the global data instead of bss variable, replace as follow.
timer_load_val - timer_rate_hz
timestamp - timer_reset_value
Flash might be in unknown state when u-boot is started with jtag.
And got wrong env data. So reset it in board early init.
Signed-off-by: Thomas Chou tho...@wytron.com.tw
---
board/altera/nios2-generic/nios2-generic.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git
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