To support graphics card behind a PCI bridge, the bridge control
register (offset 0x3e) in the configuration space must turn on
VGA address forwarding.
Signed-off-by: Bin Meng
---
drivers/pci/pci-uclass.c | 18 ++
1 file changed, 18 insertions(+)
diff --git
When pci_find_class() fails to find a device, it returns -ENODEV.
But now we check the return value against -1. Fix it.
Signed-off-by: Bin Meng
---
drivers/video/vesa_fb.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/video/vesa_fb.c
Remove bd82x6x_pci_bus_enable_resources() that is not called anywhere.
Signed-off-by: Bin Meng
---
arch/x86/cpu/ivybridge/bd82x6x.c | 32
1 file changed, 32 deletions(-)
diff --git a/arch/x86/cpu/ivybridge/bd82x6x.c
PCI_COMMAND_IO bit must be set for VGA device as it needs to respond
to legacy VGA IO address.
Signed-off-by: Bin Meng
---
drivers/pci/pci_auto.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/pci/pci_auto.c b/drivers/pci/pci_auto.c
index 41d5447..e2c239e
Currently pci_last_busno() only checks the last bridge device
under the first UCLASS_PCI device. This is not the case when
there are multiple bridge devices.
Signed-off-by: Bin Meng
---
drivers/pci/pci-uclass.c | 25 +
1 file changed, 1 insertion(+),
This series contains various bug fixes/enhancements to x86 pci related
VGA card support, as a result of attempting to support booting SeaBIOS.
Bin Meng (6):
pci: Set PCI_COMMAND_IO bit for VGA device
video: vesa_fb: Fix wrong return value check of pci_find_class()
dm: pci: Fix
Dear Heiko Schocher,
Heiko Schocher writes:
>- add CONFIG_BOOT_RETRY_TIME to 30
>- fex LED colors
>- fix button pressed combination
>- add
> CONFIG_USB_HOST_ETHER
> CONFIG_USB_ETHER_ASIX
> CONFIG_USB_ETHER_MCS7830
>
>Signed-off-by: Heiko Schocher
>Signed-off-by:
Dear Josh Wu,
Josh Wu writes:
>If defined CONFIG_ENV_IS_IN_MMC, then u-boot environment is saved in
>mmc's raw sectors. Otherwise, u-boot environment is saved as a file:
>uboot.env.
>
>Signed-off-by: Josh Wu
>Reviewed-by: Bo Shen
>---
Hi Tom,
here are two small fixes for v2015.10 regarding atmel boards.
Andreas
The following changes since commit 1f8836396de8215b7f460616926052b32597bb29:
Prepare v2015.10-rc4 (2015-09-28 16:57:42 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-atmel.git master
Add a Kconfig option to disable the Integrated Graphics Device (IGD)
so that it does not show in the PCI configuration space as a VGA
disaplay controller. This gives a chance for U-Boot to run PCI/PCIe
based graphics card's VGA BIOS and use that for the graphics console.
Signed-off-by: Bin Meng
Hello,
On 09/21/2015 02:26 PM, Przemyslaw Marczak wrote:
This patchset adds:
- CPU model in dts for Chromebook Peach Pi as Exynos5800
- set the cpu id of Exynos5422 to 0x5422
- S2MPS11 PMIC I/O driver
- Exynos5420-compatible (9-channel, 12-bit) ADC driver
- new file for Exynos5:
Hi Sjoerd,
On Thu, Oct 1, 2015 at 5:48 PM, Sjoerd Simons
wrote:
> Add the ability for e.g. drivers subclassing to register a function to
> be called after ethernet initialisation. This is useful if e.g. the
> driver needs to change configuration based on the
Hi Sjoerd,
On Thu, Oct 1, 2015 at 5:48 PM, Sjoerd Simons
wrote:
> Add support for the snps,reset-gpio, snps,reset-active-low (optional) and
> snps,reset-delays-us device-tree bindings. The combination of these
> three define how the PHY should be reset to ensure
Hi,
On 01-10-15 13:25, Sjoerd Simons wrote:
Hey Hans,
On Thu, 2015-10-01 at 12:08 +0200, Hans de Goede wrote:
Hi Sjoerd,
On 01-10-15 11:10, Sjoerd Simons wrote:
When malloc_base initially gets setup in the SPL it is based on the
current (early) stack pointer, which for rockchip is pointing
Hello Humberto,
On 09/28/2015 03:27 PM, Humberto López León wrote:
Hi Przemyslaw,
With the information you gave me I managed to implement an important
part of SDHCI controller. Currently the driver detects the SD card
correctly but I have a problem with writing operations. With the help of
On Thu, Oct 1, 2015 at 5:48 PM, Sjoerd Simons
wrote:
> To allow other DM drivers to subclass the designware driver various
> functions and structures need to be exported. Export these.
>
> Signed-off-by: Sjoerd Simons
> ---
>
>
Hi Sjoerd,
On Thu, Oct 1, 2015 at 5:48 PM, Sjoerd Simons
wrote:
> Add a new driver for the GMAC ethernet interface present in Rockchip
> RK3288 SOCs. This driver subclasses the generic design-ware driver to
> add the glue needed specifically for Rockchip.
>
>
Hi Sjoerd,
On 01-10-15 11:10, Sjoerd Simons wrote:
When malloc_base initially gets setup in the SPL it is based on the
current (early) stack pointer, which for rockchip is pointing into SRAM.
This means simple memory allocations happen in SRAM space, which is
somewhat unfortunate. Specifically
Hey Hans,
On Thu, 2015-10-01 at 12:08 +0200, Hans de Goede wrote:
> Hi Sjoerd,
>
> On 01-10-15 11:10, Sjoerd Simons wrote:
> > When malloc_base initially gets setup in the SPL it is based on the
> > current (early) stack pointer, which for rockchip is pointing into
> > SRAM.
> > This means
Dear Andy,
In message
Dear Jacob,
In message <1443622325-30792-1-git-send-email-j-stiff...@ti.com> you wrote:
> The net_boot_file_name buffer is used as storage for the bootfilename
> command line argument to network boot commands such as tftp and nfs.
>
> Increase the size of this buffer to 1024 bytes as the current
On Wed, 2015-09-30 at 14:54 +0200, Hans de Goede wrote:
> We now have generic q8_a?3_defconfig files for Q8 formfactor tablets with
> an A13 / A23 / A33 SoC, there is no need for these PCB variant specific
> defconfig-s and they only serve to confuse the user.
>
> Note that in case of the
On 30 September 2015 at 23:33, Fabio Estevam wrote:
> From: Fabio Estevam
>
> Many SPI flashes have protection bits (BP2, BP1 and BP0) in the
> status register that can protect selected regions of the SPI NOR.
>
> Take these bits into account when
Dear Fabio,
In message
you wrote:
>
> Ok, the issue is due to endianness: on LS1021 the watchdog is
> big-endian, so that's why we can't use clrsetbits_le16().
...
> + int reg;
>
> - clrsetbits_le16(>wcr, 0,
This driver did not yet configure the SDHCI MBUS bridge registers.
Without this and with CONFIG_MMC_SDMA enabled, mmc hangs at random
times. As DMA cannot complete correctly.
Tested on db-88f6820-gp eval board.
Signed-off-by: Stefan Roese
Cc: Luka Perkov
Hi Fabio
On 30/09/15 03:03 PM, Fabio Estevam wrote:
[...]
Ok, the issue is due to endianness: on LS1021 the watchdog is
big-endian, so that's why we can't use clrsetbits_le16().
Please check:
I'm sorry about this, it's becoming embarassing: I've dropped the
maintainer hunk this time.
I'll stop posting until my jetlag subsides and make sure I've covered all
the bases.
Apologies.
On 1 October 2015 at 18:43, Ryan Harkin wrote:
> Create an additional FVP
From: Fabio Estevam
Add support for the order_base_2() macro (and its dependencies)
from the Linux kernel.
This is useful for the SPI NOR unlock function.
Signed-off-by: Fabio Estevam
---
Changes since v4:
- None
On Thu, Oct 1, 2015 at 12:19 PM, Sinan Akman wrote:
> I took a further look at this. I believe this won't work as readw
> will now return the data in the wrong endianness. I think Wolfgang
> also already pointed out at this. We would need to use the macro with
> correct
Fix the following build break:
drivers/usb/host/xhci-omap.c:35:5: error: ‘board_usb_init’ aliased to external
symbol ‘__board_usb_init’
int board_usb_init(int index, enum usb_init_type init)
^
Signed-off-by: Felipe Balbi
---
drivers/usb/host/xhci-omap.c | 2 +-
1 file
I somehow managed to drop a hunk from this patch, leaving a return without
a value. I'll issue a v3 of the series to correct it.
On 29 September 2015 at 16:47, Ryan Harkin wrote:
> Change the load_image so that it returns success or failure of the
> command (using
This patch series updates the default configuration of the vexpress64 FVP
and Juno platforms to allow it to work on a variety of setups without
modification by the user.
[PATCH v3 01/10] vexpress64: fix checkpatch warnings
[PATCH v3 02/10] vexpress64: Kconfig: tidy up
[PATCH v3 03/10] vexpress64:
When malloc_base initially gets setup in the SPL it is based on the
current (early) stack pointer, which for rockchip is pointing into SRAM.
This means simple memory allocations happen in SRAM space, which is
somewhat unfortunate. Specifically a bounce buffer for the mmc allocated
in SRAM space
Create an additional FVP configuration to boot images pre-loaded into
DRAM.
Sometimes it's preferential to boot the model by loading the files
directly into DRAM via model parameters, rather than using
SemiHosting.
An example of model parmaters that are used to pre-load the files
into DRAM:
Linaro's Juno Android builds requires the androidboot.hardware parameter
be set to a know board name.
Non-Android kernels ignore this extra parameter because they don't
contain code to parse it.
Signed-off-by: Ryan Harkin
Reviewed-by: Linus Walleij
The FVP and Juno settings were identical, but duplicated, so I removed
the duplication with this patch.
Signed-off-by: Ryan Harkin
Reviewed-by: Linus Walleij
CC: David Feng
CC: Bhupesh Sharma
As config migrates from board config files to Kconfig, when adding
CONFIG_SYS_BOOTM_LEN to a platform, I decided to add
Kconfig support for CONFIG_SYS_BOOTM_LEN.
Signed-off-by: Ryan Harkin
Reviewed-by: Linus Walleij
CC: Masahiro Yamada
From: Fabio Estevam
Add the SPI NOR protection mechanism from the kernel.
This code is based on the work from Brian Norris
https://patchwork.ozlabs.org/patch/513041/
Signed-off-by: Fabio Estevam
---
Many SPI flashes have protection bits (BP2, BP1 and BP0) in the
status register that can protect selected regions of the SPI NOR.
Take these bits into account when performing erase and
write operations, making sure that the protected areas are skipped.
Tested on a mx6qsabresd:
=> sf probe
On Thu, Oct 1, 2015 at 10:48 AM, Jagan Teki wrote:
> To be in-line with mtd lock utils, how about this notation
> sf protect lock
> sf protect unlock
> sf protect islocked
Ok.
>> diff --git a/drivers/mtd/spi/Kconfig b/drivers/mtd/spi/Kconfig
>> index 3f7433c..2ee1089 100644
On Thu, Oct 1, 2015 at 4:14 PM, Tom Rini wrote:
> On Thu, Oct 01, 2015 at 04:09:46PM -0300, Fabio Estevam wrote:
>> On Thu, Oct 1, 2015 at 12:19 PM, Sinan Akman wrote:
>> > I took a further look at this. I believe this won't work as readw
>> > will now
On Thu, 2015-10-01 at 19:02 +0800, Bin Meng wrote:
> Hi Sjoerd,
>
> On Thu, Oct 1, 2015 at 5:48 PM, Sjoerd Simons
> wrote:
> > -static int dw_mdio_init(const char *name, struct eth_mac_regs
> > *mac_regs_p)
> > +#if CONFIG_DM_ETH
> > +static int
fix the following build warnings:
drivers/usb/dwc3/core.c: In function ‘dwc3_uboot_init’:
drivers/usb/dwc3/core.c:625:6: warning: ‘dev’ is used uninitialized in this
function [-Wuninitialized]
mem = devm_kzalloc(dev, sizeof(*dwc) + DWC3_ALIGN_MASK, GFP_KERNEL);
^
On 10/1/2015 10:27 AM, Wolfgang Denk wrote:
Dear Jacob,
In message <1443622325-30792-1-git-send-email-j-stiff...@ti.com> you wrote:
The net_boot_file_name buffer is used as storage for the bootfilename
command line argument to network boot commands such as tftp and nfs.
Increase the size of
This patch changes the default "root=" parameter to "/dev/sda2".
Many linux based distros use /dev/sda1 for their boot partition; this is
often not a rootfs that can be used by the "root=" parameter.
Linaro images use /dev/sda1 as a boot partition, although this of a
different nature to a distro
vexpress64 kernels are usually over 8 MBytes in length, so setting the
max uImage length to 0x400 (64 Mbytes) should give us plenty of
scope for expansion.
I mostly chose this length to match other board configs that use
"(64 << 20)", however, Kconfig doesn't allow arithmetic operations.
Change the load_image so that it returns success or failure of the
command (using CMD_RET_SUCCESS or CMD_RET_FAILURE).
This way, hush scripts can optionally load different files depending
upon the system configuration.
A simple example:
if afs load ${kernel_name} ${kernel_addr}; then echo
Some OS images require an initrd on Juno.
If the file ramdisk.img exists in NOR flash, then we load it and pass
the address to the kernel. Otherwise, we pass the "-" parameter as
before.
Signed-off-by: Ryan Harkin
Reviewed-by: Linus Walleij
Add a command to the ARM flash support to check if an image exists or
not.
If the image is found, it will return CMD_RET_SUCCESS, else
CMD_RET_FAILURE. This allows hush scripts to conditionally load images.
A simple example:
if afs exists ${kernel_name}; then echo found; else echo \
not found;
The default Juno firmware has renamed the kernel and device tree
filenames to norkern and board.dtb.
Rather than change the default configuration to use the new names,
breaking those with the old firmware, attempt to load the existing
filename first. If that fails, attempt to load the alternate
On Thu, Oct 01, 2015 at 04:09:46PM -0300, Fabio Estevam wrote:
> On Thu, Oct 1, 2015 at 12:19 PM, Sinan Akman wrote:
> > I took a further look at this. I believe this won't work as readw
> > will now return the data in the wrong endianness. I think Wolfgang
> > also already
From: Fabio Estevam
This reverts commit 623d96e89aca64c2762150087f4e872c55481f13.
commit 623d96e89aca6("imx: wdog: correct wcr register settings")
introduced the usage of clrsetbits_le16(), which causes a regression
on LS1021 systems.
Unlike i.MX, LS1021 uses
On Thu, Oct 1, 2015 at 4:33 PM, Sinan Akman wrote:
> Otavio, please note that the watchdog changes that are committed that we
> are referring
> to broke ls102x. So if you revert those as you suggest here you would have
> ls102x working
> again but it would break imx6 which
On Thu, Oct 1, 2015 at 4:50 PM, Sinan Akman wrote:
> Hi Fabio, yes this seems to be the best thing to do for now.
> Let's implement then this thing properly soon after.
Could you please reply with a Tested-by tag?
Thanks
___
Dear Fabio,
In message
you wrote:
>
> > I'm sorry, but I fail to understand how writew() can be better than
> > another I/O accessor. Neither of these has the capability to detect
> > the endianess of this specific register
On 01/10/15 03:17 PM, Otavio Salvador wrote:
On Thu, Oct 1, 2015 at 4:14 PM, Tom Rini wrote:
On Thu, Oct 01, 2015 at 04:09:46PM -0300, Fabio Estevam wrote:
On Thu, Oct 1, 2015 at 12:19 PM, Sinan Akman wrote:
I took a further look at this. I
Hi Sinan,
On Thu, Oct 1, 2015 at 4:39 PM, Sinan Akman wrote:
> Hi Fabio, I just wanted to point out that with this revert we don't only
> break imx again
We are not breaking imx by doing the revert. The reset still works.
623d96e89aca64c2 appeared only in 2015.10-rc4.
>
On 01/10/15 03:45 PM, Fabio Estevam wrote:
Hi Sinan,
On Thu, Oct 1, 2015 at 4:39 PM, Sinan Akman wrote:
Hi Fabio, I just wanted to point out that with this revert we don't only
break imx again
We are not breaking imx by doing the revert. The reset still works.
Dear Jacob,
In message <560d6de3.8070...@ti.com> you wrote:
>
> Yes. However, the global "net_boot_file_name" is not only used for
> BOOTP, but also for NFS and TFTP.
>
> "net_boot_file_name" appears to be temporary storage to supply the file
> path to arbitrary protocols from the command
On 10/1/2015 4:07 PM, Wolfgang Denk wrote:
Dear Jacob,
In message <560d6de3.8070...@ti.com> you wrote:
Yes. However, the global "net_boot_file_name" is not only used for
BOOTP, but also for NFS and TFTP.
"net_boot_file_name" appears to be temporary storage to supply the file
path to
On 01/10/15 03:14 PM, Tom Rini wrote:
On Thu, Oct 01, 2015 at 04:09:46PM -0300, Fabio Estevam wrote:
On Thu, Oct 1, 2015 at 12:19 PM, Sinan Akman wrote:
I took a further look at this. I believe this won't work as readw
will now return the data in the wrong endianness.
On Thu, Oct 1, 2015 at 4:28 PM, Sinan Akman wrote:
> I agree, this is something needs to be done in steps and not in rush.
> For coming out of rc4 and making sure ls1021atwr reset works, all
> we need is to make sure that SRS bit is set and that this bit is written
>
On 01/10/15 03:32 PM, Fabio Estevam wrote:
From: Fabio Estevam
This reverts commit 623d96e89aca64c2762150087f4e872c55481f13.
commit 623d96e89aca6("imx: wdog: correct wcr register settings")
introduced the usage of clrsetbits_le16(), which causes a regression
on
On 01/10/15 03:38 PM, Fabio Estevam wrote:
On Thu, Oct 1, 2015 at 4:33 PM, Sinan Akman wrote:
Otavio, please note that the watchdog changes that are committed that we
are referring
to broke ls102x. So if you revert those as you suggest here you would have
ls102x
On 01.10.2015 22:48, Soeren Moch wrote:
> Set missing boot address in bootm command. This fixes the error:
> Wrong Image Format for bootm command
> ERROR: can't get kernel image!
>
> Reported-by: Uwe Scheffler
> Signed-off-by: Soeren Moch
> Tested-by: Uwe
Set missing boot address in bootm command. This fixes the error:
Wrong Image Format for bootm command
ERROR: can't get kernel image!
Reported-by: Uwe Scheffler
Signed-off-by: Soeren Moch
Tested-by: Uwe Scheffler
---
Cc: Stefano Babic
Dear Fabio,
In message <1443727970-10347-1-git-send-email-feste...@gmail.com> you wrote:
>
> Unlike i.MX, LS1021 uses big-endian ordering for the watchdog
> controller, which means we cannot use the little endian accessors.
...
> - clrsetbits_le16(>wcr, 0, WCR_WDE);
> -
> +
Hi Wolfgang,
On Thu, Oct 1, 2015 at 5:11 PM, Wolfgang Denk wrote:
> I'm sorry, but I fail to understand how writew() can be better than
> another I/O accessor. Neither of these has the capability to detect
> the endianess of this specific register interface ?
It's not that
Hi Stephen.
On Friday, 25 September 2015, Stephen Warren wrote:
>
> From: Stephen Warren
>
> In order to make it clear what the parameters to set_config() and
> set_direction() mean, and similarly for the return values from the
> respective get_*(),
Hi Bin,
On Monday, 28 September 2015, Bin Meng wrote:
>
> There are fields in VxWorks bootline for netmask and gatewayip.
> We can get these from U-Boot environment variables and pass them
> to VxWorks, just like ipaddr and serverip.
>
> Signed-off-by: Bin Meng
On Monday, 28 September 2015, Bin Meng wrote:
>
> Some OS (like VxWorks) requires GDT entry 1 to be the 32-bit CS.
>
> Signed-off-by: Bin Meng
> Tested-by: Jian Luo
> ---
>
> Changes in v2: None
>
> arch/x86/cpu/cpu.c | 7
On Thursday, 24 September 2015, Bin Meng wrote:
>
> Some OS (like VxWorks) requires GDT entry 1 to be the 32-bit CS.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/cpu.c | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff --git
On Friday, 25 September 2015, Stephen Warren wrote:
>
> From: Stephen Warren
>
> These enum values aren't used anywhere. Remove them.
>
> Signed-off-by: Stephen Warren
> ---
> This series depends on my previous "ARM: tegra: don't
On Thu, Oct 1, 2015 at 5:50 PM, Wolfgang Denk wrote:
> On ARM (a LE architecture), clrsetbits_le16() maps down into:
>
> clrsetbits_le16 ->
> out_le16 / in_le16 ->
> out_arch, w,le16 / in_arch, w,le16 ->
> __raw_writew(cpu_to_le16()) /
On 10/01/2015 04:59 PM, Simon Glass wrote:
Hi Stephen,
On Wednesday, 23 September 2015, Stephen Warren wrote:
Simon,
I have 3 different ARM toolchains installed into /usr/bin via distro packages.
How do I tell buildman which of those to use?
I had originally thought
On 10/01/2015 05:00 PM, Simon Glass wrote:
On Friday, 25 September 2015, Stephen Warren wrote:
From: Stephen Warren
In order to make it clear what the parameters to set_config() and
set_direction() mean, and similarly for the return values from the
On Thursday, 17 September 2015, Nishanth Menon wrote:
>
> Many System on Chip(SoC) solutions are complex with multiple processors
> on the same die dedicated to either general purpose of specialized
> functions. Many examples do exist in today's SoCs from various vendors.
> Typical
Hi Stephen,
On Wednesday, 23 September 2015, Stephen Warren wrote:
>
> Simon,
>
> I have 3 different ARM toolchains installed into /usr/bin via distro
> packages. How do I tell buildman which of those to use?
>
> I had originally thought that ~/.buildman's [toolchain]
On Wednesday, 23 September 2015, Stephen Warren wrote:
>
> From: Stephen Warren
>
> Tegra's gpio_config_table() currently uses common GPIO APIs. These used
> to work without requesting the GPIO, but since commit 2fccd2d96bad "tegra:
> Convert tegra GPIO
On Wednesday, 23 September 2015, Stephen Warren wrote:
>
> From: Stephen Warren
>
> Tegra's GPIO driver currently enables pins as GPIO as soon as they're
> requested. This is not safe, since the desired direction and output value
> are not yet known.
On Thursday, 17 September 2015, Nishanth Menon wrote:
>
> Use the sandbox environment for the basic tests.
>
> Reviewed-by: Simon Glass
> Tested-by: Simon Glass
> Signed-off-by: Nishanth Menon
> ---
>
> Changes since V1:
>
On Thu, Oct 01, 2015 at 10:38:50AM +0200, Lukasz Majewski wrote:
> Hi Tom,
>
> Is there any schedule for our ELCE2015 u-boot mini summit [1]?
> To be more precise
> - are know times when we will deliver our presentations?
>
>
>
> [1] - http://www.denx.de/wiki/U-Boot/SummitELCE2015
So no, we
On Thursday, 17 September 2015, Nishanth Menon wrote:
>
> Introduce a dummy driver for sandbox that allows us to verify basic
> functionality. This is not meant to do anything functional - but is
> more or less meant as a framework plumbing debug helper.
>
> The sandbox remoteproc
Hi,
On Sunday, 13 September 2015, Marek Vasut wrote:
>
> On Sunday, September 13, 2015 at 03:40:04 PM, Thomas Chou wrote:
> > Add ioremap() to map physical address to uncached virtual
> > address. We need this to convert the reg address from the
> > device tree.
> >
> > The order
On Thursday, 17 September 2015, Nishanth Menon wrote:
>
> Introduce dummy devices for sandbox remoteproc device and enable it by
> default
>
> Reviewed-by: Simon Glass
> Signed-off-by: Nishanth Menon
> ---
>
> Changes since V2:
> - Picked up
The net_boot_file_name buffer is used as storage for the bootfilename
command line argument to network boot commands such as tftp and nfs.
Increase the size of this buffer to 1024 bytes as the current size of
128 bytes is restrictive for arbitrary paths on the server.
Signed-off-by: Jacob
Hello Jaehoon,
On 10/01/2015 05:37 AM, Jaehoon Chung wrote:
Hi, Przemyslaw.
On 09/30/2015 08:14 PM, Przemyslaw Marczak wrote:
This device uses SDHCI driver, for eMMC and SD cards.
Trying bind the DW MMC driver with fdt node without all
required properties, causes printing an error.
This
Hi Simon,
On 09/29/2015 09:57 PM, Simon Glass wrote:
+int timer_get_count(struct udevice *dev, unsigned long *count);
We should also handle microsecond time in this API. How about:
timer_get_ms()
timer_get_us()
Please allow the additional API be implemented at some later point. It
might
Hi,
On 10/01/2015 04:11 PM, Przemyslaw Marczak wrote:
> Hello Jaehoon,
>
> On 10/01/2015 05:37 AM, Jaehoon Chung wrote:
>> Hi, Przemyslaw.
>>
>> On 09/30/2015 08:14 PM, Przemyslaw Marczak wrote:
>>> This device uses SDHCI driver, for eMMC and SD cards.
>>> Trying bind the DW MMC driver with fdt
Hi Stephen,
On 30.09.2015 18:13, Stephen Warren wrote:
On 09/29/2015 11:00 PM, Stefan Roese wrote:
The current "simple" address translation simple_bus_translate() is not
working on some platforms (e.g. MVEBU). As here more complex "ranges"
properties are used in many nodes (multiple tuples
On 01/10/15 07:11 PM, Fabio Estevam wrote:
On Thu, Oct 1, 2015 at 5:50 PM, Wolfgang Denk wrote:
On ARM (a LE architecture), clrsetbits_le16() maps down into:
clrsetbits_le16 ->
out_le16 / in_le16 ->
out_arch, w,le16 / in_arch, w,le16 ->
Hi Simon,
On 10/02/2015 06:49 AM, Simon Glass wrote:
Add ioremap() to map physical address to uncached virtual
address. We need this to convert the reg address from the
device tree.
Can we not rely on the 'ranges' property to sort this out?
The ranges translate address across buses/bridges.
On 10/01/2015 10:41 AM, Stefan Roese wrote:
> This driver did not yet configure the SDHCI MBUS bridge registers.
> Without this and with CONFIG_MMC_SDMA enabled, mmc hangs at random
> times. As DMA cannot complete correctly.
>
> Tested on db-88f6820-gp eval board.
>
> Signed-off-by: Stefan Roese
From: Fabio Estevam
This reverts commit 623d96e89aca64c2762150087f4e872c55481f13.
commit 623d96e89aca6("imx: wdog: correct wcr register settings")
causes a system hang on LS1021 after the 'reset' command
is issued.
The original code (from 2013.01) clears all the
The ICnova-A20-SWAC is a baseboard, equipped with the ICnova-A20 SoM from
In-Circuit:
http://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
http://linux-sunxi.org/In-Circuit_ICnova_A20
This patch adds support for this board, including ethernet, LCD and USB
support.
Signed-off-by: Stefan
Setup the clocks for the gmac ethernet interface. This assumes the mac
clock is fed by an external clock which is common on RK3288 based
devices.
Signed-off-by: Sjoerd Simons
---
arch/arm/include/asm/arch-rockchip/cru_rk3288.h | 17 +
Add support for the snps,reset-gpio, snps,reset-active-low (optional) and
snps,reset-delays-us device-tree bindings. The combination of these
three define how the PHY should be reset to ensure it's in a sane state.
Signed-off-by: Sjoerd Simons
---
Add support for the gmac ethernet interface to pinctrl. This hardcodes
the setup to match that of the firefly and Radxa Rock2 boards, using the
RGMII phy mode for gmac interface and GPIO4B0 as the phy reset GPIO.
Signed-off-by: Sjoerd Simons
---
Add the ability for e.g. drivers subclassing to register a function to
be called after ethernet initialisation. This is useful if e.g. the
driver needs to change configuration based on the negotiated speed.
Signed-off-by: Sjoerd Simons
---
To allow other DM drivers to subclass the designware driver various
functions and structures need to be exported. Export these.
Signed-off-by: Sjoerd Simons
---
drivers/net/designware.c | 6 +++---
drivers/net/designware.h | 4
2 files changed, 7
1 - 100 of 115 matches
Mail list logo