Hi Vasily,
On 21.03.2016 20:22, Vasily Khoruzhick wrote:
On Mon, Mar 21, 2016 at 9:19 AM, Stefan Roese wrote:
Hi Vasily,
Hi Stefan,
On 21.03.2016 02:54, Marek Vasut wrote:
On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
Otherwise flash remains in read status mode and it's not possible
t
On 03/21/2016 11:00 PM, Hans de Goede wrote:
> Hi,
>
> On 21-03-16 22:47, Michael Haas wrote:
>>> Hmm, I just realized / read that RTL8211B and RTL8211C have the same
>> phyid, maybe there is some other reg which we can use to
>> differentiate between them ?
>>
>>> Otherwise we are back to having a
Hello Hans,
This patch is base on u-boot-sunxi next.
I see it's far behind the u-boot master.
Aren't we using u-boot-sunxi next ?(
http://git.denx.de/?p=u-boot/u-boot-sunxi.git;a=shortlog;h=refs/heads/next)
Regards,
Vishnu
On Mon, Mar 21, 2016 at 10:28 PM, Vishnu Patekar
wrote:
> Hello,
>
> I
On Tue, Mar 22, 2016 at 1:01 AM, Scott Wood wrote:
> On 03/21/2016 08:44 AM, Bin Meng wrote:
>> Introduce CONFIG_RTL8139 in Kconfig and move over boards' defconfig
>> to use that.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> Changes in v2: None
>>
>> configs/MPC8544DS_defconfig | 1 +
>> drivers
On 03/20/2016 12:06 AM, Stephen Warren wrote:
On 03/15/2016 08:36 PM, Stephen Warren wrote:
On 03/13/2016 07:16 PM, Eric Anholt wrote:
For Raspberry Pi, we had the input clock rate to the pl011 fixed in
the rpi.c file, but it may be changed by firmware due to user changes
to config.txt. Since
There are multiple build failures with hard float toolchains caused by
switching to 64-bit data. This shows up in drivers/video among others i.e.
in ipu_common.c when building for i.MX6 with video enabled.
=== Cut ===
arm-linux-gnueabi-ld.bfd: error:
/opt/arm-linux-toolchain/lib/gcc/arm-linux-gnu
Hi,
On 21-03-16 22:47, Michael Haas wrote:
Hmm, I just realized / read that RTL8211B and RTL8211C have the same
phyid, maybe there is some other reg which we can use to differentiate between
them ?
Otherwise we are back to having a #ifdef for the fix ...
Regards,
Hans
The BSD people s
Hi Jagan,
> -Original Message-
> From: Jagan Teki [mailto:jt...@openedev.com]
> Sent: Thursday, March 10, 2016 10:38 AM
> To: Vikas MANOCHA
> Cc: u-boot@lists.denx.de; Albert Aribaud; Antonio Borneo; Heiko Schocher;
> Kamil Lulko; Matt Porter; re...@wp.pl; Scott Wood; Simon Glass; Stefan
>
Hi,
On 21-03-16 07:05, Chen-Yu Tsai wrote:
Hi,
On Sun, Mar 20, 2016 at 9:21 PM, Hans de Goede wrote:
This enables support for the eMMC found on the orangepi plus.
Signed-off-by: Hans de Goede
---
configs/orangepi_plus_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/config
>Hmm, I just realized / read that RTL8211B and RTL8211C have the same
phyid, maybe there is some other reg which we can use to differentiate between
them ?
>Otherwise we are back to having a #ifdef for the fix ...
>Regards,
Hans
The BSD people seem to key off a revision field, which has value
Hi,
On 21-03-16 21:59, Hans de Goede wrote:
Hi,
On 21-03-16 19:57, Michael Haas wrote:
On 03/21/2016 04:47 PM, Karsten Merker wrote:
Are any other sunxi boards impacted by the same problem that you know ?
No, I don't know of any other boards, but I have not looked very hard :)
At least the
Hi,
On 21-03-16 19:57, Michael Haas wrote:
On 03/21/2016 04:47 PM, Karsten Merker wrote:
Are any other sunxi boards impacted by the same problem that you know ?
No, I don't know of any other boards, but I have not looked very hard :)
At least the Olimex A20-SOM-EVB (which uses the same RTL821
Hi,
On 21-03-16 18:30, Karsten Merker wrote:
On Mon, Mar 21, 2016 at 04:47:15PM +0100, Karsten Merker wrote:
On Sun, Mar 20, 2016 at 07:51:20PM +0100, Hans de Goede wrote:
On 20-03-16 16:28, Michael Haas wrote:
On 03/20/2016 02:45 PM, Hans de Goede wrote:
On 19-03-16 14:40, Michael Haas wrot
On 21.03.16 20:39, york sun wrote:
> On 03/21/2016 12:29 PM, Alexander Graf wrote:
>>
>> On Mar 21, 2016, at 8:23 PM, york sun wrote:
>>
>>> On 03/21/2016 12:12 PM, Alexander Graf wrote:
On Mar 21, 2016, at 7:59 PM, York Sun wrote:
> Commit 7985cdf removed non-full-va map cod
On 03/21/2016 12:29 PM, Alexander Graf wrote:
>
> On Mar 21, 2016, at 8:23 PM, york sun wrote:
>
>> On 03/21/2016 12:12 PM, Alexander Graf wrote:
>>>
>>> On Mar 21, 2016, at 7:59 PM, York Sun wrote:
>>>
Commit 7985cdf removed non-full-va map code, replaced PGTABLE_SIZE
with get_page_t
On 03/21/2016 12:12 PM, Alexander Graf wrote:
>
> On Mar 21, 2016, at 7:59 PM, York Sun wrote:
>
>> Commit 7985cdf removed non-full-va map code, replaced PGTABLE_SIZE
>> with get_page_table_size() function for all. It is incorrect for
>> platforms with non-full-va mapping, at this moment Layersc
On 03/21/2016 12:26 PM, Alexander Graf wrote:
> With commit 7985cdf we converted all systems except for the Layerscape
> SoCs to the generic descriptor table based page table setup.
>
> On the Layerscape SoCs however, we just provide an empty table stub
> and do the setup ourselves. To reserve eno
On Mar 21, 2016, at 8:23 PM, york sun wrote:
> On 03/21/2016 12:12 PM, Alexander Graf wrote:
>>
>> On Mar 21, 2016, at 7:59 PM, York Sun wrote:
>>
>>> Commit 7985cdf removed non-full-va map code, replaced PGTABLE_SIZE
>>> with get_page_table_size() function for all. It is incorrect for
>>> pl
The RTL8211B_driver structure in drivers/net/phy/realtek.c contains a
wrong PHY ID (0x1cc910 instead of 0x1cc912) in the uid field.
The lowest four bits of the PHY ID encode the chip revision (B+C/D/E/F)
of the RTL8211 and the code originally applied a mask of 0xf0 to
the PHY ID, so that match
With commit 7985cdf we converted all systems except for the Layerscape
SoCs to the generic descriptor table based page table setup.
On the Layerscape SoCs however, we just provide an empty table stub
and do the setup ourselves. To reserve enough memory for the tables,
we need to override the defau
On Mon, Mar 21, 2016 at 9:19 AM, Stefan Roese wrote:
> Hi Vasily,
Hi Stefan,
> On 21.03.2016 02:54, Marek Vasut wrote:
>> On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
>>> Otherwise flash remains in read status mode and it's not possible
>>> to access data on flash.
>>>
>>> Signed-off-by: Vas
Commit 7985cdf removed non-full-va map code, replaced PGTABLE_SIZE
with get_page_table_size() function for all. It is incorrect for
platforms with non-full-va mapping, at this moment Layerscape SoCs.
Signed-off-by: York Sun
CC: Alexander Graf
CC: Alison Wang
CC: Prabhakar Kushwaha
---
arch/ar
On Mar 21, 2016, at 7:59 PM, York Sun wrote:
> Commit 7985cdf removed non-full-va map code, replaced PGTABLE_SIZE
> with get_page_table_size() function for all. It is incorrect for
> platforms with non-full-va mapping, at this moment Layerscape SoCs.
>
> Signed-off-by: York Sun
> CC: Alexander
On 03/21/2016 04:47 PM, Karsten Merker wrote:
Are any other sunxi boards impacted by the same problem that you know ?
>>> No, I don't know of any other boards, but I have not looked very hard :)
> At least the Olimex A20-SOM-EVB (which uses the same RTL8211CL
> PHY) has the same issue and forc
On 03/21/2016 06:56 PM, Eric Nelson wrote:
> Hi Marek,
Hi!
> On 03/21/2016 09:49 AM, Marek Vasut wrote:
>> On 03/21/2016 02:48 PM, Eric Nelson wrote:
>>> On 03/20/2016 06:59 PM, Marek Vasut wrote:
On 03/21/2016 02:45 AM, Eric Nelson wrote:
> Here's a more full-featured implementation of
On 03/18/2016 02:37 PM, york sun wrote:
> Alison and Prabhakar,
>
> Heads up, U-Boot is broken for LS2080 boards. Git bisects to this commit
>
> 7985cdf74b280f86a1c7440298a84f1fb2876fd9
> arm64: Remove non-full-va map code
>
> Please take a deeper look at the MMU tables.
>
Found it. It is caus
Hi Tom,
On 03/20/2016 03:54 PM, Eric Nelson wrote:
> On 03/20/2016 03:13 PM, Tom Rini wrote:
>> On Sun, Mar 20, 2016 at 12:35:53PM -0700, Eric Nelson wrote:
>>> On 03/17/2016 02:23 PM, Stephen Warren wrote:
On 03/16/2016 03:40 PM, Eric Nelson wrote:
> Signed-off-by: Eric Nelson
On 03/20/2016 06:45 PM, Eric Nelson wrote:
> Add a block device cache to speed up repeated reads of block devices by
> various filesystems.
>
...
>
> Signed-off-by: Eric Nelson
> ---
> drivers/block/Makefile | 1 +
> drivers/block/cache_block.c | 240
> +
Hi Marek,
On 03/21/2016 09:49 AM, Marek Vasut wrote:
> On 03/21/2016 02:48 PM, Eric Nelson wrote:
>> On 03/20/2016 06:59 PM, Marek Vasut wrote:
>>> On 03/21/2016 02:45 AM, Eric Nelson wrote:
Here's a more full-featured implementation of a cache for block
devices that uses a small linked
On 03/21/2016 02:48 PM, Eric Nelson wrote:
> Hi Marek,
>
> On 03/20/2016 06:59 PM, Marek Vasut wrote:
>> On 03/21/2016 02:45 AM, Eric Nelson wrote:
>>> Here's a more full-featured implementation of a cache for block
>>> devices that uses a small linked list of cache blocks.
>>
>> Why do you use li
On Mon, Mar 21, 2016 at 8:47 AM, Bin Meng wrote:
> Introduce CONFIG_RTL8169 in Kconfig and move over boards' defconfig
> to use that.
>
> Signed-off-by: Bin Meng
Acked-by: Joe Hershberger
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On Mon, Mar 21, 2016 at 8:47 AM, Bin Meng wrote:
> Some boards' defconfig files are out of order. Clean this up.
>
> Signed-off-by: Bin Meng
Acked-by: Joe Hershberger
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On Mon, Mar 21, 2016 at 8:47 AM, Bin Meng wrote:
> Introduce CONFIG_RTL8139 in Kconfig and move over boards' defconfig
> to use that.
>
> Signed-off-by: Bin Meng
Acked-by: Joe Hershberger
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On Mon, Mar 21, 2016 at 3:49 AM, Prabhakar Kushwaha
wrote:
> Return value of get_mc_boot_status() in case of failure is not necessary
> to be -1.
>
> So update the error condition check.
>
> Signed-off-by: Prabhakar Kushwaha
> Reported-by: Yao Yuan
Acked-by: Joe Hershberger
___
Hi Vasily,
On 21.03.2016 02:54, Marek Vasut wrote:
> On 03/21/2016 02:37 AM, Vasily Khoruzhick wrote:
>> Otherwise flash remains in read status mode and it's not possible
>> to access data on flash.
>>
>> Signed-off-by: Vasily Khoruzhick
>
> CCing Stefan and Scott on this one.
>
>> ---
>> dri
It seems that building cache_v7.c with gcc6 with -O2 or -Os results in
an unreliable u-boot (only boots the kernel some of the time), at least
on sunxi boards. For details see:
https://bugzilla.redhat.com/show_bug.cgi?id=1318788
This commit adds -O1 at the end of the CFLAGS when building
cache_v7
On 03/21/2016 07:47 AM, Bin Meng wrote:
Introduce CONFIG_RTL8169 in Kconfig and move over boards' defconfig
to use that.
Acked-by: Stephen Warren
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Hi All,
Here is a workaround for a problem I've been debugging today, for
details see: https://bugzilla.redhat.com/show_bug.cgi?id=1318788
We're still investigating what the real problem is in the mean time
I wanted to share this workaround in case others are hitting the same
problem.
Regards,
On 03/21/2016 03:11 AM, Peng Fan wrote:
> Hi Maro,
>
> +More people. There maybe more ideas about this.
>
> On Mon, Mar 21, 2016 at 10:32:46AM +0100, mario@gdsys.cc wrote:
>> Hi Peng,
>>
>> Quoting Peng Fan :
>>
>>> Hi Mario,
>>>
>>> On Fri, Mar 18, 2016 at 09:16:48AM +0100, mario@gdsys.c
On Mon, 2016-03-21 at 22:05 +0800, Chin Liang See wrote:
> On Fri, 2016-03-04 at 20:03 +0100, Marek Vasut wrote:
> > On 03/04/2016 05:06 PM, Dinh Nguyen wrote:
> > > On 03/02/2016 05:24 PM, Marek Vasut wrote:
> > > > On 03/03/2016 12:08 AM, Dinh Nguyen wrote:
> > > > > On 03/02/2016 04:54 PM, Dinh
Kconfig default settings are same as mentioned Sinovoip
Bpi-m3 schematic.
As axp818 ALDO support is enabled, it causes bpi-m3 fail to boot
if ALDOs are set to 0.
Signed-off-by: Vishnu Patekar
---
configs/Sinovoip_BPI_M3_defconfig | 3 ---
1 file changed, 3 deletions(-)
diff --git a/configs/Sin
Hello,
I forgot to post this patch, Thanks to Kevin Chua Soon Jia
who reported that latest mainline u-boot fail to boot and reminded me to post
it.
For Banana-pi m3, ALDO must not be set to zero, default settings are same as
mentioned Sinovoip Bpi-m3 schematic.
Vishnu Patekar (1):
sunxi: sin
Hi Stephen,
On 03/20/2016 12:35 PM, Eric Nelson wrote:
> On 03/17/2016 02:23 PM, Stephen Warren wrote:
>> On 03/16/2016 03:40 PM, Eric Nelson wrote:
...
>> Do you have any stats on how many operations this saves for typical FS
>> operations such as:
>>
>> - Partition table type identification (wit
On Fri, 2016-03-04 at 20:03 +0100, Marek Vasut wrote:
> On 03/04/2016 05:06 PM, Dinh Nguyen wrote:
> > On 03/02/2016 05:24 PM, Marek Vasut wrote:
> > > On 03/03/2016 12:08 AM, Dinh Nguyen wrote:
> > > > On 03/02/2016 04:54 PM, Dinh Nguyen wrote:
> > > > > CC: Marek Vasut
> > > > >
> > > > > On 03/
Hi Bin,
On 21.03.2016 13:43, Bin Meng wrote:
> On Mon, Mar 21, 2016 at 8:04 PM, Stefan Roese wrote:
>> Hi Bin,
>>
>> On 21.03.2016 10:03, Stefan Roese wrote:
>>
>>
>>
> static int designware_i2c_probe_chip(struct udevice *bus, uint
> chip_addr,
> @@ -476,14 +519,45 @@ static int
Booting mx6qp sabreauto board and then doing:
=> saveenv
=> reset
, causes a system hang.
This happens because the size of the U-Boot binary is larger than
CONFIG_ENV_OFFSET.
Fix this problem by increasing CONFIG_ENV_OFFSET, so that the U-boot binary
and the environment variables region do not
The 2nd usb controller on sun4i/sun7i has its base address 0x8000
bytes from the 1st one, rather then 0x1000. Also the ahb clk gates
are interleaved with the ohci clk-gates introducing a hole between
the clks for usb1 and usb2.
Signed-off-by: Hans de Goede
---
drivers/usb/host/ehci-sunxi.c | 13
Introduce CONFIG_RTL8169 in Kconfig and move over boards' defconfig
to use that.
Signed-off-by: Bin Meng
---
Changes in v2:
- Rebase on top of u-boot/master
- Update board config headers to remove additional useless lines
configs/beaver_defconfig| 1 +
configs/cardhu_defconfig
Introduce CONFIG_RTL8139 in Kconfig and move over boards' defconfig
to use that.
Signed-off-by: Bin Meng
---
Changes in v2: None
configs/MPC8544DS_defconfig | 1 +
drivers/net/Kconfig | 6 ++
include/configs/MPC8536DS.h | 1 -
include/configs/MPC8544DS.h | 1 -
include/conf
Some boards' defconfig files are out of order. Clean this up.
Signed-off-by: Bin Meng
---
Changes in v2: None
configs/am3517_evm_defconfig | 4 ++--
configs/am437x_sk_evm_defconfig | 2 +-
configs/chromebook_jerry_defconfig | 2 --
configs/chromebook_l
Hi Jagan,
Le 21/03/2016 10:07, Jagan Teki a écrit :
> Hi Cyrille,
>
> On 18 March 2016 at 20:48, Cyrille Pitchen wrote:
>> Hi Stefan,
>>
>> Le 18/03/2016 14:48, Stefan Roese a écrit :
>>> Hi All,
>>>
>>> please excuse the late reply to this thread. But I'm very interested
>>> in QSPI, as one of
Hi Bin,
On 21.03.2016 13:43, Bin Meng wrote:
On Mon, Mar 21, 2016 at 8:04 PM, Stefan Roese wrote:
Hi Bin,
On 21.03.2016 10:03, Stefan Roese wrote:
static int designware_i2c_probe_chip(struct udevice *bus, uint chip_addr,
@@ -476,14 +519,45 @@ static int designware_i2c_probe(struct ude
On 03/21/2016 12:44 PM, Purna Chandra Mandal wrote:
> On 03/21/2016 05:09 PM, Marek Vasut wrote:
>> On 03/21/2016 12:19 PM, Purna Chandra Mandal wrote:
>>> On 03/21/2016 04:49 PM, Marek Vasut wrote:
>>>
On 03/21/2016 08:35 AM, Purna Chandra Mandal wrote:
> ARM defines __raw_writes[bwql], _
Hi Stefan,
On Mon, Mar 21, 2016 at 8:04 PM, Stefan Roese wrote:
> Hi Bin,
>
> On 21.03.2016 10:03, Stefan Roese wrote:
>
>
>
static int designware_i2c_probe_chip(struct udevice *bus, uint
chip_addr,
@@ -476,14 +519,45 @@ static int designware_i2c_probe(struct udevice *bus)
>>>
On 03/21/2016 01:34 PM, Bakhvalov, Denis (Nokia - PL/Wroclaw) wrote:
> Hi,
>
> Working perfectly!
> Thanks for helping me remove this nasty workaround.
Thanks!
I sent the patch out and will pick it after standard review.
You can add a Tested-by tag on it if you want.
>> We should parse the OF n
Thus far, the socfpga init code had hard-coded the configuration
of the ethernet PHY interface to RGMII in the ethernet registers
in sysmgr space, so PHYs connected in another modes did not work.
This patch fixes support for configurations where the ethernet PHYs
are connected over MII/GMII/RMII i
Hi,
Working perfectly!
Thanks for helping me remove this nasty workaround.
> We should parse the OF node phy-mode, which describes which mode your
> PHY uses.
Right!
Best regards,
Denis Bakhvalov
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Hi,
On Sun, Mar 20, 2016 at 3:52 PM, Michael Haas wrote:
> Hello all,
>
> I'd like to add some device-specific hacks to realtek.c. I'm using the
> Olimex A20-OlinuXino-Lime2 which uses the RTL8211CL PHY.
>
> Which of the various phy_driver structs is responsible for that device?
> I presume it's
Hi Hans,
I updated U-boot on my boards to your latest sunxi-wip branch:
f965340 ("sunxi: Enable support for the eMMC found on the orangepi plus")
My Hummingbird A31 fails to boot after this. See log:
HELLO! BOOT0 is starting!
boot0 version : 3.0.0
reg_addr 0x01f00100 =0x
reg_addr 0x
Hi Bin,
On 21.03.2016 10:03, Stefan Roese wrote:
>>>static int designware_i2c_probe_chip(struct udevice *bus, uint chip_addr,
>>> @@ -476,14 +519,45 @@ static int designware_i2c_probe(struct udevice *bus)
>>>{
>>> struct dw_i2c *priv = dev_get_priv(bus);
>>>
>>> +#ifdef CONFIG
On 03/21/2016 05:09 PM, Marek Vasut wrote:
> On 03/21/2016 12:19 PM, Purna Chandra Mandal wrote:
>> On 03/21/2016 04:49 PM, Marek Vasut wrote:
>>
>>> On 03/21/2016 08:35 AM, Purna Chandra Mandal wrote:
ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql]
On 03/21/2016 12:19 PM, Purna Chandra Mandal wrote:
> On 03/21/2016 04:49 PM, Marek Vasut wrote:
>
>> On 03/21/2016 08:35 AM, Purna Chandra Mandal wrote:
>>> ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
>>> but not the writes[bwql], reads[bwql] needed by some drivers.
>>>
>>> Sig
On 03/21/2016 04:49 PM, Marek Vasut wrote:
> On 03/21/2016 08:35 AM, Purna Chandra Mandal wrote:
>> ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
>> but not the writes[bwql], reads[bwql] needed by some drivers.
>>
>> Signed-off-by: Purna Chandra Mandal
> Applied all four to u-boo
On 03/21/2016 08:35 AM, Purna Chandra Mandal wrote:
> ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
> but not the writes[bwql], reads[bwql] needed by some drivers.
>
> Signed-off-by: Purna Chandra Mandal
Applied all four to u-boot-usb/master, thanks!
--
Best regards,
Marek Vas
On 03/21/2016 09:16 AM, Bakhvalov, Denis (Nokia - PL/Wroclaw) wrote:
> Hi,
Hi!
> I solved the Ethernet problem on our board.
>
> The problem was in the register below:
>
> Link:
> http://wl.altera.com/literature/hb/arria-v/hps.html#topic/sfo1410067853518.html
> Registers used by the EMACs. All
Hi,
On Mon, Mar 21, 2016 at 6:18 PM, Hans de Goede wrote:
> Hi,
>
>
> On 21-03-16 11:06, Chen-Yu Tsai wrote:
>>
>> Hi,
>>
>> On Mon, Mar 21, 2016 at 5:57 PM, Hans de Goede
>> wrote:
>>>
>>> HI,
>>>
>>>
>>> On 21-03-16 10:49, wens Tsai wrote:
Hi Hans,
I updated U-boot on
Hi,
On 21-03-16 11:06, Chen-Yu Tsai wrote:
Hi,
On Mon, Mar 21, 2016 at 5:57 PM, Hans de Goede wrote:
HI,
On 21-03-16 10:49, wens Tsai wrote:
Hi Hans,
I updated U-boot on my boards to your latest sunxi-wip branch:
f965340 ("sunxi: Enable support for the eMMC found on the orangepi
p
Hi Maro,
+More people. There maybe more ideas about this.
On Mon, Mar 21, 2016 at 10:32:46AM +0100, mario@gdsys.cc wrote:
>Hi Peng,
>
>Quoting Peng Fan :
>
>>Hi Mario,
>>
>>On Fri, Mar 18, 2016 at 09:16:48AM +0100, mario@gdsys.cc wrote:
>>>
>>>Hello,
>>>
>>>I've been working on a QorIQ P1
Hi,
On Mon, Mar 21, 2016 at 5:57 PM, Hans de Goede wrote:
> HI,
>
>
> On 21-03-16 10:49, wens Tsai wrote:
>>
>> Hi Hans,
>>
>> I updated U-boot on my boards to your latest sunxi-wip branch:
>>
>> f965340 ("sunxi: Enable support for the eMMC found on the orangepi
>> plus")
>>
>> My Hummingbir
HI,
On 21-03-16 10:49, wens Tsai wrote:
Hi Hans,
I updated U-boot on my boards to your latest sunxi-wip branch:
f965340 ("sunxi: Enable support for the eMMC found on the orangepi plus")
My Hummingbird A31 fails to boot after this. See log:
HELLO! BOOT0 is starting!
boot0 version : 3.0.0
Hi Peng,
Quoting Peng Fan :
Hi Mario,
On Fri, Mar 18, 2016 at 09:16:48AM +0100, mario@gdsys.cc wrote:
Hello,
I've been working on a QorIQ P1022 board (controlcenterd) to run the newest
U-Boot on it, and I encountered some strange behavior.
During boot, we get these error messages
"
ER
Hi Heiko,
On Mon, Mar 21, 2016 at 07:50:32AM +0100, Heiko Schocher wrote:
>Hello Peng Fan,
>
>Sorry for the late reply ...
>
>Am 11.03.2016 um 09:47 schrieb Peng Fan:
>>Implement i2c_idle_bus in driver, then setup_i2c can
>>be dropped for boards which enable DM_I2C/DM_GPIO/PINCTRL.
>>The i2c_idle_
Hi Mugunthan,
On 16 March 2016 at 19:50, Jagan Teki wrote:
> On 16 March 2016 at 09:14, Qianyu Gong wrote:
>>
>>> -Original Message-
>>> From: Jagan Teki [mailto:jagannadh.t...@gmail.com]
>>> Sent: Tuesday, March 15, 2016 7:18 PM
>>> To: Qianyu Gong ; Huan Wang
>>> Cc: york sun ; Tom Ri
Hi Stefan,
On Fri, Mar 18, 2016 at 8:01 PM, Stefan Roese wrote:
> Hi Saket,
>
>
> On 30.08.2015 02:10, Saket Sinha wrote:
>>
>> This series adds ACPI table support on Minnowmax.
>>
>> Saket Sinha (2):
>>x86: Add ACPI table support to Minnowmax
>>x86: Add DSDT table for supporting ACPI on
Hi Cyrille,
On 18 March 2016 at 20:48, Cyrille Pitchen wrote:
> Hi Stefan,
>
> Le 18/03/2016 14:48, Stefan Roese a écrit :
>> Hi All,
>>
>> please excuse the late reply to this thread. But I'm very interested
>> in QSPI, as one of my customers uses Micron QSPI NOR and really wants
>> to take full
Hi Stefan,
On Mon, Mar 21, 2016 at 5:03 PM, Stefan Roese wrote:
> Hi Bin,
>
> On 21.03.2016 09:54, Bin Meng wrote:
>> On Fri, Mar 18, 2016 at 3:54 PM, Stefan Roese wrote:
>>> This patch adds support for the PCI(e) based I2C cores. Which can be
>>> found for example on the Intel Bay Trail SoC. It
Hi Bin,
On 21.03.2016 09:54, Bin Meng wrote:
> On Fri, Mar 18, 2016 at 3:54 PM, Stefan Roese wrote:
>> This patch adds support for the PCI(e) based I2C cores. Which can be
>> found for example on the Intel Bay Trail SoC. It has 7 I2C controllers
>> implemented as PCI devices.
>>
>> This patch als
This patch provides an alternative to support memory >16MiB (>128Mib).
Indeed using the Base Address Register changes the internal state of
the SPI flash memory. However some early boot loaders expect to access
the first memory bank of the SPI flash. Then when another bank has been
selected, those
On Fri, Mar 18, 2016 at 3:54 PM, Stefan Roese wrote:
> This patch prepares the designware I2C driver for the DM conversion.
> This is mainly done by removing struct i2c_adapter from the functions
> that shall be used by the DM driver version as well.
>
> Signed-off-by: Stefan Roese
> Cc: Simon Gl
Hi Stefan,
On Fri, Mar 18, 2016 at 3:54 PM, Stefan Roese wrote:
> This patch adds support for the PCI(e) based I2C cores. Which can be
> found for example on the Intel Bay Trail SoC. It has 7 I2C controllers
> implemented as PCI devices.
>
> This patch also adds the fixed values for the timing re
Hi Stefan,
On Fri, Mar 18, 2016 at 3:54 PM, Stefan Roese wrote:
> This patch adds DM support to the designware I2C driver. It currently
> supports DM and the legacy I2C support. The legacy support should be
> removed, once all platforms using it have DM enabled.
>
> Signed-off-by: Stefan Roese
>
On Fri, Mar 18, 2016 at 3:54 PM, Stefan Roese wrote:
> Integrating set_speed() into dw_i2c_set_bus_speed() will make the
> conversion to DM easier for this driver.
>
> Signed-off-by: Stefan Roese
> Cc: Simon Glass
> Cc: Bin Meng
> Cc: Marek Vasut
> Cc: Heiko Schocher
> ---
> drivers/i2c/desi
Hi Stefan,
On Fri, Mar 18, 2016 at 3:54 PM, Stefan Roese wrote:
> Add the ic_enable_status register to the ic_regs struct. Additionally
typo: i2c_regs
> the register offsets are added, to better check, if the offset matches
> the register description in the datasheet.
>
> Signed-off-by: Stefan
Hi Stefan,
On Fri, Mar 18, 2016 at 3:54 PM, Stefan Roese wrote:
> dw_i2c_enable() is used to dis-/en-able the I2C controller. It makes
> sense to add such a function, as the controller is dis-/en-abled
> multiple times in the code. Additionally, this function now checks,
> if the controller is re
This patch provides an alternative to support memory >16MiB (>128Mib).
Indeed using the Base Address Register changes the internal state of
the SPI flash memory. However some early boot loaders expect to access
the first memory bank of the SPI flash. Then when another bank has been
selected, those
Return value of get_mc_boot_status() in case of failure is not necessary
to be -1.
So update the error condition check.
Signed-off-by: Prabhakar Kushwaha
Reported-by: Yao Yuan
---
Changes for v2: Incorporated York's comments
- Added comments
drivers/net/fsl-mc/mc.c | 3 ++-
1 file changed,
The Sinlinx A31s SDK is a A31s based module/baseboard development kit.
The core module has the SoC, PMIC, DRAM, eMMC and supporting components.
There are also pads for UART0, JTAG and I2S.
The baseboard has 100 Mbps Ethernet, 5x USB 2.0 host ports via a USB 2.0
hub chip, MMC, HDMI, SPDIF, CIR, au
Hi Tom,
even though its not ppc4xx, I took Dirk's mpc83xx patches via this
git repository get upstream. I hope this is okay for you. So here
we go:
The following changes since commit 83d95b67d3731e39292d858924ade3be68c167af:
Merge branch 'master' of git://git.denx.de/u-boot-socfpga (2016-03-20
1. Support compatible string "spi-gpio" which is used by Linux
Linux use different bindings, so use UBOOT_COMPAT and
LINUX_COMPAT to differentiate them.
2. Bug fix
When doing xfer, should use device->parent, but not device
When doing bit xfer, should use "!!(tmpdout & 0x80)", but not
Introduce driver to support "fairchild,74hc595" devices.
1. Take linux drivers/drivers/gpio/gpio-74x164.c as reference.
2. Following the naming used in Linux driver with gen_7x164 as the prefix.
3. Enable CONFIG_DM_74X164 to use this driver.
4. Follow Documentation/devicetree/bindings/gpio/gpio-74x
On 16.03.2016 09:20, dirk.eib...@gdsys.cc wrote:
From: Dirk Eibach
Dirk Eibach (2):
strider: Add DP501 support for cpu model
strider: Define pca593x widths
Reinhard Pfau (1):
strider: use optimised bus timing for FPGA access
board/gdsys/common/dp501.c| 31 +++
Hello Dear U-Boot support,
Please comment on this also.
I have custom board with Altera Arria 5 SocFpga onboard.
U-Boot version: 2016.03-rc1
I had probems with configuring fpga from u-boot:
U-Boot > bridge disable
U-Boot > run config_fpga
FPGA: Could not configure
Command failed, result=-2
So,
Hi,
I solved the Ethernet problem on our board.
The problem was in the register below:
Link:
http://wl.altera.com/literature/hb/arria-v/hps.html#topic/sfo1410067853518.html
Registers used by the EMACs. All fields are reset by a cold or warm reset.
Module Instance Base AddressRegister Addres
The ICnova-A20-SWAC is a baseboard, equipped with the ICnova-A20 SoM from
In-Circuit:
http://wiki.in-circuit.de/index.php5?title=ICnova_A20_SODIMM
http://linux-sunxi.org/In-Circuit_ICnova_A20
This patch adds support for this board, including ethernet, LCD and USB
support.
Signed-off-by: Stefan R
Enable MUSB host and USB storage support for Microchip
PIC32MZ[DA] Starter Kit.
Signed-off-by: Purna Chandra Mandal
---
Changes in v5: None
Changes in v4:
- dts: add USB clock to musb node
- add missing CONFIG_PIC32_USB in defconfig
Changes in v3:
- add arch specific reads{bwlq}, writes{bwlq} i
This driver adds support of PIC32 MUSB OTG controller as dual role device.
It implements platform specific glue to reuse musb core.
Signed-off-by: Cristian Birsan
Signed-off-by: Purna Chandra Mandal
---
Changes in v5:
- drop OR'ing irqreturn_t in pic32_interrupt().
Changes in v4:
- add suppor
Definition of writes{bwlq}, reads{bwlq} are now added into arch specific
asm/io.h. So removing them from driver to fix re-definition error
Signed-off-by: Purna Chandra Mandal
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
drivers/mtd/nand/pxa3xx_nand.c
It contains fix for core MUSB driver, platform specific
glue for PIC32 and board support.
Changes in v5:
- drop OR'ing irqreturn_t in pic32_interrupt().
Changes in v4:
- add support to handle multiple MUSB controllers.
- remove unaligned buffer handling in musb_read_fifo
- update comment and erro
ARM defines __raw_writes[bwql], __raw_reads[bwql] in arch io.h
but not the writes[bwql], reads[bwql] needed by some drivers.
Signed-off-by: Purna Chandra Mandal
---
Changes in v5: None
Changes in v4: None
Changes in v3: None
Changes in v2: None
arch/arm/include/asm/io.h | 7 +++
1 file cha
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