On PH1-sLD3, eMMC and NAND are assigned to different I/O pins.
Both devices can be enabled at the same time.
Signed-off-by: Masahiro Yamada
---
arch/arm/dts/uniphier-ph1-sld3-ref.dts | 4
1 file changed, 4 insertions(+)
diff --git
On Mon, Mar 28, 2016 at 10:58:34AM +0200, Carlo Caione wrote:
> On Sun, Mar 27, 2016 at 10:22 PM, Beniamino Galvani
> wrote:
> > Enable serial support in the ODROID-C2 configuration.
> >
> > Signed-off-by: Beniamino Galvani
> > ---
> >
On Tue, Mar 29, 2016 at 09:06:20AM -0700, York Sun wrote:
> Tom,
>
> The following changes since commit 0764f24ae6bc937e358990c357f7452b4d5351e3:
>
> net: Move CONFIG_RTL8169 to Kconfig (2016-03-22 12:19:53 -0400)
>
> are available in the git repository at:
>
>
On Tue, Mar 29, 2016 at 10:24:49AM -0700, Tom Warren wrote:
> Tom,
>
> Please pull u-boot-tegra/master into U-Boot/master. Thanks!
>
> All tegra builds are OK (32-bit and 64-bit), and Stephen reports that tests
> of u-boot-tegra/master all pass.
>
>
> The following changes since commit
On Mon, Mar 28, 2016 at 11:30:39AM +0200, Heiko Schocher wrote:
> Hello Tom,
>
> please pull from u-boot-i2c.git master
>
> The following changes since commit f3c2cab87878d2ecd5bd796ee940dff814aa3255:
>
> Revert "pxa_lcd: make driver cache-aware" (2016-03-27 20:58:08 -0400)
>
> are
This patch aims to fix the order of CSU slave index for the LS1021a
board.
Signed-off-by: Vincent Siles
---
arch/arm/include/asm/arch-ls102xa/ns_access.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
Hi,
On 28/03/2016 14:56, Hans de Goede wrote:
> Hi,
>
> On 25-03-16 18:14, Quentin Schulz wrote:
>> Hi,
>>
>> I am trying to get Ethernet to work through the USB port of the Sinlinx
>> SinA33 on U-Boot to use TFTP to get the kernel and dtb files.
>>
>> However, I am getting 'data abort' when
> -Original Message-
> From: York Sun [mailto:york@nxp.com]
> Sent: Tuesday, March 29, 2016 12:30 AM
> To: U-Boot Mailing List
> Cc: Stuart Yoder ; Scott Wood ;
> Huan Wang ; york sun
In [1], we can see that the order of CSU slave indexes is a bit
scrambled at the end. The ns_access.h file does not represent this
ordering correctly. This patch aims to fix that.
[1]:
On Fri, 2016-03-11 at 10:18 +, Qianyu Gong wrote:
> Hi Scott,
>
> > -Original Message-
> > From: Scott Wood [mailto:o...@buserror.net]
> > Sent: Tuesday, February 23, 2016 8:12 AM
> > To: Qianyu Gong ; u-boot@lists.denx.de; york sun
> >
> > Cc:
On 03/29/2016 03:44 AM, George Broz wrote:
> On 20 March 2016 at 08:55, Dinh Nguyen wrote:
>>
>>
>> On 03/16/2016 08:35 PM, Marek Vasut wrote:
Does this work for anybody else?
Is it in anyone's experience that these (cheaper) Terasic
eval boards
On 03/29/2016 03:56 AM, George Broz wrote:
> On 20 March 2016 at 09:49, Marek Vasut wrote:
>> On 03/18/2016 10:22 PM, George Broz wrote:
>>> On 18 March 2016 at 12:32, Marek Vasut wrote:
On 03/18/2016 07:59 PM, George Broz wrote:
> On 16 March 2016 at
Tom,
Please pull u-boot-tegra/master into U-Boot/master. Thanks!
All tegra builds are OK (32-bit and 64-bit), and Stephen reports that tests
of u-boot-tegra/master all pass.
The following changes since commit f3c2cab87878d2ecd5bd796ee940dff814aa3255:
Revert "pxa_lcd: make driver cache-aware"
Julian,
> -Original Message-
> From: Julian Scheel [mailto:jul...@jusst.de]
> Sent: Wednesday, March 23, 2016 3:23 AM
> To: swar...@wwwdotorg.org; u-boot@lists.denx.de; Tom Warren
> ; Thierry Reding
> Subject: Re: [PATCHv3 2/2] Add support the
On Tue, Mar 29, 2016 at 5:51 AM, Masahiro Yamada
wrote:
> Make sure to call unmap_sysmem() for address allocated by map_sysmem()
> before leaving the function; however this patch gives no impact on
> the behavior because map_sysmem()/unmap_sysmem() does nothing
We have a separate compatible for almost each SoC. Add one for the A83T.
Signed-off-by: Chen-Yu Tsai
---
drivers/usb/host/ohci-sunxi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/ohci-sunxi.c b/drivers/usb/host/ohci-sunxi.c
index d4fb95a..6f3f4ce 100644
This provides the minimal changes to the A83T dtsi to enable USB in
U-boot. It is not what will be submitted to the kernel.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/dts/sun8i-a83t.dtsi | 34 ++
1 file changed, 34 insertions(+)
diff --git
This provides the minimal changes to the H8Homlet v2 dts to enable USB
in U-boot. It is not what will be submitted to the kernel.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/dts/sun8i-a83t-allwinner-h8homlet-v2.dts | 12
1 file changed, 12 insertions(+)
diff --git
This provides the minimal changes to the Cubietruck Plus dts to enable USB
in U-boot. It is not what will be submitted to the kernel.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/dts/sun8i-a83t-cubietruck-plus.dts | 12
1 file changed, 12 insertions(+)
diff --git
The h8_homlet_v2 has 2 USB host ports, one connected to the OTG
controller, one connected to the EHCI/OHCI pair.
Also provide the card detect pin for MMC.
Signed-off-by: Chen-Yu Tsai
---
configs/h8_homlet_v2_defconfig | 5 +
1 file changed, 5 insertions(+)
diff --git
AXP818 supports VBUS drive function, even though the manual does not
mention it.
Signed-off-by: Chen-Yu Tsai
---
include/axp818.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/axp818.h b/include/axp818.h
index 003477f..5630eed 100644
---
Like the Allwinner A33 SoC, the A83T is missing the config register
from the musb USB DRD hardware block. Use a known working value for
it.
Signed-off-by: Chen-Yu Tsai
---
drivers/usb/musb-new/musb_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
The Cubietruck Plus uses all 3 USB controllers:
- USB OTG functions are provided by the musb USB OTG controller
- Onboard SATA is provied by a USB-SATA bridge connected to USB1
- The USB host ports on the board are provided by an HSIC USB hub
FLDO1 is set to 1.2V for HSIC.
Signed-off-by:
We have a separate compatible for almost each SoC. Add one for the A83T.
Signed-off-by: Chen-Yu Tsai
---
drivers/usb/host/ehci-sunxi.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/usb/host/ehci-sunxi.c b/drivers/usb/host/ehci-sunxi.c
index 677a5d3..d5eb492 100644
VBUS drive is supported on AXP221 and later PMICs. Rework the macros
so we can support this on later PMICs without too much work.
Signed-off-by: Chen-Yu Tsai
---
drivers/gpio/axp_gpio.c | 25 ++---
include/axp221.h| 8
2 files changed, 18
The A83T has 3 PHYs, the last one being HSIC, which has 2 clocks.
Also there is only 1 OHCI.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/include/asm/arch-sunxi/clock_sun8i_a83t.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git
DLDO4 supplies power to the PD pins, and the AC200 Ethernet PHY /
composite video encoder.
Signed-off-by: Chen-Yu Tsai
---
configs/h8_homlet_v2_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/h8_homlet_v2_defconfig b/configs/h8_homlet_v2_defconfig
index
The A83T has 3 USB PHYs: 1 for USB OTG, 1 for standard USB 1.1/2.0 host,
1 for USB HSIC.
Signed-off-by: Chen-Yu Tsai
---
arch/arm/cpu/armv7/sunxi/usb_phy.c | 48 ++
include/configs/sun8i.h| 2 ++
2 files changed, 50 insertions(+)
The FLDOs on AXP818 PMIC normally provide power to CPUS and USB HSIC PHY
on the A83T/H8.
Signed-off-by: Chen-Yu Tsai
---
board/sunxi/board.c| 6 ++
drivers/power/Kconfig | 27 +++
drivers/power/axp818.c | 34 ++
DCDC5 is designed to supply VCC-DRAM, which is normally 1.5V for DDR3,
1.35V for DDR3L, and 1.2V for LPDDR3.
Also remove CONFIG_AXP_DCDC5_VOLT from h8_homlet_v2_defconfig.
Signed-off-by: Chen-Yu Tsai
---
configs/h8_homlet_v2_defconfig | 1 -
drivers/power/Kconfig | 3
Hi everyone,
This series adds more support for axp818 regulators, and USB support
for A83T. Normal EHCI/OHCI USB works, and so does OTG host mode.
I couldn't get my Cubietruck Plus to work in gadget mode though.
No USB device appears on the host end when it enters fastboot.
Patch 1 removes
axp818_init() is declared, but never defined.
Signed-off-by: Chen-Yu Tsai
---
include/axp818.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/axp818.h b/include/axp818.h
index 46d05ad..c2f9847 100644
--- a/include/axp818.h
+++ b/include/axp818.h
@@ -53,8 +53,6 @@
The schematics of the h8_homlet_v2 show DCDC1 set to 3.3V. Some
Allwinner-based boards set it to 3.0V to conserve power. Since the
h8_homlet_v2 is a set-top box board with external power, there is
no such requirement.
Signed-off-by: Chen-Yu Tsai
---
configs/h8_homlet_v2_defconfig
On 29.03.16 17:45, Hans de Goede wrote:
> Hi,
>
> On 03/29/2016 05:29 PM, Alexander Graf wrote:
>> The Pine64 is a kickstarter backed SBC that runs on the Allwinner A64
>> SoC.
>> This SoC can run AArch64 code, so this patch set lifts all arm version
>> indepenent sunxi code into a mach
On 03/22/2016 10:43 PM, Saksham Jain wrote:
> Currently, fsl_secboot_validate function used to set env variable
> "img_addr" to contain address of image being validated.
>
> The function has been changed to output image addr via argument
> img_addr_ptr. The command esbc_validate sets the env
On 03/22/2016 10:43 PM, Saksham Jain wrote:
> For secure boot, currently we were using fixed bootargs for all SoCs.
> This is not needed and we can use the bootargs which are used in
> non-secure boot. Incase bootargs are not defined for non-secure boot
> of any platform, we use default bootargs.
Tom,
The following changes since commit 0764f24ae6bc937e358990c357f7452b4d5351e3:
net: Move CONFIG_RTL8169 to Kconfig (2016-03-22 12:19:53 -0400)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git master
for you to fetch changes up to
On 03/23/2016 04:34 AM, Rai Harninder wrote:
> This patch enable VID support for ls2080ardb platform.
> It uses the common VID driver
>
> Signed-off-by: Rai Harninder
> ---
> Changes in v4:
> - Fix implicit declaration warning for adjust_vdd()
> by including approriate
On 03/23/2016 04:20 AM, Gong Qianyu wrote:
> From: Mingkai Hu
>
> Signed-off-by: Mingkai Hu
> Signed-off-by: Gong Qianyu
> ---
> arch/arm/include/asm/arch-fsl-layerscape/soc.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
On 03/23/2016 04:20 AM, Gong Qianyu wrote:
> From: Mingkai Hu
>
> Signed-off-by: Mingkai Hu
> Signed-off-by: Gong Qianyu
> ---
> arch/arm/include/asm/arch-fsl-layerscape/cpu.h | 1 +
> arch/arm/include/asm/arch-fsl-layerscape/soc.h
On 03/23/2016 04:21 AM, Gong Qianyu wrote:
> It's necessary to set the clock phase and polarity for DSPI
> flash or it could not work properly.
>
> Signed-off-by: Gong Qianyu
> ---
> arch/arm/dts/fsl-ls1043a-qds.dtsi | 8 +++-
> 1 file changed, 7 insertions(+), 1
On 03/22/2016 10:41 PM, Saksham Jain wrote:
> During Secure Boot, a bootscript is validated using its header. This
> patch copies both these images to DDR from NOR and then validates and
> executed them from DDR. (If NOR is the boot source for LS2080).
>
> This copy step is done to make this step
On 03/22/2016 10:43 PM, Saksham Jain wrote:
> In case of fatal failure during secure boot execution (e.g. header not
> found), it is needed that the execution stops. Earlier, we assert reset
> request in case in case of failure. But if the RESET_REQ is not tied off
> to HRESET, this allows the
On 03/16/2016 03:11 AM, Gong Qianyu wrote:
> It has set the qspi_cfg register earlier through PBI when booting from
> QSPI. We'd better not change it.
>
> Signed-off-by: Gong Qianyu
> ---
> arch/arm/cpu/armv8/fsl-layerscape/soc.c | 2 +-
> 1 file changed, 1 insertion(+), 1
On 03/22/2016 10:43 PM, Saksham Jain wrote:
> This commit solves CAAM coherency issue on ls2080. When Caches are
> enabled and CAAM's DMA's AXI transcations are not made cacheable, Core
> reads/write data from/to Caches and CAAM does from Main Memory. This
> forces data flushes to synchronize
On 03/22/2016 10:43 PM, Saksham Jain wrote:
> When MMU is disabled, 64bit Write must be at a memory aligned at 64-bit
> Boundary. So, this commit splits the 64-bit write into two 32-bit writes
> as the memory location is not guaranteed to be 64-bit aligned. The
> alignment exception only occurs
On 03/22/2016 10:43 PM, Saksham Jain wrote:
> During secure boot, SMMU is enabled on POR by SP bootrom. SMMU needs
> to be put in Bypass mode in uboot to enable CAAM transcations to pass
> through.
>
> During Nonsecure Boot, SP BootROM doesn't enable SMMU and at reset
> SMMU is in bypass mode.
>
On 03/22/2016 10:43 PM, Saksham Jain wrote:
> The GUR (DCFG) registers in CCSR space are in Little Endian format for
> ls2080. Defined a config CONFIG_SYS_FSL_CCSR_GUR_LE in
> arch/arm/include/asm/arch-fsl-layerscape/config.h
>
> Signed-off-by: Aneesh Bansal
>
Hi Stefan,
On 03/24/2016 04:29 AM, Stefan Roese wrote:
> Hi Kevin,
>
> On 01.09.2015 14:52, Stefan Roese wrote:
>> Hi Kevin,
>>
>> (Added Luka to Cc, as the Marvell / MVEBU custodian)
>>
>> On 31.08.2015 22:30, Kevin Smith wrote:
>>> On some processors such as Armada 38x, if the hardware-
>>>
On 03/22/2016 10:41 PM, Saksham Jain wrote:
> "fdt_high" env variable has been changed to 0xa000 for ls2080
> during Secure Boot. This env_varible is used to specify the upper limit
> to be used for copying flat device tree. This address must be visible
> to kernel.
>
> The "fdt_high" value
On 03/22/2016 10:41 PM, Saksham Jain wrote:
> During secure boot, Linux image along with other images are validated
> using bootscript. This bootscript also needs to be validated before it
> is executed. This requires a header for bootscript.
>
> When secure boot is enabled, default bootcmd is
On 03/22/2016 10:41 PM, Saksham Jain wrote:
> Sec_init has been called in the starting to initialize SEC Block (CAAM)
> which will be used for Secure Boot validation later for both ls2080a
> qds and rdb. 64-bit address in ESBC Header has been enabled as this SoC
> is based on armv8. Secure Boot
On 03/22/2016 10:41 PM, Saksham Jain wrote:
> For Secure Boot, a header is used to identify key table, signature and
> image address. For Ls-Ch3, there is a new header structure being used.
>
> Currently Key extension (IE) feature is not supported. Single Key
> feature is not supported. Keys must
On 03/22/2016 10:41 PM, Saksham Jain wrote:
> For ls2080, Added configs for various IPs used during secure boot.
> Added address and endianness for SEC and Security Monitor. SRK are
> Fuses in SFP (Fuses for public key's hash). These are stored in Little
> Endian format.
>
> Signed-off-by: Aneesh
On 03/22/2016 10:41 PM, Saksham Jain wrote:
> In LS2080, SFP is Little Endian and Verion is 3.4 . The base address is
> 0x01e80200. SFP will be used in Secure Boot to read fuses.
>
> Signed-off-by: Aneesh Bansal
> Signed-off-by: Saksham Jain
> ---
>
Hi,
On 03/29/2016 05:29 PM, Alexander Graf wrote:
The Pine64 is a kickstarter backed SBC that runs on the Allwinner A64 SoC.
This SoC can run AArch64 code, so this patch set lifts all arm version
indepenent sunxi code into a mach directory and builds the A64 code
as armv8 (aarch64) code.
With
Hi,
On 03/29/2016 05:29 PM, Alexander Graf wrote:
Gcc warns when you try to cast a u32 value into a pointer directly. When someone
calls functions like readl or writel, he's pretty sure the parameter he passes
is an address though, so we can as well cast it for him.
This makes porting 32bit
On 03/18/2016 03:46 AM, Prabhakar Kushwaha wrote:
> NULL pointer should be checked before any dereference. This patch
> move memest after the NULL pointer check.
>
> Signed-off-by: Prabhakar Kushwaha
> Reported-by: Jose Rivera
> ---
>
On 03/18/2016 03:45 AM, Prabhakar Kushwaha wrote:
> Free dflt_dpio pointer after its usage during error handling
>
> Signed-off-by: Prabhakar Kushwaha
> Reported-by: Jose Rivera
> ---
> drivers/net/fsl-mc/mc.c | 2 +-
> 1 file changed, 1
On 03/15/2016 01:45 AM, Gong Qianyu wrote:
> Signed-off-by: Gong Qianyu
> ---
> include/configs/ls1043a_common.h | 8
> 1 file changed, 4 insertions(+), 4 deletions(-)
>
Applied to u-boot-fsl-qoriq master. Awaiting upstream.
Thanks.
York
On 03/02/2016 02:58 PM, Stuart Yoder wrote:
> From: Stuart Yoder
>
> The fsl-mc node has been moved under /soc, so update
> the path references accordingly. Backwards compatibility
> is retained for /fsl-mc.
>
> Delete backwards compatibility for the completely obsolete
>
Some of the code in arch/arm/cpu/armv7/sunxi is actually armv7 specific, while
most of it is just generic code that could as well be used on an AArch64 SoC.
Move all files that are not really tied to armv7 into a new mach-sunxi
directory.
Signed-off-by: Alexander Graf
---
Some parts of the sunxi code cast explicitly between u32 values and pointers.
This is not a problem in practice, because all 64bit SoCs today only use the
lower 32 bits for their phyical address space. But we need to make sure that
the compiler is sure this is not an accident as well.
The Pine64 is a kickstarter backed SBC that runs on the Allwinner A64 SoC.
This SoC can run AArch64 code, so this patch set lifts all arm version
indepenent sunxi code into a mach directory and builds the A64 code
as armv8 (aarch64) code.
With these patches applied, I can successfully boot my 1GB
Gcc warns when you try to cast a u32 value into a pointer directly. When someone
calls functions like readl or writel, he's pretty sure the parameter he passes
is an address though, so we can as well cast it for him.
This makes porting 32bit code to armv8 easier, as it means we don't have to
We currently depend SPL config options on specific machine types which doesn't
scale. Fortunately there's already a kconfig variable that tells us whether we
want to build SPL code at all, so just depend them on this.
Signed-off-by: Alexander Graf
---
arch/arm/Kconfig | 4 ++--
1
From: Siarhei Siamashka
The Allwinner A64 SoC is used in the Pine64. This patch adds
all bits necessary to compile U-Boot for it running in AArch64
mode.
Unfortunately SPL is not ready yet due to legal problems, so
we need to boot using the binary boot0 for now.
From: Siarhei Siamashka
The Pine64+ is a system based on the Allwinner A64 SoC. It is capable of
running AArch64 code and thus is the first of its kind for the sunxi target.
This patch adds a defconfig and device tree chunks for it.
Signed-off-by: Siarhei Siamashka
With the previous implementation, rebooting without registering a recognized
reboot mode would end up with U-Boot checking for a valid power-on reason, which
might result in the device turning off (e.g. with no USB cable attached and no
buttons pressed).
Since this approach is not viable (breaks
This moves the sniper board from the lge to lg, in order to match the devicetree
vendor prefix already defined in the kernel.
Signed-off-by: Paul Kocialkowski
---
arch/arm/cpu/armv7/omap3/Kconfig | 2 +-
board/{lge => lg}/sniper/Kconfig | 2 +-
board/{lge =>
This makes the baudrate for the kernel command line explicit.
Signed-off-by: Paul Kocialkowski
---
include/configs/sniper.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/sniper.h b/include/configs/sniper.h
index 171a8c4..cb25c0a 100644
---
Selecting CONFIG_OF_LIBFDT allows running recent mainline kernels.
Signed-off-by: Paul Kocialkowski
---
configs/kc1_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/kc1_defconfig b/configs/kc1_defconfig
index 1e5c918..4de0b34 100644
---
This adds some environment variables for sysboot and devicetree.
Signed-off-by: Paul Kocialkowski
---
include/configs/kc1.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/configs/kc1.h b/include/configs/kc1.h
index 444a0f3..4803acb 100644
---
With the previous implementation, rebooting without registering a recognized
reboot mode (despite registering the magic) would end up with U-Boot checking
for a valid power-on reason, which might result in the device turning off (e.g.
with no USB cable attached and no buttons pressed).
This was
This makes the baudrate for the kernel command line explicit.
Signed-off-by: Paul Kocialkowski
---
include/configs/kc1.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/kc1.h b/include/configs/kc1.h
index c2ac148..444a0f3 100644
---
Le lundi 28 mars 2016 à 10:06 -0400, Tom Rini a écrit :
> On Mon, Mar 28, 2016 at 02:07:13PM +0200, Paul Kocialkowski wrote:
> > With the previous implementation, rebooting without registering a recognized
> > reboot mode would end up with U-Boot checking for a valid power-on reason,
> > which
> >
On Tue, 29 Mar 2016, Robert P. J. Day wrote:
> one more question, i think, on the framework of u-boot POST tests.
> the README.POST file states:
>
>o) Extensibility
>
> The framework shall allow adding/removing/replacing POST tests.
> Also, standalone POST tests shall be
On 03/28/2016 03:32 PM, Tom Rini wrote:
On Mon, Mar 28, 2016 at 03:15:59PM -0400, Vitaly Andrianov wrote:
U-boot for general purpose KS2 devices is loaded to the beginning of the
internal memory (0x0c00). Secure devices uses this memory and
CONFIG_SYS_TEXT_BASE has to be different for
Currently, these functions assume #address-cells and #size-cells are
both one. Fix them to support 64bit DTB.
Also, I am fixing a buffer overrun bug while I am here. The array
size of gd->bd->bd_dram is CONFIG_NR_DRAM_BANKS. The number of
iteration in the loop should be limited by that CONFIG.
one more question, i think, on the framework of u-boot POST tests.
the README.POST file states:
o) Extensibility
The framework shall allow adding/removing/replacing POST tests.
Also, standalone POST tests shall be supported.
how many different ways are there to extend the list
These defined were used for pre-DM ns16550 serial driver. They are
unneeded because UniPhier SoCs now use DM serial.
Signed-off-by: Masahiro Yamada
---
include/configs/uniphier.h | 6 --
1 file changed, 6 deletions(-)
diff --git a/include/configs/uniphier.h
Make sure to call unmap_sysmem() for address allocated by map_sysmem()
before leaving the function; however this patch gives no impact on
the behavior because map_sysmem()/unmap_sysmem() does nothing except
on Sandbox. Sandbox never runs this code because "booti" is a command
for booting ARM64
Hi,
On 29-03-16 08:38, Quentin Schulz wrote:
Hi,
On 28/03/2016 14:56, Hans de Goede wrote:
Hi,
On 25-03-16 18:14, Quentin Schulz wrote:
Hi,
I am trying to get Ethernet to work through the USB port of the Sinlinx
SinA33 on U-Boot to use TFTP to get the kernel and dtb files.
However, I am
On 21 March 2016 at 03:10, Tom Rini wrote:
>
> LLVM 3.5 noted:
> test/dm/core.c:41:35: warning: unused variable 'test_pdata_pre_reloc'
> [-Wunused-const-variable]
> static const struct dm_test_pdata test_pdata_pre_reloc = {
>
> And the correct fix here is that the
Hello Tom,
On Sun, 27 Mar 2016 09:36:41 -0400, Tom Rini wrote:
> On Fri, Mar 25, 2016 at 07:37:25AM +0100, Albert ARIBAUD wrote:
> > Hello Tom,
> >
> > On Thu, 24 Mar 2016 20:49:42 -0400, Tom Rini wrote:
> > > On Thu, Mar 24, 2016 at 08:50:03AM +0100,
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