Commit d245059ff797 ("ARM: rmobile: rcar-gen3: Activate bootm_size")
only fixed the superfluous CONFIG_SYS_BOOTMAPSZ for R-Car Gen3, even
though it listed all affected boards. Apply the same fix to Gen2.
Signed-off-by: Marek Vasut
Fixes: d245059ff797 ("ARM: rmobile: rcar-gen3: Activate bootm_size
Reset and initialize the PHY once in the probe() function rather than
doing it over and over again is start() function. This requires us to
keep the clock enabled while the driver is in use. This significantly
reduces the time between transfers as the PHY doesn't have to restart
autonegotiation bet
The PHY LED mode register mask should be 0xc000 , not 0xc.
Correct the mask to operate on the right bits.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
board/renesas/alt/alt.c | 2 +-
board/renesas/gose/gose.c | 2 +-
board/renesas/koelsch/koelsch.c | 2 +-
board/renesa
The CLK2MHZ macro is unused, remove it.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
board/renesas/alt/alt.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/board/renesas/alt/alt.c b/board/renesas/alt/alt.c
index b18ab7ce88..7a9a51e4cd 100644
--- a/board/renesas/alt/alt.c
+++ b/board
Synchronize the R8A7794 Alt defconfig, enable DM SPI, DM SPI FLASH
and I2C driver support.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
configs/alt_defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/configs/alt_defconfig b/configs/alt_defconfig
index c4ece79507..5e5467fe2f
The R8A7794_ETHERNET_B config option is unused and based on the
description, this is a setting which should be fully done on a
DT level instead. Remove this config option.
Signed-off-by: Marek Vasut
Cc: Nobuhiro Iwamatsu
---
board/renesas/alt/Kconfig | 9 -
1 file changed, 9 deletions(-
I attempted to merge in the latest master branch into
https://github.com/sifive/u-boot/tree/sandbox and I got
the following error, which seems somewhat broken..
Device Tree Source is not correctly specified.
Please define 'CONFIG_DEFAULT_DEVICE_TREE'
or build with 'DEVICE_TREE=' argument
dts/Mak
Hi Simon,
On 03/29/2019 11:33 PM, Simon Goldschmidt wrote:
>
>
> On 29.03.19 15:09, Kever Yang wrote:
>> Rockchip fit image with atf may have firmware for sram,
>> so the fit driver need to read data from mmc to sram,
>> but Rockchip mmc controller does not support this data
>> path, we have to r
Am 07.03.19 um 11:36 schrieb Philippe Reynes:
> This driver is used on several big endian mips board.
> So we could use raw I/O function instead of forcing
> big endian access.
>
> Signed-off-by: Philippe Reynes
> ---
> drivers/gpio/bcm6345_gpio.c | 12 ++--
> 1 file changed, 6 inserti
Hi Tom,
please pull sunxi HDMI clock fix for v2019.04-rc4.
Travis CI: https://travis-ci.org/vdsao/u-boot-video/builds/512749325
Thanks,
Anatolij
The following changes since commit 2b9b9cdd5f9ae1cbc786ba3c2255a51b3ea4a636:
Merge branch '2019-03-25-master-imports' (2019-03-26 23:17:21 -0400)
On Sun, 24 Mar 2019 19:26:40 +0100
Jernej Skrabec jernej.skra...@siol.net wrote:
...
> drivers/video/sunxi/sunxi_dw_hdmi.c | 62 +
> 1 file changed, 37 insertions(+), 25 deletions(-)
Applied to u-boot-video/master, thanks!
--
Anatolij
_
Tom,
I’ve prepared two last-minute fixes for the rockchip architecture.
A clean bill-of-health from Travis is at
https://travis-ci.org/ptomsich/u-boot-rockchip/builds/513054998
Thanks,
Philipp.
The following changes since commit ff671f65a71f8577fe145b53f1f0c920faa4:
Merge tag 'arc-last-
HI Dalon,
On Thu, 28 Mar 2019 at 10:32, Dalon L Westergreen
wrote:
>
> On Fri, 2019-03-22 at 10:11 +0800, Simon Glass wrote:
> > Hi,
> >
> > On Fri, 22 Mar 2019 at 05:37, Marek Vasut wrote:
> > > On 3/21/19 5:37 PM, Dalon L Westergreen wrote:
> > > > On Thu, 2019-03-21 at 16:48 +0100, Marek Vasu
Am 16.03.19 um 02:24 schrieb rosys...@rosinson.com:
> From: Rosy Song
>
> See details in chapter 8.6.2 and 8.6.4 (page 140-141) of qca9563 datasheet,
>
>NFRAC[17:0]
>
> So the mask of [17:5] is 0x1fff not 0x3fff.
>
> Signed-off-by: Rosy Song
>
> Changes for v2-v3:
>- add more infor
On Thu, Mar 28, 2019 at 10:51:35PM +0100, Heinrich Schuchardt wrote:
> Correct Alex's email address.
>
> Signed-off-by: Heinrich Schuchardt
> Reviewed-by: Alexander Graf
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signature
__
On Thu, Mar 28, 2019 at 02:47:39PM +0100, matthias@kernel.org wrote:
> From: Matthias Brugger
>
> I took over maintainership from Alex Graf with commit
> 3157bbfa18 ("rpi: Make Matthias maintainer")
> But I forgot to update the board maintainer file.
> This patch adds myself to the game.
>
On Fri, Mar 29, 2019 at 10:17:33PM +0800, Kever Yang wrote:
> We'd better use correct way to check if module has enabled.
> for we have 3 timer MACRO:
> - CONFIG_TIMER
> - CONFIG_SPL_TIMER
> - CONFIG_TPL_TIMER
>
> Signed-off-by: Kever Yang
> Reviewed-by: Philipp Tomsich
Applied to u-boot/maste
On Tue, Mar 26, 2019 at 10:12:01AM -0500, Andrew F. Davis wrote:
> The FIT image is loaded to 0x8700_ followed by extracting from that
> several large images also into the 0x8x00_ range. Large images
> can end up overwriting the FIT image as it is being extracted from.
> Move the FIT load
On Tue, Mar 26, 2019 at 06:24:17AM +, BOUGH CHEN wrote:
> After the commit b9a2a0e2e9c0 ("mmc: Add support for downgrading
> HS200/HS400 to HS mode"), it add a parameter in mmc_set_card_speed()
> which indicates that the HS200/HS400 to HS downgrade is happening.
>
> During the HS400 initializ
On Fri, Mar 29, 2019 at 06:00:25AM +0100, Heinrich Schuchardt wrote:
> The following changes since commit 2b9b9cdd5f9ae1cbc786ba3c2255a51b3ea4a636:
>
> Merge branch '2019-03-25-master-imports' (2019-03-26 23:17:21 -0400)
>
> are available in the Git repository at:
>
> https://git.denx.de/u-
On 3/29/19 1:11 PM, Wolfgang Denk wrote:
> Dear Heinrich,
>
> In message <20190329113408.2168-1-xypron.g...@gmx.de> you wrote:
>> Provide online help for hush commands 'if', 'for', and 'while'.
>>
>> Signed-off-by: Heinrich Schuchardt
>
> Why for these, and not for the rest of the shell syntax?
I
Am 22.03.19 um 17:02 schrieb Philippe Reynes:
> The driver add the support of the led IP on bcm6858.
> This led IP can drive up to 32 leds, and can handle
> blinking.
>
> Signed-off-by: Philippe Reynes
> ---
> Changelog:
> v2:
> - use const for array bcm6858_flash_rate (thanks Daniel)
> - use i
Am 22.03.19 um 18:22 schrieb Álvaro Fernández Rojas:
> This patch prevents errors when running tftpput.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> drivers/dma/bcm6348-iudma.c | 6 ++
> 1 file changed, 6 insertions(+)
>
applied to u-boot-mips/next, thanks.
--
- Daniel
___
Am 27.03.19 um 10:16 schrieb Horatiu Vultur:
> The function mscc_miim_reset resets all the phys, but it is called for
> each phy separetely. One consequence of this is that the boot time
> is increased by 2 seconds.
>
> The fix consists for calling the mscc_miim_reset function only once for
> al
On Thu, 2019-03-28 at 03:42 +0100, Marek Vasut wrote:
> On 3/27/19 9:43 PM, Trent Piepho wrote:
> > I didn't see HS400 working on my IMX7d, even thought it appears it
> > should be supported.
> >
> > Alternatively, there is a property that can be added to the device
> > tree, mmc-hs400-1_8v, that
On 29. 03. 19 13:50, Jean-Jacques Hiblot wrote:
>
> On 29/03/2019 11:26, Michal Simek wrote:
>> On 29. 03. 19 11:13, Jean-Jacques Hiblot wrote:
>>> On 28/03/2019 14:54, Michal Simek wrote:
On 25. 03. 19 9:08, Michal Simek wrote:
> On 22. 03. 19 15:39, Jean-Jacques Hiblot wrote:
>> The
On 29. 03. 19 13:23, Luca Ceresoli wrote:
> Hi Michal,
>
> On 27/03/19 16:10, Michal Simek wrote:
>> On 21. 03. 19 16:48, Luca Ceresoli wrote:
>>> A following commit will allow U-Boot to pass a configuration object to
>>> the ZynqMP PMU firmware. This configuration object is generated by
>>> Xilin
On 29. 03. 19 13:22, Luca Ceresoli wrote:
> Hi Michal,
>
> thanks for the feedback.
>
> On 27/03/19 16:03, Michal Simek wrote:
>> On 21. 03. 19 16:48, Luca Ceresoli wrote:
>>> Optionally allow U-Boot to load at the PMU firmware configuration object
>>> into the Power Management Unit (PMU) on Xili
Hi,
On 3/29/19 6:17 PM, Jonas Mark (BT-FIR/ENG1) wrote:
> Gentle ping^2. Ready to apply?
I was kindof hoping on some follow up on concerns raised during v3, see
below.
On 2/8/19 2:21 PM, Tomas Melin wrote:
>> - node_offset = fit_image_get_node(fit_header, location->name);
>> + /* Get t
Hi,
> We store a splash screen in SPI-NOR. We chose to use a FIT image as a
> container because we want to
> - store more than just the splash screen in SPI-NOR,
> - do not create a bunch of MTD partitions,
> - do not waste storage space, and
> - avoid the overhead of a real file system.
On 29.03.19 16:59, eugen.hris...@microchip.com wrote:
And after this patch, there will
also be a new binary u-boot-with-spl.bin, except spl/boot.bin and
spl/u-boot-spl.bin ?
The old binaries are still generated. Only a new combined image is
generated too.
Thus your patch does a bit more th
Hi Sam,
On Fri, Mar 29, 2019 at 05:20:33PM +0200, Sam Protsenko wrote:
> Hi Eugeniu,
[..]
> Just checked in AOSP/master, seems like the feature is there, it's
> called "dump".
>
> $ mkdtimg dump dtbo.img --dtb filename
>
> For details see:
>
> $ mkdtimg help dump
>
> mkdtimg dump
On 29.03.2019 17:53, Stefan Roese wrote:
> External E-Mail
>
>
> On 29.03.19 11:04, eugen.hris...@microchip.com wrote:
>>
>>
>> On 26.03.2019 14:16, Stefan Roese wrote:
>>
>>>
>>> This patch adds the CONFIG_SPL_IMAGE option to select the SPL image that
>>> shall be used to generate the combined
On 29.03.19 11:04, eugen.hris...@microchip.com wrote:
On 26.03.2019 14:16, Stefan Roese wrote:
This patch adds the CONFIG_SPL_IMAGE option to select the SPL image that
shall be used to generate the combined SPL + U-Boot image. The default
value is the current value "spl/u-boot-spl.bin". >
Th
On 29.03.19 11:21, Heiko Schocher wrote:
Hello Stefan,
Am 26.03.2019 um 13:16 schrieb Stefan Roese:
This patch adds an alterative SPL version of atmel_serial_enable_clk().
This enables the usage of this driver without full clock support (in
drivers and DT nodes). This saves some space in the SP
On 29.03.19 15:09, Kever Yang wrote:
Rockchip fit image with atf may have firmware for sram,
so the fit driver need to read data from mmc to sram,
but Rockchip mmc controller does not support this data
path, we have to read into ddr first and then copy it
to sram.
Signed-off-by: Kever Yang
--
On 29.03.19 10:54, eugen.hris...@microchip.com wrote:
On 26.03.2019 14:16, Stefan Roese wrote:
This patch adds an alterative SPL version of atmel_serial_enable_clk().
This enables the usage of this driver without full clock support (in
drivers and DT nodes). This saves some space in the SPL i
On 29.03.19 15:59, eugen.hris...@microchip.com wrote:
On 29.03.2019 16:52, Stefan Roese wrote:
Hi Eugen,
On 29.03.19 15:40, eugen.hris...@microchip.com wrote:
I've noticed that the first ethernet packet after PHY link establishment
is not tranferred correctly most of the time on my AT91SAM9
Hi Eugeniu,
On Mon, Mar 18, 2019 at 9:42 PM Eugeniu Rosca wrote:
>
> On Thu, Mar 14, 2019 at 04:19:31PM +0100, Eugeniu Rosca wrote:
> [..]
> >
> > Both 'mkdtimg' tool and the 'mkdtboimg.py' script seem to lack the
> > capability of extracting the original dtb/dtbo blobs from the
> > dtb{o}.img fi
Hi Faiz,
On Fri, Mar 29, 2019 at 3:24 PM Lokesh Vutla wrote:
>
> + Praneeth
>
> On 29/03/19 4:45 PM, Tom Rini wrote:
> > On Fri, Mar 29, 2019 at 01:09:25PM +0530, Faiz Abbas wrote:
> >> Tom,
> >>
> >> On 28/03/19 6:33 PM, Tom Rini wrote:
> >>> On Thu, Mar 28, 2019 at 02:21:03PM +0530, Faiz Abbas
On 29.03.2019 16:52, Stefan Roese wrote:
> Hi Eugen,
>
> On 29.03.19 15:40, eugen.hris...@microchip.com wrote:
>>> I've noticed that the first ethernet packet after PHY link establishment
>>> is not tranferred correctly most of the time on my AT91SAM9G25 board.
>>> Here I usually see a timeout
On 03/29/2019 09:02 AM, Kever Yang wrote:
>
> Here are the solutions from previous discussion:
> - dts (by Simon)
> extra dtb code needed, setting separate into individual board dts;
> not available and not suggestion to use in TPL/SPL;
> - move to header in 'asm/arch-rockchip' (by Philip
The CONFIG_ROCKCHIP_SPL_RESERVE_IRAM is for SPL only, add
condition to limit it not affect TPL.
Signed-off-by: Kever Yang
---
arch/arm/include/asm/arch-rockchip/boot0.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h
b/arch/arm/i
Signed-off-by: Kever Yang
---
include/configs/evb_px5.h | 1 +
include/configs/rk3368_common.h | 3 ++-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/configs/evb_px5.h b/include/configs/evb_px5.h
index e67bee1721..e9304206bb 100644
--- a/include/configs/evb_px5.h
++
Hi Eugen,
On 29.03.19 15:40, eugen.hris...@microchip.com wrote:
I've noticed that the first ethernet packet after PHY link establishment
is not tranferred correctly most of the time on my AT91SAM9G25 board.
Here I usually see a timeout of a few seconds, which is quite
annoying.
Adding a small d
The iomux should have been set in board_debug_uart_init(),
do not set in board_init_f(), remove it.
Signed-off-by: Kever Yang
---
arch/arm/mach-rockchip/rk3368-board-spl.c | 13 -
1 file changed, 13 deletions(-)
diff --git a/arch/arm/mach-rockchip/rk3368-board-spl.c
b/arch/arm/mac
Hi Marek
> From: Marek Vasut
> Sent: vendredi 22 mars 2019 11:51
>
> On 3/22/19 11:18 AM, Patrick DELAUNAY wrote:
> >> From: U-Boot On Behalf Of Marek Vasut
> >> Sent: lundi 18 mars 2019 19:47
> >>
> >> On 3/18/19 5:59 PM, Patrice CHOTARD wrote:
> >>> Hi Marek
> >>>
>
> This shou
Signed-off-by: Kever Yang
---
configs/evb-px5_defconfig | 56 +--
1 file changed, 54 insertions(+), 2 deletions(-)
diff --git a/configs/evb-px5_defconfig b/configs/evb-px5_defconfig
index 1d428e7ac8..f99943de08 100644
--- a/configs/evb-px5_defconfig
+++ b/con
This patch set enable spl/tpl and also suppot ATF elf,
and the timer is using rockchip timer, we may switch to stimer
based ARM generic timer later if we get STIMER patches mergerd.
Kever Yang (8):
rockchip: rk3368: support UART2/4 in board_debug_uart_init()
rockchip: px5 update dts for spl
evb-rk3368 is using UART2 and PX5 evb is using UART4
Signed-off-by: Kever Yang
---
arch/arm/mach-rockchip/rk3368/rk3368.c | 40 ++
1 file changed, 40 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3368/rk3368.c
b/arch/arm/mach-rockchip/rk3368/rk3368.c
index 1ed06c
TPL need dmc to init ddr sdram, and emmc, boot-order.
Signed-off-by: Kever Yang
---
arch/arm/dts/rk3368-px5-evb-u-boot.dtsi | 29 +
1 file changed, 29 insertions(+)
diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
index 749
From: Patrice Chotard
All TX fifo size can be different, add tx_fifo_sz_array[]
into dwc2_plat_otg_data to be able to set them.
tx_fifo_sz_array[] is 17 Bytes long and can contains max 16
tx fifo size (synopsys IP supports max 16 IN endpoints).
First entry of tx_fifo_sz_array[] is the number of
evb-px5 has only 1 CS, update for it.
Signed-off-by: Kever Yang
---
drivers/ram/rockchip/dmc-rk3368.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/ram/rockchip/dmc-rk3368.c
b/drivers/ram/rockchip/dmc-rk3368.c
index 92f584fadc..e52fc3baad 100644
--- a/drivers/ram/rockchip/dmc
Some DWC2 ip variant doesn't use 16 hardware endpoint as hardcoded
in the driver. Bits INEps [29:26] of HWCFG4 register allows to get
this information.
Signed-off-by: Patrice Chotard
Signed-off-by: Patrick Delaunay
---
drivers/usb/gadget/dwc2_udc_otg.c | 11 ---
drivers/usb/gadget
Let's use rockchip timer before stimer patches can be merged.
Signed-off-by: Kever Yang
---
arch/arm/dts/rk3368-px5-evb-u-boot.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
b/arch/arm/dts/rk3368-px5-evb-u-boot.dtsi
index 18b841864c..f54
Remove the HOST support for STM32MP1 USBO device = OTG DWC2.
The current DWC2 driver have no dynamic detection of device,
So it is dangerous to have start 3V3 when PC is
connected to the micro USB connector.
=> it is preferable to have only DEVICE support
CONFIG_USB_GADGET_DWC2_OTG for OTG port
Handle "force-b-session-valid" property from DT.
Signed-off-by: Patrick Delaunay
---
drivers/usb/gadget/dwc2_udc_otg.c | 9 +
drivers/usb/gadget/dwc2_udc_otg_regs.h | 8 ++--
include/usb/dwc2_udc.h | 1 +
3 files changed, 16 insertions(+), 2 deletions(-)
diff -
Use the DWC2 device driver with DM_USB_GADGET support and
cleanup the USB support in STM32MP1 board.
Signed-off-by: Patrick Delaunay
---
arch/arm/dts/stm32mp157a-dk1-u-boot.dtsi | 3 +-
arch/arm/dts/stm32mp157a-dk1.dts | 16 ++-
arch/arm/dts/stm32mp157c-ev1-u-boot.dtsi | 1 +
arch/
Minimal conversion to driver model by using the uclass
UCLASS_USB_GADGET_GENERIC based on:
- reset uclass
- clock uclass
- generic uclass.
Signed-off-by: Patrick Delaunay
---
doc/device-tree-bindings/usb/dwc2.txt | 54 +++
drivers/usb/gadget/dwc2_udc_otg.c | 292 +++
Add compatible "st,stm32mp1-hsotg" and associated driver data to manage
the usb33d-supply and the ST specific register for VBus sensing.
Signed-off-by: Patrick Delaunay
# Conflicts:
# drivers/usb/gadget/dwc2_udc_otg.c
---
doc/device-tree-bindings/usb/dwc2.txt | 2 ++
drivers/usb/gadget
Reset the hardware to be sure of the device state.
Signed-off-by: Patrick Delaunay
---
drivers/usb/gadget/dwc2_udc_otg.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c
b/drivers/usb/gadget/dwc2_udc_otg.c
index af16fc1..8169fdb 100644
The DK1 and DK2 boards use the USB Type-C controller STUSB1600.
This patch updates:
- the device tree to add the I2C node in the DT
- the board stm32mp1 to probe this I2C device and use this controller
to check cable detection.
- the DWC2 driver to support a new dt property
"u-boot,force-b-sess
Add a new function to check the session B validity, to be use to check
cable connection.
Signed-off-by: Patrick Delaunay
---
drivers/usb/gadget/dwc2_udc_otg.c | 9 +
include/usb/dwc2_udc.h| 2 ++
2 files changed, 11 insertions(+)
diff --git a/drivers/usb/gadget/dwc2_udc_otg
Remove the global regs_otg variable.
Signed-off-by: Patrick Delaunay
---
drivers/usb/gadget/dwc2_udc_otg.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/drivers/usb/gadget/dwc2_udc_otg.c
b/drivers/usb/gadget/dwc2_udc_otg.c
index 3c7ad03..edca05d 100644
--- a/drivers/usb/gadget/dwc2_udc
vdda1v1 and vdda1v8 are used by the PLL.
Both need to be enabled before starting the PLL.
Signed-off-by: Patrick Delaunay
---
drivers/phy/phy-stm32-usbphyc.c | 60 +
1 file changed, 31 insertions(+), 29 deletions(-)
diff --git a/drivers/phy/phy-stm32-usb
Move supply vdda1v1 and vdda1v8 in usbphyc node and
no more in port
Signed-off-by: Patrick Delaunay
---
arch/arm/dts/stm32mp157c-ed1.dts | 8
arch/arm/dts/stm32mp157c.dtsi | 3 ++
doc/device-tree-bindings/phy/phy-stm32-usbphyc.txt | 4 +-
drivers/p
This patch-set created after Marek remarks on patch
board: stm32mp1: Add tx_fifo_sz_array support
http://patchwork.ozlabs.org/patch/1056452/
This serie convert the DWC2 to driver model and use it for the
stm32mp1 boards.
USB device and cable connection tested on EV1 and DK2.
This serie supe
wait 200us to solve USB init issue on device mode
(ums and stm32prog commands)
Signed-off-by: Patrick Delaunay
---
drivers/phy/phy-stm32-usbphyc.c | 10 --
1 file changed, 4 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c
ind
Parameter added for port 1, for example:
&usbh_ehci {
phys = <&usbphyc_port0>;
phy-names = "usb";
vbus-supply = <&vbus_sw>;
status = "okay";
};
&usbotg_hs {
pinctrl-names = "default";
pinctrl-0 = <&usbotg_hs_pins_a>;
phys = <&usbphyc_port1 0
Remove unused field index in struct stm32_usbphyc_phy.
Signed-off-by: Patrick Delaunay
---
drivers/phy/phy-stm32-usbphyc.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/phy/phy-stm32-usbphyc.c b/drivers/phy/phy-stm32-usbphyc.c
index 8e98b4b..fc53df2 100644
--- a/drivers/phy/phy-s
On 27.03.2019 12:20, Stefan Roese wrote:
> I've noticed that the first ethernet packet after PHY link establishment
> is not tranferred correctly most of the time on my AT91SAM9G25 board.
> Here I usually see a timeout of a few seconds, which is quite
> annoying.
>
> Adding a small delay (10ms
David,
I am applying this one as a last-minute fix for 2019.4.
However, I’ll still need the v2 for the next cycle, as I my review comments
still apply.
Thanks,
Philipp.
> On 12.02.2019, at 12:55, Philipp Tomsich
> wrote:
>
>
>
>> On 12.02.2019, at 12:51, David Wu wrote:
>>
>> There are n
On Thu, Mar 28, 2019 at 10:12:31AM +, eugen.hris...@microchip.com wrote:
> From: Eugen Hristev
>
> Fix missing at91 boards and split the at91 in two categories:
> at91 arm v7
> at91 arm926esj
> which are the two main cores for the at91 architecture.
>
> Signed-off-by: Eugen Hristev
> ---
>
> On 29.03.2019, at 15:17, Kever Yang wrote:
>
> We'd better use correct way to check if module has enabled.
> for we have 3 timer MACRO:
> - CONFIG_TIMER
> - CONFIG_SPL_TIMER
> - CONFIG_TPL_TIMER
>
> Signed-off-by: Kever Yang
Reviewed-by: Philipp Tomsich
__
We'd better use correct way to check if module has enabled.
for we have 3 timer MACRO:
- CONFIG_TIMER
- CONFIG_SPL_TIMER
- CONFIG_TPL_TIMER
Signed-off-by: Kever Yang
---
lib/time.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/lib/time.c b/lib/time.c
index 3bf678a232..9c55
Rockchip fit image with atf may have firmware for sram,
so the fit driver need to read data from mmc to sram,
but Rockchip mmc controller does not support this data
path, we have to read into ddr first and then copy it
to sram.
Signed-off-by: Kever Yang
---
common/spl/spl_fit.c | 10 ++
Am Freitag, 22. März 2019, 20:14:36 CET schrieb Urja Rannikko:
> Fixes the microSD slot on the ASUS C201.
>
> Signed-off-by: Urja Rannikko
> ---
> drivers/mmc/dw_mmc.c | 15 +++
> 1 file changed, 15 insertions(+)
>
> diff --git a/drivers/mmc/dw_mmc.c b/drivers/mmc/dw_mmc.c
> index 9
Hi Urja,
Am Freitag, 22. März 2019, 20:14:32 CET schrieb Urja Rannikko:
> Just saying: I'm not familiar with this stuff so i might've misunderstood
> something in my commit messages, but anyways i managed to make it boot.
>
> There's more stuff than just these, but i decided I'd keep it short...
> On 29.03.2019, at 13:16, Kever Yang wrote:
>
> Philipp,
>
> On 03/29/2019 07:25 PM, Philipp Tomsich wrote:
>> Kever,
>>
>>> On 29.03.2019, at 12:21, Kever Yang wrote:
>>>
>>> Rockchip provide tee binary release in 'rkbin' repository:
>>> https://github.com/rockchip-linux/rkbin
>>> For som
+ Praneeth
On 29/03/19 4:45 PM, Tom Rini wrote:
> On Fri, Mar 29, 2019 at 01:09:25PM +0530, Faiz Abbas wrote:
>> Tom,
>>
>> On 28/03/19 6:33 PM, Tom Rini wrote:
>>> On Thu, Mar 28, 2019 at 02:21:03PM +0530, Faiz Abbas wrote:
>>>
With U-boot supporting environment in multiple places, enable on
On 29/03/2019 11:26, Michal Simek wrote:
On 29. 03. 19 11:13, Jean-Jacques Hiblot wrote:
On 28/03/2019 14:54, Michal Simek wrote:
On 25. 03. 19 9:08, Michal Simek wrote:
On 22. 03. 19 15:39, Jean-Jacques Hiblot wrote:
The purpose of this series is to provide the SPL with ability to apply
ove
Hi,
On 28/03/19 2:47 PM, Faiz Abbas wrote:
> The following patches update pbias and IO voltages in TI's dra7 and am57
> devices.
>
> Tested on: dra71x-evm,
One more patch is required for dra71-evm. Will send as part of v2.
dra72x-evm, dra7xx-evm, dra76x-evm, am57xx-evm,
> am571-idk, am572-idk,
Hi Wolfgang,
On 29.03.19 13:06, Wolfgang Denk wrote:
In message <81e69dec-21e7-7b34-a261-e22ae9bef...@denx.de> you wrote:
The big question is, how many places do we have in code, where we access
BSS before relocation ?
Hopefully none.
May we better clear BSS very early (at last may possibl
From: Marcel Ziswiler
Migrate Ethernet FEC to using driver model.
Drop PHY_MICREL_KSZ90X1 which slipped in from Apalis iMX6.
Signed-off-by: Marcel Ziswiler
---
arch/arm/dts/imx6ull-colibri.dts | 31 ---
configs/colibri-imx6ull_defconfig | 3 +--
include/configs/
From: Philippe Schenker
Disable output driver of PAD CCM_PMIC_STBY_REQ. This prevents the
SOC to request for a lower voltage during sleep. This is necessary
because the voltage is changing too slow for the SOC to wake up
properly.
Signed-off-by: Philippe Schenker
Acked-by: Marcel Ziswiler
---
From: Marcel Ziswiler
Add GPIO1_IO03__OSC32K_32K_OUT pin muxing.
While at it also fix indentation of pinfunc header file.
Signed-off-by: Marcel Ziswiler
---
arch/arm/dts/imx6ull-colibri.dts | 2 ++
arch/arm/dts/imx6ull-pinfunc.h | 26 ++
2 files changed, 16 inserti
From: Marcel Ziswiler
Drop disabling SPL_SYS_THUMB_BUILD as we anyway do not use SPL.
Enbale CRC32 verify, USB SDP and EFI loader support.
Drop CMD_GPT and disabling RANDOM_UUID.
Do savedefconfig which drops USB_FUNCTION_SDP.
Signed-off-by: Marcel Ziswiler
---
configs/colibri-imx6ull_defconf
From: Marcel Ziswiler
Migrate pinctrl and regulators to device tree resp. driver model:
Ethernet, NAND and UART.
Drop BOARD_EARLY_INIT_F as it is anyway no longer used.
Enable CMD_DM, CMD_MTD, CMD_REGULATOR and DM_REGULATOR_FIXED.
While at it also update copyright period.
Signed-off-by: Marcel Z
From: Marcel Ziswiler
Remove vendor pre-fix fsl, from uart-has-rtscts property.
Signed-off-by: Marcel Ziswiler
---
arch/arm/dts/imx6ull-colibri.dts | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/arm/dts/imx6ull-colibri.dts b/arch/arm/dts/imx6ull-colibri.dts
i
From: Marcel Ziswiler
Fix compatible node to use regular Toradex notation.
Annotate device tree with standard Colibri pin muxing comments.
Use open-drain I2C pin muxings.
Alphabetically re-order iomuxc nodes.
Rename snvs-ad7879-int-grp touch interrupt node as per Linux device tree.
Signed-off-b
From: Marcel Ziswiler
Just give the new Ethernet PHY power save mode circuitry time to settle.
Signed-off-by: Marcel Ziswiler
Acked-by: Max Krummenacher
---
board/toradex/colibri-imx6ull/colibri-imx6ull.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/board/toradex/colibri-imx6ull/c
From: Marcel Ziswiler
Migrate USB to using driver model.
Add USBH_PEN GPIO regulator.
While at it also add alias e.g. as required for UMS.
Signed-off-by: Marcel Ziswiler
---
arch/arm/dts/imx6ull-colibri.dts | 24 ++
.../toradex/colibri-imx6ull/colibri-imx6ull.c | 48
From: Marcel Ziswiler
Migrate MMC to using driver model.
Migrate USDHC to using pinctrl.
While at it also add GPIO1_IO03__OSC32K_32K_OUT pin muxing.
While at it also update copyright period.
Signed-off-by: Marcel Ziswiler
---
arch/arm/dts/imx6ull-colibri.dts | 15 +++-
.../torad
From: Stefan Agner
Currently $loadaddr and $fdt_addr_r point to the same address. This
might be not ideal for some distro boot scripts which make use of
$loadaddr after loading the device tree.
Make sure the two variables point to two different addresses. Moving
$loadaddr is not entirly trivial
This series addresses some shortcomings, enables/introduces device tree
support and converts all except video to using the driver model. This is
fully tested both running our latest downstream BSP as well as the
mainline Linux kernel.
This series is available together with my previous series addr
From: Stefan Agner
Using CPU temperature grading as a discriminator if the Wi-Fi /
Bluetooth chip is populated is no longer possible due to upcoming
SKUs. Set variant to -wifi only if a valid config block is present
and the product id mentions a SKU with Wi-Fi / Bluetooth.
Signed-off-by: Stefan
From: Stefan Agner
Use CONFIG_TARGET_... at compile time to differentiate between
Apalis iMX6, Colibri iMX6 and Colibri iMX6ULL. Avoid code
duplication by moving question about Wi-Fi / Bluetooth before
IT/non-IT decision.
Signed-off-by: Stefan Agner
Acked-by: Marcel Ziswiler
---
board/torad
From: Gerard Salvatella
Add support for new Colibri iMX6ULL SKUs.
While at it also checkpatch fix the whole files.
Signed-off-by: Gerard Salvatella
Acked-by: Marcel Ziswiler
---
board/toradex/common/tdx-cfg-block.c | 62 +---
board/toradex/common/tdx-cfg-block.h |
Hi Michal,
On 27/03/19 16:10, Michal Simek wrote:
> On 21. 03. 19 16:48, Luca Ceresoli wrote:
>> A following commit will allow U-Boot to pass a configuration object to
>> the ZynqMP PMU firmware. This configuration object is generated by
>> Xilinx tools in the form of a C file (pm_cfg_obj.c), whic
Hi Michal,
thanks for the feedback.
On 27/03/19 16:03, Michal Simek wrote:
> On 21. 03. 19 16:48, Luca Ceresoli wrote:
>> Optionally allow U-Boot to load at the PMU firmware configuration object
>> into the Power Management Unit (PMU) on Xilinx ZynqMP.
>>
>> The configuration object is required b
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