On 5/12/22 04:29, AKASHI Takahiro wrote:
Booting from a short-form device path which starts with the first element
being a File Path Media Device Path failed because it doesn't contain
any valid device with simple file system protocol and efi_dp_find_obj()
in efi_load_image_from_path() will retur
Hi All
This v4 is lying on mailing list since one month and waiting for being
reviewed/merged.
I am not sure this series is delegated to the correct people (Jagan Teki).
As this series is fixing spi-flash performance issue on some platform (STM32MP1
at least)
it would be great if this patchset
Hi Heiko,
On 11/05/22 13:54, Heiko Schocher wrote:
Hello Achath,
On 11.05.22 08:03, Vaishnav Achath wrote:
Currently the SPI flash to load from is defined through the compile
time config CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS, this
prevents the loading of binaries from different SPI fl
On 5/12/22 04:29, AKASHI Takahiro wrote:
This helper function will be used to determine if the device is
removable media, initially for handling a short-path loading.
Signed-off-by: AKASHI Takahiro
---
include/efi_loader.h | 3 +++
lib/efi_loader/efi_disk.c | 27 +++
Without this register unlock it is not possible to configure the
pinmux used for mcu spi0.
Fixes: 92e46092f2 ("arch: arm: mach-k3: am642_init: Probe ESM nodes")
Signed-off-by: Christian Gmeiner
---
arch/arm/mach-k3/am642_init.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm/mach
Hello Eddie,
On 11.05.22 22:52, Eddie James wrote:
> SCL direct drive mode prevents communication with devices that
> do clock stretching, so disable. The Linux driver doesn't use
> this mode, and the engine can handle clock stretching.
My first thought was why not make this option configurable,
A short-form path starting with a file device path will be tested in
a new test case.
This type of short-form path will be created with "efidebug boot add -b",
in particular, when a file system has no partition table.
Signed-off-by: AKASHI Takahiro
---
test/py/tests/test_efi_bootmgr/conftest.py
Booting from a short-form device path which starts with the first element
being a File Path Media Device Path failed because it doesn't contain
any valid device with simple file system protocol and efi_dp_find_obj()
in efi_load_image_from_path() will return NULL.
For instance,
/VenHw(e61d73b9-a384-
This helper function will be used to determine if the device is
removable media, initially for handling a short-path loading.
Signed-off-by: AKASHI Takahiro
---
include/efi_loader.h | 3 +++
lib/efi_loader/efi_disk.c | 27 +++
2 files changed, 30 insertions(+)
diff
This is a reworked version of v1[1].
If a (root) file system does not have any partition table, the generated
boot option (BOOT) by the command,
=> efidebug boot add -b ...
does not work because a device path in the option is in a short-form and
does not contain any valid media device path
Add a DSA driver for the MV88E61xx compatible GbE Ethernet switches.
Cc: Marek Behún
Cc: Vladimir Oltean
Signed-off-by: Tim Harvey
---
v2:
- rebase on v2022.07-rc1 (use ofnode_get_phy_node)
- remove unused commented out fields from struct
- remove unused PORT_MASK macro
- remove phy from pr
Add MV88E61XX DSA support:
- update dt: U-Boot dsa driver requires different device-tree syntax
than the linux driver in order to link the dsa ports to the mdio bus.
- update defconfig
- replace mv88e61xx_hw_reset weak override with board_phy_config support
for mv88e61xx configuration that
Add support for DM_MDIO by registering a UCLASS_MDIO driver and
attempting to use it. This is necessary if wanting to use a DSA
driver for example hanging off of the FEC MAC.
Care is taken to fallback to non DM_MDIO mii bus as several boards define
DM_MDIO without having the proper device-tree con
Add a function to sanity check a dsa driver having proper ops.
Suggested-by: Vladimir Oltean
Signed-off-by: Tim Harvey
---
v2: new patch
---
net/dsa-uclass.c | 17 +
1 file changed, 17 insertions(+)
diff --git a/net/dsa-uclass.c b/net/dsa-uclass.c
index 07edc584daf3..b3033c97aa
Allow rcv() and xmit() dsa driver ops to be optional in case a driver
does not care to mangle a packet as in U-Boot only one network port is
enabled at a time and thus no packet mangling is necessary.
Suggested-by: Vladimir Oltean
Signed-off-by: Tim Harvey
---
v2: new patch
---
net/dsa-uclass.c
This series adds a DSA driver for the MV88E61xx based on
drivers/net/phy/mv88e61xx and uses in on the gwventana_gw5904_defconfig.
The hope is that the other three boards that use the MV88E61xx driver
can move to this as well eventually so that we can remove the non-dm
driver and the 4 Kconfig opti
Remove the unnecessary xmit and recv functions.
Signed-off-by: Tim Harvey
---
v2: new patch
---
drivers/net/ksz9477.c | 23 ---
1 file changed, 23 deletions(-)
diff --git a/drivers/net/ksz9477.c b/drivers/net/ksz9477.c
index ed8f1895cb12..fb5c76c600be 100644
--- a/drivers/ne
In order to ensure that a DSA driver probe gets called before
dsa_ops->port_probe move the port_probe of the cpu_port to
a post-probe function.
Signed-off-by: Tim Harvey
Reviewed-by: Ramon Fried
---
v2:
- added Ramon's rb tag
---
net/dsa-uclass.c | 14 +++---
1 file changed, 11 inserti
If a DM_MDIO driver is used we need to scan the subnodes as well.
Signed-off-by: Tim Harvey
Signed-off-by: Vladimir Oltean
Reviewed-by: Ramon Fried
---
v2:
- added Ramon's rb tag
---
net/mdio-uclass.c | 4
1 file changed, 4 insertions(+)
diff --git a/net/mdio-uclass.c b/net/mdio-uclass.
From: Rogier Stam
When having environment stored in EXT4 or FAT
and using an AHCI or SCSI device / partition
the scan would not be performed early enough
and hence the device would not be recognized.
This change adds the scan when the interface
is "scsi" in a similar way to mmc_initialize.
Signe
Hi
This updated version of the patch fixes a problem noticed
by Stefan Roese where the CI build fails for the
dra7xx_hs_evm_usb_defconfig target if this patch is included
Let me know if any other changes are needed.
Thanks and regards
Rogier
Hi Tim,
On Wed, 11 May 2022 13:39:59 -0700
Tim Harvey thar...@gateworks.com wrote:
...
> > Reviewed-by: Oleh Kravchenko
>
> Thanks Oleh. Do you know someone that does have a o4-imx6ull-nano
> board to test with?
>
> Marcel, Fabio, Anatolij and Oliver, can you review and test your
> boards wi
The Avenger96 board comes in multiple regulator configurations.
- rev.100 or rev.200 have Buck3 preconfigured to 3V3 operation on
boot and contains extra Enpirion EP53A8LQI DCDC converter which
supplies the IO. Reduce Buck3 voltage to 2V9 to not waste power.
- rev.200L have Buck3 preconfigu
Hi,
Sorry for the late reply. Not much time lately, also had some trouble
figuring the world build out. That said I have a fix. Not sure on the
usual process, but I will repost it on the mailing list in a moment.
Pali was quite close on the solution. I went a slightly different route
as I did
On Monday 25 April 2022 14:36:14 Pali Rohár wrote:
> On Monday 25 April 2022 05:25:34 Priyanka Jain (OSS) wrote:
> > >-Original Message-
> > >From: U-Boot On Behalf Of Pali Rohár
> > >Sent: Tuesday, April 5, 2022 7:11 PM
> > >To: Priyanka Jain ; Qiang Zhao ;
> > >Shengzhou Liu ; Alexander
Hi Jerome,
On Wed, 11 May 2022 at 16:36, Jerome Forissier
wrote:
> This commit adds support for the OP-TEE 'tee.bin' v1 format for Rockchip
> platforms.
>
> Since OP-TEE 3.8.0, tee.bin contains meta-data in a proprietary format
> in addition to the ELF data. They are essential information for pr
After more patches code for jumping to _start_cont symbol in flash memory
involved to code with useless mathematical operations. Currently it does:
r3 := CONFIG_SYS_MONITOR_BASE + ABS(_start_cont) - CONFIG_SYS_MONITOR_BASE
jump to r3
Which is equivalent of just:
r3 := ABS(_start_cont)
ju
SCL direct drive mode prevents communication with devices that
do clock stretching, so disable. The Linux driver doesn't use
this mode, and the engine can handle clock stretching.
Signed-off-by: Eddie James
---
drivers/i2c/ast_i2c.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
On Sat, May 7, 2022 at 12:41 PM Oleh Kravchenko wrote:
>
> Hello Tim,
> Your patch looks good, and I'm pleased to verify it.
> But I don't have access to the o4-imx6ull-nano board.
>
> 06.05.22 01:12, Tim Harvey пише:
> > A number of IMX8Q boards using FEC configure the address of the ethernet
> >
ecc.mode is set to 0 (aliased to NAND_ECC_NONE) either when function
nand_scan_ident() has not selected ecc.mode or when it selected it to none
ecc mode.
Distinguish between these two states by checking of node property
"nand-ecc-mode" which function nand_scan_ident() uses for filling ecc.mode.
T
On Monday 25 April 2022 14:31:16 Pali Rohár wrote:
> On Monday 25 April 2022 04:27:51 Priyanka Jain (OSS) wrote:
> > >-Original Message-
> > >From: U-Boot On Behalf Of Pali Rohár
> > >Sent: Tuesday, April 5, 2022 6:43 PM
> > >To: Priyanka Jain ; Qiang Zhao ;
> > >Shengzhou Liu ; Alexander
QorIQ U-Boot binary for SD card booting compiled during build process
(either u-boot.bin or u-boot-with-spl.bin) cannot be directly loaded by
QorIQ pre-PBL BootROM. Compiled U-Boot binary first needs to be processed
by Freescale boot_format tool as described in doc/README.mpc85xx-sd-spi-boot
BootR
This allows to concatenate SPL and proper U-Boot without extra alignment.
Signed-off-by: Pali Rohár
---
drivers/mmc/fsl_esdhc_spl.c | 25 ++---
1 file changed, 22 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/fsl_esdhc_spl.c b/drivers/mmc/fsl_esdhc_spl.c
index 760f1
When fixed offset via CONFIG_SYS_MMC_U_BOOT_OFFS is not specified then
expects that U-Boot proper is placed immediately after SPL without any
additional padding.
This allows to generate smaller SPL+U-Boot final binary as it is not
required to specify fixed offset to U-Boot proper at SPL compile ti
On 10/05/2022 23:05, Tom Rini wrote:
> Adding the other binman maintainer..
Thanks. I haven't been able to focus on anything for a while. I'll try
to review the few series that have accumulated, maybe can manage this
week or so if things go well. Just wanted to send an update.
Change 8-byte alignment of SPL binary to just 4-byte alignment as objcopy
trims trailing zero bytes when converting ELF file to RAW binary.
This is same fix for SPL linker script as was done fix for U-Boot linker
script in commit e8c0e0064c8a ("powerpc: mpc85xx: Fix CONFIG_OF_SEPARATE
support").
8-bit mode is not supported by SD cards and on P2020 are four SDHC pins
shared with SPI (so if P2020 board have also SPI then only 4-bit SDHC mode
is provided). So 8-bit SDHC mode is really bad default.
When max bus width is not provided then set mode to 1-bit. This mode is
supported by all cards,
Commit 0980cbba7b3c ("mmc: fsl_esdhc_spl: pre-PBL: implement redundancy
support") changed number of sectors which are read but did not adjusted
error check.
Fix it and check for if correct number of sectors were read.
Fixes: 0980cbba7b3c ("mmc: fsl_esdhc_spl: pre-PBL: implement redundancy
suppor
Currently default fallback SDHC mode is 1-bit. Add new config option
CONFIG_SYS_FSL_ESDHC_DEFAULT_BUS_WIDTH to allow specifying default fallback
mode. This is useful e.g. for SPL builds which loads other parts from SD
card during boot process.
Signed-off-by: Pali Rohár
---
drivers/mmc/Kconfig
On Wed, May 04, 2022 at 03:52:28PM -0500, Andrew Davis wrote:
> TI secure devices chain-of-trust depends on FIT image processing,
> enable it by default on these devices. This also reduces the delta
> between the secure and non-secure defconfig files.
>
> Signed-off-by: Andrew Davis
> Reviewed-b
On Wed, May 04, 2022 at 03:52:27PM -0500, Andrew Davis wrote:
> Non-FIT image loading support should be disabled for TI secure
> devices as the image handlers for those image types do not follow
> our secure boot checks.
>
> Signed-off-by: Andrew Davis
> Reviewed-by: Tom Rini
Applied to u-boot
On Wed, May 04, 2022 at 03:52:26PM -0500, Andrew Davis wrote:
> Booting of non-FIT images bypass our chain-of-trust boot flow,
> these options should not be allowed when high security is set.
>
> Signed-off-by: Andrew Davis
> Reviewed-by: Tom Rini
Applied to u-boot/master, thanks!
--
Tom
s
On Wed, May 04, 2022 at 03:52:25PM -0500, Andrew Davis wrote:
> This matches what this support is called in the non-SPL case. The postfix
> _SUPPORT is redundant as enabling Kconfig options implies support.
> With this we can use CONFIG_IS_ENABLED() as needed.
>
> Signed-off-by: Andrew Davis
> R
On Thu, Apr 28, 2022 at 03:52:59PM -0400, Ralph Siemsen wrote:
> Update the diagnostic message with revised location of document, which
> changed in 3e9fddfc4f1 ("doc: Move devicetree control doc to rST")
>
> Signed-off-by: Ralph Siemsen
Applied to u-boot/master, thanks!
--
Tom
signature.as
On Mon, May 02, 2022 at 06:34:56PM +0300, Ovidiu Panait wrote:
> Drop CONFIG_NEEDS_MANUAL_RELOC ifdefs in board_init_r() and use
> IS_ENABLED() instead. Also, use the MANUAL_RELOC() macro to update the
> initcall pointers.
>
> Signed-off-by: Ovidiu Panait
Applied to u-boot/master, thanks!
--
On Tue, May 03, 2022 at 02:37:39PM +0200, Rasmus Villemoes wrote:
> There is currently no support for PRE_CONSOLE_BUFFER in SPL, but if
> and when that gets implemented, one would almost certainly want to use
> a different address and/or size for the buffer (e.g., U-Boot proper
> might specify an
On Tue, May 03, 2022 at 09:24:57PM +1200, Chris Packham wrote:
> This converts the following to Kconfig:
> CONFIG_MTD_CONCAT
>
> Signed-off-by: Chris Packham
> Reviewed-by: Tom Rini
> Reviewed-by: Stefan Roese
Applied to u-boot/master, thanks!
--
Tom
signature.asc
Description: PGP signa
On 5/10/22 5:51 AM, Amelie Delaunay wrote:
Hi Patrick,
Hi Sean,
On 5/9/22 16:37, Patrick DELAUNAY wrote:
Hi Sean,
On 5/8/22 20:21, Sean Anderson wrote:
On 4/26/22 8:37 AM, Patrick Delaunay wrote:
Add the counter of the PLL user n_pll_cons managed by the 2 functions
stm32_usbphyc_pll_enable /
Hi Patrick,
On 5/10/22 3:51 AM, Patrick Delaunay wrote:
Add a minimal support for STM32MP13 RCC, the reset and clock controller
- update of the RCC MISC driver to bind the correct clock and reset driver
- reset driver, same than STM32MP15x = drivers/reset/stm32-reset.c
- clock driver, add a emp
On 5/10/22 3:51 AM, Patrick Delaunay wrote:
Add a directory in drivers/clk to regroup the clock drivers for all
STM32 Soc with CONFIG_ARCH_STM32 (MCUs with cortex M) or
CONFIG_ARCH_STM32MP (MPUs with cortex A).
Signed-off-by: Patrick Delaunay
---
MAINTAINERS| 2 +
Hi Weijie,
I just commented on the device tree stuff.
On 5/10/22 8:18 AM, Weijie Gao wrote:
This patch adds support for MediaTek MT7621 SoC.
All files are dedicated for u-boot.
The default build target is u-boot-mt7621.bin.
The specification of this chip:
https://www.mediatek.com/products/hom
Hi Weijie,
I found a copy of the MT7260 programming guide, which I am using
as a reference. I assume that they have not diverged too much,
but presumably most discrepencies will be accounted for in the
difference in part numbers.
On 5/10/22 8:18 AM, Weijie Gao wrote:
This patch adds a clock dri
On 5/9/22 1:29 AM, Samuel Holland wrote:
This series fixes an issue with out-of-bounds access to the gate array
(patches 1-2), uses the rearranged array size information to remove a
bunch of duplicate code (patches 3-4), and then simplifies how the reset
driver is bound (patches 5-7).
The origin
This commit adds support for the OP-TEE 'tee.bin' v1 format for Rockchip
platforms.
Since OP-TEE 3.8.0, tee.bin contains meta-data in a proprietary format
in addition to the ELF data. They are essential information for proper
initialization of the TEE core, such as the size of the memory region
co
On Tue, May 10, 2022 at 11:49 PM Michael Nazzareno Trimarchi
wrote:
>
> Hi Tim
>
> Do you have an alternative board to test?
>
Michael,
Yes sorry... I tested the series and had the reply in my draft folder.
I sent it just now in response to the cover letter.
Best regards,
Tim
> Michael
>
> On
On Tue, Apr 26, 2022 at 10:50 PM Michael Trimarchi
wrote:
>
> Those patches come after some testing of failing in factory on some
> unit. We found out that the bootrom imx loader was not able to handling
> badblock. This can be a limit of the implementation right now in imx8mn.
> Anyway not all th
I have an iMX8MP with a ti,dp83867 phy in front of the eqos
interface. The phy is Gbit capable - however, the C and D differential
pairs are not physically routed to the RJ45 connector. So I need to
prevent the phy from advertising 1000Mbps.
The necessary code is almost already there in the form o
Not only does eqos_remove() fail to free the buffers that have been
allocated by eqos_probe_resources_core(), it repeats those allocations
and thus drops twice as much memory on the floor.
Signed-off-by: Rasmus Villemoes
---
drivers/net/dwc_eth_qos.c | 2 +-
1 file changed, 1 insertion(+), 1 del
On 11/05/2022 10.53, Gaurav Jain wrote:
> HW accelerated hash operations are giving incorrect hash output.
> so add flush and invalidate for input/output hash buffers.
>
> Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using
> hardware acceleration.)
AFAICT, it takes somewhat mo
Hi William,
Le 09/05/2022 à 18:28, William Zhang a écrit :
This is the initial support for Broadcom's ARM-based 47622 SOC.
In this change, our first SOC is an armv7 platform called 47622. The
initial support includes a bare-bone implementation and dts with ARM
PL011 uart.
The SOC-specific code
On Wed, May 11, 2022 at 10:55:41AM +0100, Rui Miguel Silva wrote:
> Corstone1000 is a platform from arm, which includes pre
> verified Corstone SSE710 sub-system that combines Cortex-A and
> Cortex-M processors [0].
>
> This code adds the support for the Cortex-A35 implementation
> at host side,
On Wed, May 11, 2022 at 10:55:40AM +0100, Rui Miguel Silva wrote:
> cp.b is used a lot as a way to load binaries to memory and execute
> them, however we may need to integrate this with the efi subsystem to
> set it up as a bootdev.
>
> So, introduce a loadm command that will be consistent with t
On Thu, May 05, 2022 at 03:32:42PM +, Paul Barker wrote:
> * With CONFIG_DM_SPI defined, spi_get_bus_and_cs needs to be used
> instead of spi_setup_slave to configure a SPI bus. As spi_setup_slave is
> already present in the export list it is reasonable to also export
> spi_get_bus_and_cs.
>
On Thu, May 05, 2022 at 03:32:41PM +, Paul Barker wrote:
> The "common.h" header is not covered by the licensing exception for
> standalone applications. Let's drop inclusion of this header from the
> hello_world example to prove that a standalone app can be built without
> it.
>
> Signed-off
On Thu, May 05, 2022 at 03:32:40PM +, Paul Barker wrote:
> On 2010-01-27, an email [1] was sent to the mailing list by Wolfgang
> Denk which clarified the intended licensing exceptions for standalone
> applications. As the "export.h" header and the "stubs.c" source files
> are required to impl
On Mon, May 09, 2022 at 05:15:25AM +, Da Shi Cao wrote:
> Signed-off-by: Dashi Cao
> ---
> board/ti/am335x/board.c | 40
> common/spl/spl.c| 6 ++
> drivers/mmc/mmc.c | 4
> include/mmc.h | 1 +
> 4 files changed, 5
On Tue, 10 May 2022 15:49:10 -0700
Tim Harvey wrote:
> commit ffb0f6f488b9 ("treewide: Rename PHY_INTERFACE_MODE_NONE to
> PHY_INTERFACE_MODE_NA") broke the phy_string_for_interface function.
> Fix it.
>
> Fixes ffb0f6f488b9 ("treewide: Rename PHY_INTERFACE_MODE_NONE to
> PHY_INTERFACE_MODE_NA"
Corstone1000 is a platform from arm, which includes pre
verified Corstone SSE710 sub-system that combines Cortex-A and
Cortex-M processors [0].
This code adds the support for the Cortex-A35 implementation
at host side, it contains also the necessary bits to support
the Corstone 1000 FVP (Fixed Vir
cp.b is used a lot as a way to load binaries to memory and execute
them, however we may need to integrate this with the efi subsystem to
set it up as a bootdev.
So, introduce a loadm command that will be consistent with the other
loadX commands and will call the efi API's.
ex: loadm $kernel_addr
This series add support for arm's corstone1000 platform (see
specific commit changelog for references to documentation),
but first introduce a command (loadm which will integrate with
efi subsystem) used in one of the boot sequence in this
platform.
v1 [0] -> v2:
Tom:
- device tree status (now o
From: Michal Simek
There are couple of IPs which are enabled in origin HW design which are
missing in SOM dt. Add them to match default setup.
Signed-off-by: Michal Simek
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sm-k26-revA.dts | 95 +
1 file changed, 9
BTN_MISC looks like the most reasonable option for this button.
Button is used by firmware to indicate (after reset, power up) that user
wants to do firmware upgrade via firmware update utility.
For bootloader or OS is this just user button which is worth to have it
mapped.
Also button can be used
From: Michal Simek
Origin DT binding just specify driver but wasn't aligned with DT binding
which came later. Extend description for zcu102 and zcu106 to cover latest
binding.
Signed-off-by: Michal Simek
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-zcu102-revA.dts | 21 +++
From: T Karthik Reddy
This reverts commit 50a6bd000f94832658f42fb01b9aaf9e39a52004.
As zynqmp mini emmc does not rely on firmware, remove firmware related
device tree modes from zynqmp mini emmc dts files.
Signed-off-by: T Karthik Reddy
Acked-by: Ashok Reddy Soma
Signed-off-by: Michal Simek
From: Michal Simek
SGMII requires phy to be configured. The support for this has been added to
Linux and U-Boot already that's why also describe the phy via DT. Clock is
coming from si5332 chip (output 1) 125MHz which is only one GT line use on
this board.
Signed-off-by: Michal Simek
Signed-off
From: Michal Simek
PL has own power domain which is not described in DT. That's why add it
there by default.
Signed-off-by: Michal Simek
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/dts/zynqmp.dtsi b/arch/arm/dts/zynqmp
From: Vishal Patel
Add pwm-fan node to control fan through hwmon and change
pwm-cells property to 3 to allow fancontrol utility to
function correctly.
Signed-off-by: Vishal Patel
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sm-k26-revA.dts | 11 +++
1 file changed, 11 insertio
OPP table name now should start with "opp-table" and OPP entries
shouldn't contain commas and @ signs in accordance to the new schema
requirement.
The same change was done in Linux by commit c6d4a8977598 ("ARM: tegra:
Rename CPU and EMC OPP table device-tree nodes"), commit ffbe853a3f5a
("ARM: dts
From: Michal Simek
Using labels helps with better identifications of chips.
Signed-off-by: Michal Simek
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp-sm-k26-revA.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/zynqmp-sm-k26-revA.dts
b/arch/arm/dts/zynqmp-sm-k2
Hi,
I am sending couple of patches to extend DT for zynqmp boards.
Modepin and si5328 dt bindings are available in the Linux kernel.
The rest are small changes with the existing DT binding mostly in Linux.
Thanks,
Michal
Michal Simek (7):
arm64: zynqmp: Add gpio labels for modepin
arm64: zy
From: Piyush Mehta
Add mode-pin GPIO controller DT node in zynqmp.dtsi and also setup default
reset-gpios property for usb which is default Xilinx setup.
Signed-off-by: Piyush Mehta
Signed-off-by: Michal Simek
---
arch/arm/dts/zynqmp.dtsi | 8
1 file changed, 8 insertions(+)
diff -
On Tue, 10 May 2022 19:03:34 -0500
Samuel Holland wrote:
Hi,
> This driver uses simple_strtol(), so it needs SPL_STRTO. Before commit
> 88ca8e26958b6 ("disk: Add an option for partitions in SPL"), SPL_STRTO
> was always selected indirectly. Now it is not, so select it here.
>
> Signed-off-by: S
HW accelerated hash operations are giving incorrect hash output.
so add flush and invalidate for input/output hash buffers.
Fixes: 94e3c8c4fd (crypto/fsl - Add progressive hashing support using hardware
acceleration.)
Signed-off-by: Gaurav Jain
---
drivers/crypto/fsl/fsl_hash.c | 8
1
From: Sai Pavan Boddu
This would prevent configuring non-secure regs in case gic security
extensions are not emulated in Qemu.
Signed-off-by: Sai Pavan Boddu
Signed-off-by: Michal Simek
---
arch/arm/lib/gic_64.S | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/lib/gic_64.S b
implement get f/w version api.
print ele f/w version in spl.
Signed-off-by: Gaurav Jain
Reviewed-by: Peng Fan
Reviewed-by: Pankaj Gupta
---
arch/arm/include/asm/arch-imx8ulp/s400_api.h | 2 +
board/freescale/imx8ulp_evk/spl.c| 19 +
drivers/misc/imx8ulp/s400_api.c
From: Ye Li
If probing caam_jr returns failure, the variable "dev" will not be
initialized, so we can't use dev->name for the error print.
Otherwise it will cause crash.
Signed-off-by: Ye Li
Reviewed-by: Gaurav Jain
---
arch/arm/cpu/armv7/ls102xa/cpu.c| 2 +-
arch/arm/cpu/armv8/fsl-la
Hello Achath,
On 11.05.22 08:03, Vaishnav Achath wrote:
> Currently the SPI flash to load from is defined through the compile
> time config CONFIG_SF_DEFAULT_BUS and CONFIG_SF_DEFAULT_CS, this
> prevents the loading of binaries from different SPI flash using the
> same build.E.g. supporting QSPI f
Hi Patrick
On 5/9/22 17:13, Patrick Delaunay wrote:
> Add support of STM32MP13x the ETZPC part of fdt.c
>
> Signed-off-by: Patrick Delaunay
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/fdt.c | 153 +++-
> 1 file changed, 151 insertions(+),
Hi Patrick
On 5/9/22 17:13, Patrick Delaunay wrote:
> Introduce STM32MP15 function and defines to prepare the
> STM32MP13 introduction.
>
> Signed-off-by: Patrick Delaunay
> Signed-off-by: Patrick Delaunay
> ---
>
> arch/arm/mach-stm32mp/fdt.c | 123
> 1 f
On 5/11/22 03:38, Hiren Mehta wrote:
Hi All,
I was wondering if there is a way to override the gd->env_addr that is
initialized in env_flash_init() for flash based environment.
As I see, env_addr depends on the env_ptr which is set to compile time value of
CONFIG_ENV_ADDR.
I was thinking of do
This patch adds support for the Marvell Octeon watchdog driver, which
currently only support the ARM64 Octeon TX & TX2 platforms. Since the
IP is pretty similar, it makes sense to extend this driver to also
support the MIPS Octeon SoC.
A follow-up patch will enable this watchdog support on the EBB
This patch enables the recently added watchdog support on the MIPS
Octeon EBB7304 eval board.
Signed-off-by: Stefan Roese
Cc: Aaron Williams
Cc: Chandrakala Chavva
Cc: Daniel Schwierzeck
---
configs/octeon_ebb7304_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/octeon_
On 2022/5/11 06:48, Qu Wenruo wrote:
On 2022/5/11 03:43, Heinrich Schuchardt wrote:
After returning if ret <= 0 we know that ret > 0. No need to check it.
Signed-off-by: Heinrich Schuchardt
Reviewed-by: Qu Wenruo
Just to mention for other guys in the btrfs list, this patch is for
U-b
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