On 2023/3/14 08:38, Jonas Karlman wrote:
The boot source node path for emmc is using the old sdhci name.
Replace with correct mmc name and also add same-as-spl to boot order.
Fixes: 0d61f8e5f1c0 ("rockchip: rk3568: add boot device detection")
Signed-off-by: Jonas Karlman
Reviewed
Karlman
Sorry, my mistake, I though the patch series [0] has been apply to
master, but it's in next for now.
We may need another fix after next merge to master next month.
I will apply this frist for this release.
Reviewed-by: Kever Yang
Thanks,
- Kever
[0]
https://patchwork.ozlabs.org
delay for rockchip platform")
Signed-off-by: Vasily Khoruzhick
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mmc/rockchip_sdhci.c | 15 +++
1 file changed, 11 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/rockchip_sdhci.c b/drivers/mmc/rockchip_sdhci.c
index
Hi Vasily,
This patch is cover by patch[1] from Eugen, right?
Thanks,
- Kever
[1]
https://patchwork.ozlabs.org/project/uboot/patch/20230303073134.282462-2-eugen.hris...@collabora.com/
On 2023/3/8 06:08, Vasily Khoruzhick wrote:
PHY driver needs to enable PHY supply, otherwise port
On 2023/3/3 15:31, Eugen Hristev wrote:
Enable USB command, USB drivers, PHY and regulators, for USB host
operations.
Signed-off-by: Eugen Hristev
Reviewed-by: Kever Yang
Thanks,
- Kever
---
configs/rock5b-rk3588_defconfig | 18 +-
1 file changed, 17 insertions(+), 1
check for reg == 0.
Co-developed-by: Frank Wang
Signed-off-by: Frank Wang
Signed-off-by: Eugen Hristev
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 109 +-
1 file changed, 104 insertions(+), 5 deletions(-)
diff --git
On 2023/3/3 15:31, Eugen Hristev wrote:
Add USB 2.0 host nodes and PHYs.
Co-developed-by: William Wu
Signed-off-by: William Wu
Signed-off-by: Eugen Hristev
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3588-rock-5b-u-boot.dtsi | 169
1 file
Hi Vasily,
Please use a new patch instead of a revert, I think I merge the
patch twice by mistake, so there is another one need to remove.
Thanks,
- Kever
On 2023/3/8 06:08, Vasily Khoruzhick wrote:
This reverts commit 5bec4b0de7851a254fb4447b3599a60f95550141.
Signed-off-by: Vasily
On 2023/3/8 06:08, Vasily Khoruzhick wrote:
Device tree contains assigned-clock-rates property for these,
but default value will work just fine
Signed-off-by: Vasily Khoruzhick
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2: implement stubs for CLK_PCIEPHY_REF instead of dropping
On 2023/3/8 06:08, Vasily Khoruzhick wrote:
PHY driver needs to enable PHY supply, otherwise port will
remain unpowered.
Signed-off-by: Vasily Khoruzhick
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2: address check_patch.pl issues
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 64
Hi Vasily,
On 2023/3/8 05:34, Vasily Khoruzhick wrote:
On Tue, Mar 7, 2023 at 1:04 PM Mark Kettenis wrote:
And implement support for the CLK_PCIEPHYn_REF clocks in
drivers/clk/rockchip/clk_rk3568.c:rk3568_pmuclk_set_rate()?
Yes, I'd say so.
If U-Boot doesn't actually need these clocks to
On 2023/3/7 23:32, Johan Jonker wrote:
The Rockchip timer driver has been renamed after the fall back compatible.
There's no need to replace the timer compatible in rk3188-radxarock-u-boot.dtsi
anymore, so remove.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
On 2023/3/7 23:30, Johan Jonker wrote:
In the binding for the Rockchip timer the compatible string
consists of a SoC orientated string and a fall back string
"rockchip,rk3288-timer", so remove all unneeded ones and
fix driver name.
Signed-off-by: Johan Jonker
Reviewed-by:
Hristev
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes in v3:
- change assert(i) to assert (i >= 0) because i==0 is a valid number it's
the first entry in the array. Otherwise it would assert wrongly when setting
gpio 0 A2 e.g.
Changes in v2:
- change the way the reg is computed to al
Sync from Linux v6.2.
Signed-off-by: Kever Yang
---
Changes in v2:
- Use the same dts name as kernel
arch/arm/dts/Makefile| 1 +
arch/arm/dts/rk3588-evb1-v10-u-boot.dtsi | 21
arch/arm/dts/rk3588-evb1-v10.dts | 129 +++
arch/arm/mach-rockchip
Hi Linus,
On 2023/2/23 16:59, Linus Walleij wrote:
On Mon, Feb 13, 2023 at 11:28 PM Chris Morgan wrote:
From: Chris Morgan
Use the new devicetree property of gpio-ranges to determine the GPIO
bank ID. Preserve the "old" way of doing things too, so that boards
can be migrated and tested
Hi Quentin, Vasily,
On 2023/2/28 19:26, Quentin Schulz wrote:
Hi Vasily,
On 2/23/23 22:12, Vasily Khoruzhick wrote:
On Mon, Feb 13, 2023 at 2:30 PM Chris Morgan
wrote:
From: Chris Morgan
Add gpio-ranges property to GPIO nodes so that the bank ID can
be correctly derived for each GPIO
Hi Tom,
On 2023/3/1 22:54, Tom Rini wrote:
On Wed, Mar 01, 2023 at 08:23:50AM +0800, Kever Yang wrote:
Hi Tom,
Please pull the updates for rockchip platform:
- Add support for rk3588 soc;
- Add rk3588 Edgeble Neu6 board and Radxa ROCK5B board;
- Add rk3308 Radxa ROCK Pi S board;
- Add rk3568
Hi Tom,
Please pull the updates for rockchip platform:
- Add support for rk3588 soc;
- Add rk3588 Edgeble Neu6 board and Radxa ROCK5B board;
- Add rk3308 Radxa ROCK Pi S board;
- Add rk3568 Radxa ROCK 3 board,
- Add rk3566 Radxa Compute Module 3 board;
- Add support for sdram reg info version 3
-
Hi Jagan,
On 2023/2/28 17:09, Jagan Teki wrote:
On Tue, 28 Feb 2023 at 14:34, Kever Yang wrote:
rk3588 evb1 v10 is a evalution board from Rockchip, it is a dev board for
rockchip and also a reference board for board vendors.
Hardware:
SoC: RK3588
DRAM: LPDDR4X 8GB
Debug: UART2 via USB
PCIe
-evb.dts is from Linux v6.2 with rename of rk3588-evb1-v10.dts
Signed-off-by: Kever Yang
---
arch/arm/dts/Makefile | 1 +
arch/arm/dts/rk3588-evb-u-boot.dtsi| 17
arch/arm/dts/rk3588-evb.dts| 129 +
arch/arm/mach-rockchip/rk3588
that.
Signed-off-by: Vasily Khoruzhick
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/clk/rockchip/clk_rk3568.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/clk/rockchip/clk_rk3568.c
b/drivers/clk/rockchip/clk_rk3568.c
index c83ae22dc3..253b69504f 100644
On 2023/2/23 06:44, Jonas Karlman wrote:
Read cpuid from otp and set ethaddr for RK3588.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- New patch
arch/arm/dts/rk3588s-u-boot.dtsi | 12
arch/arm/mach-rockchip/Kconfig | 2 ++
2 files
before booting.
Signed-off-by: Eugen Hristev
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Hi,
These memory gaps are required because the kernel crashes with a SError if
accessing that area.
It appears the ATAGs provide DDR banks that do not include those specific
two regions.
To be able to boot
Size: 85mm x 54mm
Kernel commits:
a1d3281450ab ("arm64: dts: rockchip: Add rock-5b board")
6fb13f888f2a ("arm64: dts: rockchip: Update sdhci alias for rock-5b")
Signed-off-by: Eugen Hristev
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes in v2:
- added kernel commi
-by: Kever Yang
Thanks,
- Kever
---
arch/arm/mach-rockchip/Kconfig | 2 +-
arch/arm/mach-rockchip/rk3288/rk3288.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index b678ec41318..3fbfd1b1564 100644
this by using _pathname that is resolved by ObtainContents for blob
entries, ObtainContents also handles allow missing for external blobs.
Mark mkimage entry as missing and return without running mkimage when
missing entries is reported by CheckMissing.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever
with ROCKCHIP_TPL=/path/to/ddr.bin to generate a
bootable u-boot-rockchip.bin image for RK3568.
Signed-off-by: Jonas Karlman
Reviewed-by: Simon Glass
Reviewed-by: Kever Yang
Tested-by: Eugen Hristev
---
v4:
- No change
v3:
- Add help text to Kconfig option
- Add build step for rk3568
match.
Signed-off-by: Johan Jonker
Reviewed-by: Simon Glass
Reviewed-by: Kever Yang
---
Changed V2:
reword
---
Note:
Most drivers still assume that FDT and CPU capabilities are identical.
In order to use these variables a cast is needed.
---
Kconfig | 8
include/fdtd
On 2023/2/16 07:49, Jonas Karlman wrote:
The cpuid on RK3568 is located at 0xa instead of 0x7 as all other SoCs.
Add and use a CFG_CPUID_OFFSET to define this offset.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk356x-u-boot.dtsi | 12
On 2023/2/16 07:49, Jonas Karlman wrote:
Set eth1addr when there is an ethernet1 alias in the fdt.
Also allow fdt fixup of ethernet mac addresses when CMD_NET is disabled.
Set ethaddr and eth1addr based on HASH and SHA256 options.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
On 2023/2/16 07:49, Jonas Karlman wrote:
Add support for rk3036 compatible.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip-efuse.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/misc
On 2023/2/16 07:48, Jonas Karlman wrote:
Add support for rk3128 compatible.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip-efuse.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/misc
On 2023/2/16 07:48, Jonas Karlman wrote:
Add support for rk3328 compatible.
Signed-off-by: Jonas Karlman
---
drivers/misc/rockchip-efuse.c | 45 +++
Reviewed-by: Kever Yang
Thanks,
- Kever
1 file changed, 45 insertions(+)
diff --git a/drivers/misc
On 2023/2/16 07:48, Jonas Karlman wrote:
Add support for rk3066a, rk3188, rk322x and rk3288 compatible.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/Kconfig | 4 ---
drivers/misc/rockchip-efuse.c | 68
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip-efuse.c | 160 ++
1 file changed, 85 insertions(+), 75 deletions(-)
diff --git a/drivers/misc/rockchip-efuse.c b/drivers/misc/rockchip-efuse.c
index 083ee65e0ad7..864c9c15bbe5 100644
--- a/drivers/misc
On 2023/2/16 07:48, Jonas Karlman wrote:
Add a simple debug command to dump the content of the otp.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip-otp.c | 35 +++
1 file changed, 35 insertions(+)
diff
On 2023/2/16 07:48, Jonas Karlman wrote:
Add support for rk3568 compatible.
Handle allocation of an aligned bounce buffer in main read op in order
to keep the SoC unique read op simple.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip
On 2023/2/16 07:48, Jonas Karlman wrote:
Add support for rk3588 compatible.
Adjust offset using driver data in main read op.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip-otp.c | 63 +
1 file changed
read op.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/misc/rockchip-otp.c | 83 +++--
1 file changed, 43 insertions(+), 40 deletions(-)
diff --git a/drivers/misc/rockchip-otp.c b/drivers/misc/rockchip-otp.c
index
Hi John,
I have pick below patch for gpio bank support, which is the same
logic in kernel and other SoCs.
https://patchwork.ozlabs.org/project/uboot/patch/20230213222742.135093-2-macroalph...@gmail.com/
Thanks,
- Kever
On 2023/1/18 02:15, John Keeping wrote:
Upstream device trees now
Hi Chris,
For this patch, I have pick below patch instead:
https://patchwork.ozlabs.org/project/uboot/patch/20230217115845.75303-11-ja...@amarulasolutions.com/
For those change other than pinctrl-rk3568.c, please send a new
patch is still available.
Thanks,
- Kever
On 2023/2/14
Hi Eugen,
The board dts is suppose to sync from kernel, so kernel commit message
will needed.
eg. Sync from kernel v6.2-rc1 or commit number in mainline kernel.
Thanks,
- Kever
On 2023/2/16 21:29, Eugen Hristev wrote:
ROCK 5B is a Rockchip RK3588 based SBC (Single Board Computer) by
.
Page address(PA) bytes are moved to the last 4 positions before
ECC. Update the description for U-boot.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/rockchip_nfc.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
On 2023/2/18 23:27, Johan Jonker wrote:
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so use dev_read_addr_ptr in the rockchip-saradc.c file.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
depending on CONFIG_PHYS_64BIT setting and fix ARRAY_SIZE
divider.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changed V4:
Fix cast and divider in syscon-uclass.c
---
drivers/core/regmap.c | 2 +-
drivers/core/syscon-uclass.c| 4 ++--
drivers
On 2023/1/25 03:31, Jagan Teki wrote:
The board should be RV1126-NEU2 instead RV1126-ECM0.
Fix the wrong name.
Fixes: b8f1ca954013 ("board: rockchip: Add Edgeble Neu2 IO Board")
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
board/edgeble/neural-comput
of the GPIO controller.
Signed-off-by: Peter Geis
Signed-off-by: Chris Morgan
With FUKAUMI Naoki's comment apply:
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/include/asm/arch-rockchip/gpio.h | 38 ++
drivers/gpio/rk_gpio.c| 49 +-
drivers/pinctrl/rockchip
On 2023/2/14 06:27, Chris Morgan wrote:
From: Chris Morgan
Update the MAINTAINERS file to include the devicetree for the
rk3568-evb1-v10 board.
Also update Rockchip board docs to include information on building
RK3568 based devices.
Signed-off-by: Chris Morgan
---
On 2023/2/14 06:27, Chris Morgan wrote:
From: Chris Morgan
Add gpio-ranges property to GPIO nodes so that the bank ID can
be correctly derived for each GPIO bank.
Signed-off-by: Chris Morgan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk356x.dtsi | 5 +
1 file
his update.
Reviewed-by: Kever Yang
Thanks,
- Kever
Regards,
Jonas
+ [BROM_BOOTSOURCE_SPINOR] = "/spi@fe30/flash@0",
+ [BROM_BOOTSOURCE_SD] = "/mmc@fe2b",
+};
+
struct mm_region *mem_map = rk3568_mem_map;
void board_debug_uart_init(void)
("rockchip: add px30 devicetrees")
Signed-off-by: Chris Morgan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/px30.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/dts/px30.dtsi b/arch/arm/dts/px30.dtsi
index bfa3580429..3152bf107d 100644
--- a/arch/arm/dts/px3
Signed-off-by: Chris Morgan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/gpio/rk_gpio.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/drivers/gpio/rk_gpio.c b/drivers/gpio/rk_gpio.c
index 68f30157a9..98a79b5f4d 100644
--- a/drivers/gpio/rk_gpio.c
+++
Morgan
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/mach-rockchip/rk3568/rk3568.c | 24
1 file changed, 24 insertions(+)
diff --git a/arch/arm/mach-rockchip/rk3568/rk3568.c
b/arch/arm/mach-rockchip/rk3568/rk3568.c
index a2d59abc26..4a08820a09 100644
n the tree.
For others:
Reviewed-by: Kever Yang
Thanks,
- Kever
Regards,
Jonas
Signed-off-by: Chris Morgan
---
arch/arm/dts/Makefile | 2 +-
arch/arm/dts/rk3568-evb.dts | 79 --
...-boot.dtsi => rk3568-evb1-v10-u-boot.dtsi} | 0
arch/arm/dt
: serial@feb5
Err: serial@feb5
Model: Edgeble Neu6A IO Board
Net: No ethernet found.
Hit any key to stop autoboot: 0
=>
Add support for Edgeble Neu6 Model A IO Board.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
.../dts/rk3588-edgeble-neu6a-i
On 2023/1/30 22:57, Jagan Teki wrote:
Add u-boot,dm-spl and u-boot,dm-pre-reloc related properties
for Rockchip RK3588 SoC to boot the SPL.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3588-u-boot.dtsi | 7 +
arch/arm/dts/rk3588s-u
-by: Kever Yang
Thanks,
- Kever
---
include/configs/rk3328_common.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/configs/rk3328_common.h b/include/configs/rk3328_common.h
index fadcb93a5f..24b21c024d 100644
--- a/include/configs/rk3328_common.h
+++ b/include/configs
proof for changes increasing the SPL size.
Signed-off-by: Wadim Egorov
Signed-off-by: Samuel Holland
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes in v3:
- New patch for v3
configs/phycore-rk3288_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/phycore
On 2022/10/18 03:02, Christian Kohlschütter wrote:
Provide human-readable manufacturer and product names for the
FriendlyELEC NanoPi R4S.
Enable CONFIG_SYSINFO and CONFIG_SYSINFO_SMBIOS by default.
Signed-off-by: Christian Kohlschütter
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch
Hi Christoph,
The SPL_OPTEE_IMAGE is suppose to use like ATF for armv7:
TPL->SPL->BL31/ATF/OPTEE->U-Boot.
But not for OPTEE use as a BL32 after BL31.
BL31 and U-Boot is package as a itb file, so it's easy to add a
BL32, but you may need to
study how BL31 get entry to BL32
Hi Jagan,
On 2023/2/17 05:44, Jonas Karlman wrote:
+ prate = priv->cpll_hz;
Should be gpll_hz instead of cpll_hz.
Do you have new patchset for this series, I will fix this if there is no
new version for other patches.
Thanks,
- Kever
, 98mA)
Logitech USB Receiver
Co-developed-by: Suniel Mahesh
Signed-off-by: Suniel Mahesh
Signed-off-by: Manoj Sai
Reviewed-by: Kever Yang
Thanks,
- Kever
---
configs/radxa-cm3-io-rk3566_defconfig | 11 +++
1 file changed, 11 insertions(+)
diff --git a/configs/radxa-cm3-io-rk3566_defcon
On 2023/2/17 19:58, Jagan Teki wrote:
From: Manoj Sai
Select the DM_REGULATOR_FIXED on RK3568 platform.
Co-developed-by: Suniel Mahesh
Signed-off-by: Suniel Mahesh
Signed-off-by: Manoj Sai
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/mach-rockchip/Kconfig | 1 +
1 file
On 2023/2/17 19:58, Jagan Teki wrote:
From: Jagan Teki
Add driver supporting pin multiplexing on rk3568 platform.
Co-developed-by: Manoj Sai
Signed-off-by: Manoj Sai
Co-developed-by: Jianqun Xu
Signed-off-by: Jianqun Xu
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks
.00
There is no real requirement for them in U-Boot to handle, hence
mark them as deleted-properties for the probe to success
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk356x-u-boot.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm/dts/rk3
ned-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/phy/rockchip/Kconfig | 7 +
drivers/phy/rockchip/Makefile | 1 +
.../rockchip/phy-rockchip-naneng-combphy.c| 441 ++
3 files changed, 449 insertions(+)
create
Jianing
Signed-off-by: Ren Jianing
Co-developed-by: Jagan Teki
Signed-off-by: Jagan Teki
Signed-off-by: Manoj Sai
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 54 +++
1 file changed, 54 insertions(+)
diff --git a/drivers/phy
that case.
Derived and adjusted the similar change from linux-next with below
commit <9c19c531dc98> ("phy: phy-rockchip-inno-usb2: support
#address_cells = 2")
Co-developed-by: Manoj Sai
Signed-off-by: Manoj Sai
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
CM3")
Add support for Radxa CM3 IO Board.
Co-developed-by: FUKAUMI Naoki
Signed-off-by: FUKAUMI Naoki
Co-developed-by: Manoj Sai
Signed-off-by: Manoj Sai
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/
On 2023/2/17 19:58, Jagan Teki wrote:
Like other rockchip SoCs, DM_RESET is useful across rk3568
platform.
Select it from arch kconfig.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/mach-rockchip/Kconfig | 1 +
configs/evb-rk3568_defconfig | 1 -
2
.
Neu6 needs to mount on top of this IO board in order to create a
complete Edgeble Neural Compute Module 6(Neu6) IO platform.
commit ("arm64: dts: rockchip: rk3588: Add Edgeble Neu6
Model A IO")
Add support for Edgeble Neu6 Model A IO Board.
Signed-off-by: Jagan Teki
Reviewed-by:
Neu6 Model A SoM.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/dts/rk3588-edgeble-neu6a.dtsi | 32 ++
1 file changed, 32 insertions(+)
create mode 100644 arch/arm/dts/rk3588-edgeble-neu6a.dtsi
diff --git a/arch/arm/dts/rk3588-edgeble-ne
(+2KiB)
rk3568: 60KiB (-16KiB)
This makes it possible to use latest vendor TPL on RK3328 without
getting a size limit error running the mkimage command.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v4:
- Only change limit for rk3328 and rk3568
v3:
- Sync
. with less peripherals) of the former.
commit <9fb232e9911f> (" arm64: dts: rockchip: Add base DT for rk3588
SoC")
commit ("arm64: dts: rockchip: Add rk3588 pinctrl data")
Signed-off-by: Jianqun Xu
Signed-off-by: Kever Yang
Signed-off-by: Jagan Teki
Reviewed-by: Ke
Hi Jagan,
On 2023/1/30 22:57, Jagan Teki wrote:
The Rockchip RK3588 is a ARM-based SoC with quad-core Cortex-A76
and quad-core Cortex-A55 including NEON and GPU, 6TOPS NPU,
Mali-G610 MP4, HDMI Out, HDMI In, DP, eDP, MIPI DSI, MIPI CSI2,
LPDDR4/4X/5, eMMC5.1, SD3.0/MMC4.5, USB OTG 3.0, Type-C,
Hi Jagan,
I will leave patch 12, 13, 18 before they got a kernel link, and
pick other rk3588 support in this release.
Thanks,
- Kever
On 2023/1/30 22:57, Jagan Teki wrote:
Neural Compute Module 6(Neu2) is a 96boards SoM-CB compute module
based on Rockchip RK3588 from Edgeble AI.
On 2023/1/30 22:57, Jagan Teki wrote:
Add IOC unit header include for rk3588.
Signed-off-by: Steven Liu
Signed-off-by: Joseph Chen
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
.../include/asm/arch-rockchip/ioc_rk3588.h| 101 ++
1 file
On 2023/1/30 22:57, Jagan Teki wrote:
Add reset ID defines for rk3588.
commit <0a8eb7dae617> ("dt-bindings: reset: add rk3588 reset
definitions")
Signed-off-by: Sebastian Reichel
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
.../dt-binding
On 2023/1/30 22:57, Jagan Teki wrote:
Add power-domain header for RK3588 SoC from description in TRM.
commit <67944950c2d0> ("dt-bindings: power: add power-domain header for
rk3588")
Signed-off-by: Finley Xiao
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
On 2023/1/30 22:57, Jagan Teki wrote:
Add ddr driver for rk3588 to get the ram capacity.
Co-developed-by: Jonas Karlman
Signed-off-by: Jonas Karlman
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/ram/rockchip/Makefile | 1 +
drivers/ram/rockchip
On 2023/1/30 22:57, Jagan Teki wrote:
Add clock driver support for Rockchip RK3588 SoC.
Signed-off-by: Elaine Zhang
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/clk/rockchip/Makefile |1 +
drivers/clk/rockchip/clk_rk3588.c | 1996
On 2023/1/30 22:57, Jagan Teki wrote:
Add RK3588 pll set and get rate clock support.
Signed-off-by: Elaine Zhang
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
arch/arm/include/asm/arch-rockchip/clock.h | 24 ++
drivers/clk/rockchip/clk_pll.c | 267
ings/clock/rockchip,rk3588-cru.h | 766 ++
Reviewed-by: Kever Yang
Thanks,
- Kever
1 file changed, 766 insertions(+)
create mode 100644 include/dt-bindings/clock/rockchip,rk3588-cru.h
diff --git a/include/dt-bindings/clock/rockchip,rk3588-cru.h
b/include/dt-bindings/cloc
On 2023/1/30 22:57, Jagan Teki wrote:
Add GRF header for Rockchip RK3588.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
.../include/asm/arch-rockchip/grf_rk3588.h| 35 +++
1 file changed, 35 insertions(+)
create mode 100644 arch/arm
On 2023/1/30 22:57, Jagan Teki wrote:
Add clock and reset unit header include for rk3588.
Signed-off-by: Elaine Zhang
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
.../include/asm/arch-rockchip/cru_rk3588.h| 451 ++
1 file changed, 451
On 2023/1/30 22:57, Jagan Teki wrote:
Add support for rk3588 package header in mkimage tool.
Signed-off-by: Jagan Teki
Reviewed-by: Kever Yang
Thanks,
- Kever
---
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index 1f1eaa1675
ajjar
Reviewed-by: Kever Yang
Thanks,
- Kever
---
Changes in v2:
- Add MAINTAINER for the board
---
arch/arm/dts/rk3308-rock-pi-s-u-boot.dtsi | 17 ++
arch/arm/dts/rk3308-rock-pi-s.dts | 228 ++
board/rockchip/evb_rk3308/MAINTAINERS | 7 +
c
, MIPI DSI/CSI
- USB 3.0 Host/OTG, USB 2.0 Host
- 40-pin GPIO expansion ports
- USB Type C PD 2.0, 9V/2A, 12V/2A, 15V/2A, 20V/2A
Refer Linux commit <22a442e6586c>
("arm64: dts: rockchip: add basic dts for the radxa rock3 model a")
Signed-off-by: Akash Gajjar
Reviewed-by: Kev
Hi Jonas,
On 2023/2/14 18:33, Jonas Karlman wrote:
Sync init size limit from vendor u-boot and the SRAM size specified in a
SoCs TRM. Size is typically defined using the following expression:
-
Although most of SoC follow this rule, but not for all.
So please just do the sync from vendor
On 2023/2/14 18:33, Jonas Karlman wrote:
An external TPL binary is now expected to be provided using ROCKCHIP_TPL
when building RK3568 targets.
This reverts commit 31500e7bcfaca08ab7c2879f502a6cf852410244.
Signed-off-by: Jonas Karlman
Reviewed-by: Simon Glass
Reviewed-by: Kever Yang
image for RK3568.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- rename external-tpl-path to rockchip-tpl-path
- rename EXTERNAL_TPL to ROCKCHIP_TPL
- add CONFIG_ROCKCHIP_EXTERNAL_TPL option
Makefile | 1 +
arch/arm/dts/rockchip-u
On 2023/2/14 18:33, Jonas Karlman wrote:
The rockchip-tpl entry can be used when an external TPL binary should be
used instead of the normal U-Boot TPL.
Signed-off-by: Jonas Karlman
Reviewed-by: Kever Yang
Thanks,
- Kever
---
v2:
- rename external-tpl to rockchip-tpl
- missing message
On 2023/2/7 22:54, Johan Jonker wrote:
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so convert dev_read_addr output to phys_addr_t in the
rockchip_nfc.c file.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
On 2023/2/7 22:56, Johan Jonker wrote:
Sandisk SDTNQGAMA is a 8GB size, 3.3V 8 bit chip with 16KB page size, 1KB write
size and 40 bit ecc support
Signed-off-by: Paweł Jarosz
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/nand_ids.c | 3
On 2023/2/7 22:55, Johan Jonker wrote:
Add flash_node to the rockchip_nfc driver chip stucture in order
to find the partitions in the add_mtd_partitions_of() functions.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/rockchip_nfc.c | 1 +
1
functions.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/rockchip_nfc.c | 61 ++---
1 file changed, 20 insertions(+), 41 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c
b/drivers/mtd/nand/raw/rockchip_nfc.c
driver.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
Thanks,
- Kever
---
drivers/mtd/nand/raw/rockchip_nfc.c | 4
1 file changed, 4 deletions(-)
diff --git a/drivers/mtd/nand/raw/rockchip_nfc.c
b/drivers/mtd/nand/raw/rockchip_nfc.c
index 78e2a691..3809702e 100644
--- a/
On 2023/2/7 22:53, Johan Jonker wrote:
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expect 64-bit data from the device tree parser,
so convert dev_read_addr output to phys_addr_t in the
dw-apb-timer.c file.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
On 2023/2/7 22:53, Johan Jonker wrote:
The fdt_addr_t and phys_addr_t size have been decoupled.
A 32bit CPU can expext 64-bit data from the device tree parser,
so convert dev_read_addr output to phys_addr_t in the
rockchip-saradc.c file.
Signed-off-by: Johan Jonker
Reviewed-by: Kever Yang
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