On Tue, 18 Feb 2020 20:02:54 +0100
Giulio Benetti wrote:
> Add i.MXRT1020 pins definition.
Are those definitions ported from Linux kernel?
>
> Signed-off-by: Giulio Benetti
> ---
> include/dt-bindings/pinctrl/pins-imxrt1020.h | 763
> +++ 1 file changed, 763 insertions(+)
>
Hi Giulio,
> Add dtsi file for i.MXRT1020.
>
Has this file been ported from Linux kernel? Or is it only available in
U-Boot?
Reviewed-by: Lukasz Majewski
> Signed-off-by: Giulio Benetti
> ---
> arch/arm/dts/imxrt1020.dtsi | 133
> 1
48..f28d52d3b7 100644
> --- a/arch/arm/mach-imx/imxrt/Kconfig
> +++ b/arch/arm/mach-imx/imxrt/Kconfig
> @@ -3,6 +3,10 @@ if ARCH_IMXRT
> config IMXRT
> bool
>
> +config IMXRT1020
> + bool
> + select IMXRT
> +
> config IMXRT1050
> bool
&
10
> +#define IMXRT1020_CLK_PLL3_PFD3_454_74M 11
> +#define IMXRT1020_CLK_PLL2_198M 12
> +#define IMXRT1020_CLK_PLL3_120M 13
> +#define IMXRT1020_CLK_PLL3_80M 14
> +#define IMXRT1020_CLK_PLL3_60M
; 0x45e0, 0));
> +/* clks not needed in SPL stage */
> +#ifndef CONFIG_SPL_BUILD
> + clk_dm(IMX8MN_CLK_ENET_REF, imx8m_clk_composite("enet_ref",
> imx8mn_enet_ref_sels, base + 0xa980));
> + clk_dm(IMX8MN_CLK_ENET_TIMER,
> imx8m_clk_composite("enet_timer", imx8m
int fout,
> uint *_mint, uint *_mfrac, uint n, foutiic, fvcoiic, mint;
> u64 mfrac;
>
> - n = (221500U + fout / 2) / fout;
> if (fout < 41700U)
> n = 2 * ((221500U / 2 + fout / 2) / fout);
> else
> --
> 2.25.0
>
Rev
default:
> return -ENODEV;
> }
> -
> - return rate;
> }
>
> static struct clk_ops intel_clk_ops = {
> --
> 2.25.0
>
Reviewed-by: Lukasz Majewski
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfga
= meson_pcie_pll_get_rate(clk);
> + break;
> case CLKID_VPU_0:
> rate = meson_div_get_rate(clk, CLKID_VPU_0_DIV);
> break;
> --
> 2.25.0
>
Reviewed-by: Lukasz Majewski
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH
re_probe() callback only when 'regulator-boot-on' property
> is present in device tree. The GPIOD_IS_OUT_ACTIVE flag is not set at
> all, but relevant gpio is requested.
>
> Signed-off-by: Lukasz Majewski
Tom, could you pull this fix? (I would prefer to avoid pulling my own
fixes
rsions should be created. I am not particularly attached to
> the naming convention, suggestions are welcome.
>
> Signed-off-by: Sean Anderson
Reviewed-by: Lukasz Majewski
> ---
> Changes for v3:
> - Removed sysctl struct, replacing it with defines. This is to have
;
> For clocks in the CCF, we always traverse up the tree when enabling.
> Previously, CCF clocks without id set would be skipped, stopping the
> traversal too early.
>
> Signed-off-by: Sean Anderson
Acked-by: Lukasz Majewski
> ---
> Changes for v3:
> - N
composite clocks will still function normally.
> Previously, at least mux had to exist, since clk_composite_get_parent
> was used to determine the parent for clk_register.
>
> Signed-off-by: Sean Anderson
Acked-by: Lukasz Majewski
(Please commit clk related patches with this patch se
ithout issue.
>
> imx avoided the above problem by using a custom get_rate function
> with composite clocks.
>
> Signed-off-by: Sean Anderson
Thank you Sean for your CCF enhancement and updating the ccf.txt
documentation entry.
Acked-by: Lukasz Majewski
I don't mind if RISC-
ug() in place of dev_warn() otherwise a
> >> lot of
>
> ^^ this must be CCF. Can you correct commit log while applying?
I think that Stefano (or Tom) will apply this patch (as it is related to
i.MX SoC's uart).
>
> Thanks in advance
Best regards,
Lukasz Majewski
--
DENX
Hi Sean,
> Hi Lukasz,
>
> On 1/29/20 7:29 PM, Lukasz Majewski wrote:
> >> Yes, but then clk_get_parent throws a fit, which gets called by
> >
> > Could you explain what "throw a fit" means here? I'm a bit
> > confused.
>
> Ok, so ima
Hi Sean,
> On 1/27/20 6:40 PM, Lukasz Majewski wrote:
> >> The real problem with the current approach (IMO) is that there is a
> >> mismatch between the clock structure and the clock function. If one
> >> calls clk_get_rate on some clock, the get_rate function is
On Tue, 28 Jan 2020 17:50:03 +0100
Giulio Benetti wrote:
> On 1/28/20 9:10 AM, Lukasz Majewski wrote:
> > Hi Giulio,
> >
> >> Since some driver
> >
> > I would prefer more verbose commit message. Please share which
> > driver requir
On Tue, 28 Jan 2020 17:37:17 +0100
Giulio Benetti wrote:
> Hi Lukasz,
>
> all patch series has already been applied, anyway I answer to your
> suggestions since something was missing and I'm going to create a
> patch for that.
>
> So...
>
> On 1/28/20 9:09 AM, Lu
On Tue, 28 Jan 2020 17:50:03 +1000
Nathan Rossi wrote:
> On Mon, 27 Jan 2020 at 22:51, Lukasz Majewski wrote:
> >
> > Hi Nathan,
> >
> > > Handle selection of objects based on $(SPL_) to allow for normal
> > > and SPL builds to have differing object
not set
> +CONFIG_OF_CONTROL=y
> +CONFIG_SPL_OF_CONTROL=y
> +CONFIG_DEFAULT_DEVICE_TREE="imxrt1050-evk"
> +CONFIG_ENV_IS_NOWHERE=y
> +CONFIG_ENV_IS_IN_MMC=y
> +CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> +CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> +CONFIG_TFTP_BLOCKSIZE=512
> +CONFIG_SPL_DM=y
> +CONFI
ch/arm/mach-imx/imxrt/soc.c
> @@ -0,0 +1,35 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Copyright (C) 2019
> + * Author(s): Giulio Benetti
> + */
> +
> +#include
> +#include
> +#include
> +
> +int arch_cpu_init(void)
> +{
> + int i;
> +
&
> "fsl,imx8mq-usdhc", .data = (ulong)_imx8qm_data,},
> + { .compatible = "fsl,imxrt-usdhc", },
> { .compatible = "fsl,esdhc", },
> { /* sentinel */ }
> };
Reviewed-by: Lukasz Majewski
Best regards,
Lukasz Majewski
--
DENX So
t;name);
> - return -EINVAL;
> - }
> + priv->sdhc_clk = clk_get_rate(>per_clk);
> +#else
> + priv->sdhc_clk = mxc_get_clock(MXC_ESDHC_CLK + dev->seq);
> + if (priv->sdhc_clk <= 0) {
> + dev_err(dev, "Una
; +#define MEM_SIZE_2G 0x13
> +#define MEM_SIZE_4G 0x14
> +
> +#define MUX_A8_SDRAM_A8 0x0
> +#define MUX_A8_NAND_CE 0x1
> +#define MUX_A8_NOR_CE0x2
> +#define MUX_A8_PSRAM_CE 0x3
> +#define MUX_A8_DBI_CSX
data = LPUART_FLAG_REGMAP_32BIT_REG },
> { }
> };
>
> diff --git a/include/fsl_lpuart.h b/include/fsl_lpuart.h
> index fc517d4b7f..511fb84367 100644
> --- a/include/fsl_lpuart.h
> +++ b/include/fsl_lpuart.h
> @@ -4,7 +4,8 @@
> *
> */
>
> -#if defined(CONF
t; + dev_warn(dev, "Failed to get per clk: %d\n", ret);
^^ - please change to debug() as some devices may
enable CONFIG_CLK, but did not yet support (have
implemented) this clock in CCF.
> + }
> +#endif
> +
>
Hi Giulio,
> Add dtsi file for i.MXRT1050.
>
Please add information from where this code was ported (as I've pointed
out in other mails).
Also a tip:
To avoid extra dtsi maintenance burden, there are u-boot*.dtsi files
(in e.g. arch/arm/dts/) which add extra properties (U-boot specific).
In
t; +U_BOOT_DRIVER(imxrt_pinctrl) = {
> + .name = "imxrt-pinctrl",
> + .id = UCLASS_PINCTRL,
> + .of_match = of_match_ptr(imxrt_pinctrl_match),
> + .probe = imxrt_pinctrl_probe,
> + .remove = imx_pinctrl_remove,
> + .priv_auto_alloc_size = sizeof
GPIO5_BASE_ADDR,
> -#if !(defined(CONFIG_MX6UL) || defined(CONFIG_MX6ULL) ||
> defined(CONFIG_IMX8M)) +#if !(defined(CONFIG_MX6UL) ||
> defined(CONFIG_MX6ULL) || \
> + defined(CONFIG_IMX8M) || defined(CONFIG_IMXRT1050))
> [5] = GPIO6_BASE_ADDR,
> #endif
> #endif
Revie
Hi Giulio,
> Add i.MXRT1050 clk driver support.
>
Acked-by: Lukasz Majewski
> Signed-off-by: Giulio Benetti
> ---
> drivers/clk/imx/Kconfig | 16 ++
> drivers/clk/imx/Makefile| 2 +
> drivers/clk/imx/clk-imxrt105
Hi Giulio,
> Add support for PLLV3 AV type.
If this code has been ported from Linux kernel, then provide SHA1,
branch, and commit message.
Acked-by: Lukasz Majewski
>
> Signed-off-by: Giulio Benetti
> ---
> drivers/clk/imx/clk-pllv3.c | 76
> ++
drv_name = UBOOT_DM_CLK_IMX_PLLV3_GENERIC;
> pll->div_shift = 0;
> + pll->powerup_set = false;
> break;
> case IMX_PLLV3_USB:
> drv_name = UBOOT_DM_CLK_IMX_PLLV3_USB;
> pll->div_shift = 1;
> +
l(void)
> void invalidate_dcache_all(void)
> {
> }
> +
> +void mmu_set_region_dcache_behaviour(phys_addr_t start, size_t size,
> + enum dcache_option option)
> +{
> +}
> +
> #endif
>
> #if !CONFIG_IS_ENABLED(SYS_ICACHE_OFF)
Bes
that this change will silently break several boards -
the problem is with assumption that entry point is equal to load_addr.
It would be best to pull this change ASAP, so we would have a chance to
fix this by next release.
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Mana
Hi Sean,
> Hi Lukasz,
>
> Thanks for the feedback.
>
> On 1/26/20 4:20 PM, Lukasz Majewski wrote:
> > Hi Sean,
> >
> >> CCF clocks should always use the struct clock passed to their
> >> methods for extracting the driver-specific clock info
onfigs/rpi_4_defconfig| 11 +++
> drivers/dfu/dfu_mmc.c | 93
> +- drivers/usb/gadget/dwc2_udc_otg.c |
> 2 + drivers/usb/gadget/dwc2_udc_otg_xfer_dma.c | 12 +--
> fs/fat/fat_write.c | 8 +-
> include/configs/rpi.h
Hi Anatolij,
> Hi Lukasz,
>
> On Sat, 3 Aug 2019 12:52:44 +0200
> Lukasz Majewski lu...@denx.de wrote:
> ...
> > Thanks Anatolij for the correction.
> >
> > Reviewed-by: Lukasz Majewski
> >
> > (I will add it to u-boot-clk tree ASAP).
&g
usb.o
> endif
> endif
> -ifdef CONFIG_USB_ETHER
> +ifdef CONFIG_$(SPL_)USB_ETHER
> obj-y += ether.o
> obj-$(CONFIG_USB_ETH_RNDIS) += rndis.o
> obj-$(CONFIG_CI_UDC) += ci_udc.o
> ---
> 2.24.1
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH,
-26Jan2020
Travis-CI:
https://travis-ci.org/lmajewski/u-boot-dfu/builds/642125888
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49
Hi Sean,
> On 1/26/20 3:55 PM, Lukasz Majewski wrote:
> > Hi Sean
> >
> >> Make clk-gate2 available for use outside of imx.
> >>
> >> Signed-off-by: Sean Anderson
> >> ---
> >> drivers/clk/Makefile
Hi Marek,
> On 1/26/20 9:26 PM, Lukasz Majewski wrote:
> Hi,
>
> [...]
>
> >
> > Guillermo RodrÃguez (1):
> > dfu: Add option to skip empty pages when flashing UBI images
> > to
&
composite_ops->enable = clk_composite_enable;
> - composite_ops->disable = clk_composite_disable;
> gate->data = (ulong)composite;
> }
>
> @@ -160,6 +165,14 @@ err:
> return clk;
> }
>
> +static const struct clk_ops
clk->dev) : clk);
> + struct clk_mux *mux = to_clk_mux(clk);
> int index;
> u32 val;
> u32 reg;
> diff --git a/drivers/clk/imx/clk-gate2.c b/drivers/clk/imx/clk-gate2.c
> index 1b9db6e791..e32c0cb53e 100644
> --- a/drivers/clk/imx/clk-gate2.c
>
t;
> +struct clk *clk_register_gate(struct device *dev, const char *name,
> + const char *parent_name, unsigned long
> flags,
> + void __iomem *reg, u8 bit_idx,
> + u8 clk_gate_flags, spinlock_t *lock);
when flashing UBI images
Travis-CI:
https://travis-ci.org/lmajewski/u-boot-dfu/builds/618507384
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59
Hi Sean,
> On 1/24/20 9:27 AM, Lukasz Majewski wrote:
> > I saw your patches. Unfortunately, there was the Christmas/New
> > year's break and afterwards I had some more urgent tasks to do.
> > Apologize for that...
> >
> > What I would like to see here is to
Explicitly configure GPIO0_0 in SPL, which controlls 3V3 voltage
on the XEA board (it also supplies TIVAs).
This code would enable TIVAs power supply early (also when board
uses the falcon boot).
Signed-off-by: Lukasz Majewski
---
board/liebherr/xea/xea.c | 17 -
1 file
apper" on GPIO0_0) in
very early SPL code, so it shouldn't be modified at latter stages.
Signed-off-by: Lukasz Majewski
---
arch/arm/dts/imx28-xea.dts | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/dts/imx28-xea.dts b/arch/arm/dts/imx28-xea.dts
index 5de6774c5a..de04904
The 'local-mac-address' property needs to be adjusted to the MAC address
value stored in U-Boot's 'ethaddr' env variable.
Signed-off-by: Lukasz Majewski
---
board/liebherr/xea/xea.c | 32
1 file changed, 32 insertions(+)
diff --git a/board/liebherr/xea/xea.c b
This patch enables support for CONFIG_OF_BOARD_SETUP in xea defconfig.
Signed-off-by: Lukasz Majewski
---
configs/imx28_xea_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/imx28_xea_defconfig b/configs/imx28_xea_defconfig
index 7281e86d96..ef83e4d3ff 100644
--- a/configs
D_IS_OUT_ACTIVE flag is not set at all, but relevant gpio is
requested.
Signed-off-by: Lukasz Majewski
---
drivers/power/regulator/regulator-uclass.c | 3 +++
drivers/power/regulator/regulator_common.c | 5 -
2 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/power
Redundant envs help with assuring better reliability for the system as they
prevent from the situation when envs are stored only in a single place.
Signed-off-by: Lukasz Majewski
---
configs/imx28_xea_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/imx28_xea_defconfig b
This patch set provides some enhancements for i.MX28 based XEA board.
The most notably one is the ethaddr setup for L2 switch based design and
the code to very early enable fec regulator.
Lukasz Majewski (5):
arm: xea: defconfig: Define space for redundant envs in SPI-NOR flash
arm: xea
but the goal is to
have it usable for other archs as well (and reuse from Linux as much as
possible).
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-81
re PR by end of this week. Thanks for the fix.
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de
pgpc7
mic_get("s2mps11_pmic", );
> + ret = pmic_get("s2mps11_pmic@66", );
> #else
> ret = pmic_get("max77686", );
> if (!ret) {
Reviewed-by: Lukasz Majewski
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH,
dts/exynos5422-odroidxu3.dts
> @@ -10,7 +10,7 @@
> #include "exynos54xx.dtsi"
>
> / {
> - model = "Odroid XU3 based on EXYNOS5422";
> + model = "Odroid XU3/XU4/HC1/HC2 based on Exynos5422";
> compatible = "samsung,odroidxu3&qu
ret = pmic_get("s2mps11_pmic@66", );
> #else
> ret = pmic_get("max77686", );
> if (!ret) {
Reviewed-by: Lukasz Majewski
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirche
4)
> + return 2; /* MMC2: SD */
> +
> + /* MMC0: eMMC or unknown */
> + return 0;
> +}
Reviewed-by: Lukasz Majewski
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5,
3] - https://github.com/NexellCorp/bl1_s5p4418
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de
pgpugJvsXRS5S.pgp
Description: OpenPGP digital signature
-j ".rodata.default_environment"
> ${ENV_OBJ_FILE_COPY}
> # Replace default '\0' with '\n' and sort entries
> -tr '\0' '\n' < ${ENV_OBJ_FILE_COPY} | sort -u
> +tr '\0' '\n' < ${ENV_OBJ_FILE_COPY} | sort --field-separator== -k1,1
> --stable
> rm ${ENV_OBJ_FI
, NULL, 10);
> @@ -159,10 +164,11 @@ int do_spi (cmd_tbl_t *cmdtp, int flag, int
> argc, char * const argv[]) U_BOOT_CMD(
> sspi, 5, 1, do_spi,
> "SPI utility command",
> - "[:][.] - Send and receive
> bits\n"
> + "[:][.][@]
Hi Giulio,
> On 12/13/19 11:09 AM, Lukasz Majewski wrote:
> > On Fri, 13 Dec 2019 00:02:25 +0100
> > Giulio Benetti wrote:
> >
> >> Hi Lukasz,
> >>
> >> On 12/12/19 11:53 PM, Giulio Benetti wrote:
> >>> clk_
On Fri, 13 Dec 2019 12:38:43 +0100
Giulio Benetti wrote:
> On 12/13/19 11:09 AM, Lukasz Majewski wrote:
> > On Fri, 13 Dec 2019 00:02:25 +0100
> > Giulio Benetti wrote:
> >
> >> Hi Lukasz,
> >>
> >> On 12/12/19 11:53 PM, Giulio Benetti wrote:
is a preparatory patch for some other work? Or is it just a
standalone fix?
>
> Kind regards
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-5
Hi Giulio,
> On 12/10/19 1:07 AM, Lukasz Majewski wrote:
> > On Mon, 9 Dec 2019 18:13:04 +0100
> > Giulio Benetti wrote:
> >
> >> Hi Lukasz,
> >>
> >> On 12/8/19 4:05 PM, Lukasz Majewski wrote:
> >>> On Wed, 4 Dec 2019 18:44:
On Wed, 11 Dec 2019 13:40:01 +0100
Giulio Benetti wrote:
> Hi Lukasz,
>
> On 12/10/19 12:46 AM, Lukasz Majewski wrote:
> > On Mon, 9 Dec 2019 12:54:33 +0100
> > Giulio Benetti wrote:
> >
> >> Hi Lukasz, Stefano, Fabio, all,
> >>
> >> On
#ifdef CONFIG_CMD_EEPROM_LAYOUT
> struct eeprom_layout layout;
> #endif
Reviewed-by: Lukasz Majewski
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (
On Mon, 9 Dec 2019 18:13:04 +0100
Giulio Benetti wrote:
> Hi Lukasz,
>
> On 12/8/19 4:05 PM, Lukasz Majewski wrote:
> > On Wed, 4 Dec 2019 18:44:28 +0100
> > Giulio Benetti wrote:
> >
> >> Add support for PLLV3 AV type.
> >>
> >> Sign
On Mon, 9 Dec 2019 16:20:10 +0100
Giulio Benetti wrote:
> Hi Lukasz,
>
> On 12/8/19 3:52 PM, Lukasz Majewski wrote:
> > On Wed, 4 Dec 2019 18:44:33 +0100
> > Giulio Benetti wrote:
> >
> >> This driver assumes that lpuart clock is already enabled before
&
On Mon, 9 Dec 2019 12:54:33 +0100
Giulio Benetti wrote:
> Hi Lukasz, Stefano, Fabio, all,
>
> On 12/8/19 3:45 PM, Lukasz Majewski wrote:
> > On Wed, 4 Dec 2019 18:44:31 +0100
> > Giulio Benetti wrote:
> >
> >> Add i.MXRT pinctrl driver.
>
On Mon, 9 Dec 2019 11:53:05 +0100
Giulio Benetti wrote:
> Forgotten to ask you...
>
> On 12/9/19 11:49 AM, Giulio Benetti wrote:
> > Hi Lukasz,
> >
> > On 12/8/19 3:40 PM, Lukasz Majewski wrote:
> >> On Wed, 4 Dec 2019 18:44:30 +0100
> >> Giuli
MAC address - ce:e1:9e:46:f3:a2
eth0: ethernet@800f
Hit any key to stop autoboot: 0
Signed-off-by: Lukasz Majewski
---
Changes in v6:
- Use SUPPORT_EMMC_BOOT_OVERRIDE_PART_CONFIG in the imx28_xea_defconfig
- Add missing #include to boards/liebherr/xea/xea.c to avoid gcc
build warning
FLAG_PRE_RELOC).
Do you have any data about increase of the final binary size?
The buildman script has options to check the difference of the final
binary (i.e. SPL) size (as provided by Tom Rini):
./tools/buildman/$ export SOURCE_DATE_EPOCH=`date +%s`
$ ./tools/buildman/buildman -o /tmp/tes
G_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8)
> +#if defined(CONFIG_ARCH_MX7ULP) || defined(CONFIG_ARCH_IMX8) || \
> + defined(CONFIG_ARCH_IMXRT)
> struct lpuart_fsl_reg32 {
> u32 verid;
> u32 param;
Please also used buildman to check if this patch series is bisectable
(i.e
which do have
CONFIG_CLK enabled (for some clocks/drivers), but did not yet provided
CCF definition for lpuart clock.
Was this series checked with travis-ci?
For example:
https://travis-ci.org/lmajewski/u-boot-dfu/jobs/66547
> if (is_lpuart32(dev))
> re
On Wed, 4 Dec 2019 18:44:32 +0100
Giulio Benetti wrote:
> Add dtsi file for i.MXRT1050.
>
> Signed-off-by: Giulio Benetti
> ---
> arch/arm/dts/imxrt1050.dtsi | 146 +++
> include/dt-bindings/pinctrl/pins-imxrt1050.h | 993
> +++ 2 files changed, 1139
ce_id imxrt_pinctrl_match[] = {
> + { .compatible = "fsl,imxrt-iomuxc",
> + .data = (ulong)_pinctrl_soc_info },
> + { /* sentinel */ }
> +};
> +
> +U_BOOT_DRIVER(imxrt_pinctrl) = {
> + .name = "imxrt-pinctrl",
> + .id = UCLASS_PINCTRL,
>
_CLK_PLL3_BYPASS 17
> +#define IMXRT1050_CLK_PLL5_BYPASS19
> +#define IMXRT1050_CLK_PLL1_REF_SEL 30
> +#define IMXRT1050_CLK_PLL2_REF_SEL 31
> +#define IMXRT1050_CLK_PLL3_REF_SEL 32
> +#define IMXRT1050_CLK_PLL5_REF_SEL 34
> +#define IMXRT1050_CLK_PRE_PERIPH_SEL 44
> +#define IMXRT1050_CLK_PERIPH_SEL 45
> +#define IMXRT1050_CLK_SEMC_ALT_SEL 46
> +#define IMXRT1050_CLK_SEMC_SEL 47
> +#define IMXRT1050_CLK_USDHC1_SEL 48
> +#define IMXRT1050_CLK_USDHC2_SEL 49
> +#define IMXRT1050_CLK_LPUART_SEL 50
> +#define IMXRT1050_CLK_LCDIF_SEL 51
> +#define IMXRT1050_CLK_VIDEO_POST_DIV_SEL 52
> +#define IMXRT1050_CLK_VIDEO_DIV 53
> +#define IMXRT1050_CLK_ARM_PODF 90
> +#define IMXRT1050_CLK_LPUART_PODF91
> +#define IMXRT1050_CLK_USDHC1_PODF92
> +#define IMXRT1050_CLK_USDHC2_PODF93
> +#define IMXRT1050_CLK_SEMC_PODF 94
> +#define IMXRT1050_CLK_AHB_PODF 95
> +#define IMXRT1050_CLK_LCDIF_PRED 96
> +#define IMXRT1050_CLK_LCDIF_PODF 97
> +#define IMXRT1050_CLK_USDHC1 163
> +#define IMXRT1050_CLK_USDHC2 164
> +#define IMXRT1050_CLK_LPUART1165
> +#define IMXRT1050_CLK_SEMC 166
> +#define IMXRT1050_CLK_LCDIF 167
> +#define IMXRT1050_CLK_PLL1_ARM 170
> +#define IMXRT1050_CLK_PLL2_SYS 171
> +#define IMXRT1050_CLK_PLL3_USB_OTG 172
> +#define IMXRT1050_CLK_PLL4_AUDIO 173
> +#define IMXRT1050_CLK_PLL5_VIDEO 174
> +#define IMXRT1050_CLK_PLL6_ENET 176
> +#define IMXRT1050_CLK_PLL7_USB_HOST 177
> +#define IMXRT1050_CLK_END266
> +
> +#endif /* __DT_BINDINGS_CLOCK_IMXRT1050_H */
Was this driver ported from Linux kernel? If yes - please add exact
SHA1 and branch from which it was copied. This information shall be
provided in the commit message.
And thanks for providing this code to U-Boot :-)
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de
pgpD2fts6leGJ.pgp
Description: OpenPGP digital signature
_size(header) + header_size;
This may not be the case - but I do recall that there was a similar
issue between u-boot.bin and u-boot.imx being loaded.
What is the format of i.MXRT?
I'm also concerned about breaking already supported in-tree boards. Why
i.MXRT needs to make this change? And why oth
return 0;
> +}
> +
> static const struct clk_ops clk_pfd_ops = {
> .get_rate = clk_pfd_recalc_rate,
> + .set_rate = clk_pfd_set_rate,
> };
>
> struct clk *imx_clk_pfd(const char *name, const char *parent_name,
Reviewed-by: Lukasz Majewski
DM_CLK_IMX_PLLV3_GENERIC,
> + .id = UCLASS_CLK,
> + .ops= _pllv3_generic_ops,
> + .flags = DM_FLAG_PRE_RELOC,
> +};
> +
> +U_BOOT_DRIVER(clk_pllv3_usb) = {
> + .name = UBOOT_DM_CLK_IMX_PLLV3_USB,
> .id = UCLASS_CLK,
> .ops
ak;
> default:
> kfree(pll);
Reviewed-by: Lukasz Majewski
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-
DM_FLAG_PRE_RELOC,
> };
>
> +U_BOOT_DRIVER(clk_pllv3_sys) = {
> + .name = UBOOT_DM_CLK_IMX_PLLV3_SYS,
> + .id = UCLASS_CLK,
> + .ops= _pllv3_sys_ops,
> + .flags = DM_FLAG_PRE_RELOC,
> +};
> +
> U_BOOT_DRIVER(clk_pllv3_usb) = {
>
*pll = to_clk_pllv3(clk);
> @@ -73,6 +99,7 @@ static const struct clk_ops clk_pllv3_generic_ops =
> { .get_rate = clk_pllv3_generic_get_rate,
> .enable = clk_pllv3_generic_enable,
> .disable = clk_pllv3_generic_disable,
> + .set_rate = clk_pllv3_generic_set_rat
t; + writel(val, pll->base);
> +
> + return 0;
> +}
> +
> static const struct clk_ops clk_pllv3_generic_ops = {
> .get_rate = clk_pllv3_generic_get_rate,
> .enable = clk_pllv3_generic_enable,
> + .disable= clk_pllv3_generic_disable,
> };
&g
ze of kernel image for uncompression */
> #define CONFIG_SYS_BOOTM_LEN (60 * 1024 * 1024)
>
> -#define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
> -
> #define CONFIG_SKIP_LOWLEVEL_INIT
>
> /* 0x0 - 0x40 is used for placing exception vectors */
> diff --git a/
atchwork (I thought that he has fixed just Apalis
> iMX6), but seems the patch was
> lost somewhere, as I can not find it nor in u-boot-imx/next neither
> in u-boot-imx/master branches.
Thanks for providing the fix (at least for the Toradex boards)
And I do guess that more i.MX6 b
-boot/u-boot/blob/v2019.10/doc/uImage.FIT/signature.txt#L580
>
> Thank you,
> Diego Rondini
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66
break;
> if (CHECK_CLUST(newclust, mydata->fatsize)) {
> @@ -824,8 +826,6 @@ set_contents(fsdata *mydata, dir_entry *dentptr,
> loff_t pos, __u8 *buffer, if (filesize <= cur_pos)
> break;
>
> - /* CHEC
74,7 @@
> "fdt_fixup=;\0" \
> MEM_LAYOUT_ENV_SETTINGS \
> NFS_BOOTCMD \
> + UBOOT_UPDATE \
> "setethupdate=if env exists ethaddr; then; else setenv
> ethaddr " \ "00:14:2d:00:00:00; fi; tftpboot ${loadaddr} " \
> "flash_eth.img && source ${loadaddr}\0" \
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-59 Fax: (+49)-8142-66989-80 Email: lu...@denx.de
pgp6Ntr22svhV.pgp
Description: OpenPGP digital signature
This define indicates if DM_GPIO shall be supported in SPL. This allows
proper operation of DM converted GPIO drivers in SPL, which use
boards.
Signed-off-by: Lukasz Majewski
---
Changes in v2:
- Add dependency on DM_GPIO
Note:
- Board which is using DM_GPIO in SPL with OF_PLATDATA (XEA
Hi Marek,
> On 11/30/19 12:25 AM, Lukasz Majewski wrote:
> > Dear Marek,
>
> Hi,
>
> > The following changes since commit
> > dbcbdad92caf4b42a6279da6e65180532bc45620:
> >
> > sandbox: enable USB_KEYBOARD_FN_KEYS (2019-11-25 13:28:53 +0100)
&g
| 1 +
doc/README.dfu | 8 ++--
drivers/dfu/Kconfig | 6 ++
drivers/dfu/dfu.c| 15 +++
include/dfu.h| 6 +-
7 files changed, 71 insertions(+), 10 deletions(-)
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH
Hi Jagan,
> Hi Lukasz,
>
> On Wed, Nov 27, 2019 at 9:47 PM Lukasz Majewski wrote:
> >
> > Hi Jagan,
> >
> > > Hi Lukasz,
> > >
> > > On Wed, Nov 27, 2019 at 4:15 PM Lukasz Majewski
> > > wrote:
> > > >
> > &
On Wed, 27 Nov 2019 18:45:43 +0200
Andy Shevchenko wrote:
> On Wed, Nov 27, 2019 at 05:10:22PM +0100, Lukasz Majewski wrote:
> > > On Wed, Nov 27, 2019 at 11:57:53AM +0100, Lukasz Majewski wrote:
>
> > > I base my patches on official releases / release candidates. It
Hi Jagan,
> Hi Lukasz,
>
> On Wed, Nov 27, 2019 at 4:15 PM Lukasz Majewski wrote:
> >
> > Hi Jagan,
> >
> > > Hi,
> > >
> > > I have created GPT table start from 8MB for kernel, roots etc.
> > > something like
> > >
>
Hi Andy,
> On Wed, Nov 27, 2019 at 11:57:53AM +0100, Lukasz Majewski wrote:
> > Hi Andy,
> >
> > > The stock U-Boot on Intel Edison has timeout parameter for DFU
> > > command. Enable it here to be compatible with the original U-Boot
> > > confi
Hi Andy,
> On Wed, Nov 27, 2019 at 11:56:15AM +0100, Lukasz Majewski wrote:
>
> > Thank you for your work on enhancing DFU. The patch series is
> > generally Ok.
> >
> > Please find some minor comments/requests below.
>
> Thank you for review
IG_ENV_IS_IN_MMC=y
> CONFIG_CPU=y
> +CONFIG_DFU_TIMEOUT=y
> CONFIG_DFU_MMC=y
> CONFIG_DFU_RAM=y
> CONFIG_SUPPORT_EMMC_BOOT=y
This patch doesn't apply now.
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Offi
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