Re: [USRP-users] Siggen not working in E310

My experiments with SIGGEN on the E310 were similar. At the moment my workaround is to just send noise or burst samples from the CPU exactly when needed. I would be interested in a way to use siggen. I am also working on a siggen-like block which will hop frequencies. I am interested in any design

[USRP-users] Siggen not working in E310

Hello, I have been working on getting Siggen working under E310. I built RFNOC image with siggen for E310. I have been able to use that image to generate a signal from RFNOC_SIGGEN -> HOST, but when I try to rung RFNOC_SIGGEN -> RFNOC_DUC -> RFNOC_RADIO I received an error. The error I received

Re: [USRP-users] rfnoc block with two inputs

Hi Nick, Thank you for your feedback. I didn't notice src and data Sid are per input however looking at code I don't think this is the problem. My understanding is that src Sid is used to form cvita packet going out of the block. In simple mode axis wrapper doesn't seem to use while it is used

[USRP-users] Inserting custom DSP code in B200mini, CODEC loopback test failing

Hi all, I am using USRP B200mini/B205 to develop a custom DSP. For that purpose, I am trying to find an insertion point in the Ettus FPGA code. I started with modifying the code in b205.v by tying RX and TX to a constant value and expecting to see the same value when running SDR. The code

Re: [USRP-users] Trying to build v. 003.010 Win64

BTW, I indeed forgot to mention that we use X300 over 10G interface, of course without usb. Vladimir понедельник, 25 сентября 2017г., 20:28 +03:00 от Josh Sendall jsend...@csir.co.za : >Hi Vladimir, > >You need to link with libusb. It seems to be needed regardless of whether you >enable the

Re: [USRP-users] rfnoc block with two inputs

Couple of problems just offhand. * src_sid is a one-per-input signal. See noc_shell.v for details. * Settings buses and readback buses are one-per (max(input, output)). Again, see noc_shell.v. I don't think this is a problem for you, though. You should be getting errors in simulation (or

Re: [USRP-users] Trying to build v. 003.010 Win64

Joshua, Thanks for your reply! It was my first thought too. But 1) ver 3.9.7 as I wrote builds w/o a glitch, and 2) looking at the error messages it's not obvious how libusb could help here. Those functions that it misses are compiler-generated helper-funcs for uhd::... class(es), so I doubt

Re: [USRP-users] rfnoc block with two inputs

Hi, It’s quite complex and long… posting the initial part with shell and wrappers module noc_block_demod #( parameter NOC_ID = 64'h1408E12980FDE75E, parameter MAX_PACKET_SIZE = 64) ( input bus_clk, input bus_rst, input ce_clk, input ce_rst, input [63:0] i_tdata, input i_tlast, input

Re: [USRP-users] rfnoc block with two inputs

Dario, Can you post your RFNoC block Verilog code? Nick On Mon, Sep 25, 2017 at 11:38 AM Dario Pennisi via USRP-users < usrp-users@lists.ettus.com> wrote: > Hi, > > We are developing a block which needs two inputs from the two radios. The > block works with one input but when adding the second

[USRP-users] rfnoc block with two inputs

Hi, We are developing a block which needs two inputs from the two radios. The block works with one input but when adding the second one only the first input is fed with data. Block has noc_shell instantiated with INPUT_PORTS(2) and its str_data output bus is connected to two axi_wrappers.

Re: [USRP-users] E310 "subdev spec" equivalent in RFNoC?

Hello again, Wanted to send some more results in case anyone is following... I narrowed the problem down to a few lines in gr-ettus's rfnoc_block_impl that specifically overrides the block_port for each channel; the "block_port" stream_args in device->get_rx_stream(stream_args) function was

Re: [USRP-users] warning on UDP buffer size when using Python API

Im just running the sample python API script to capture samples from the receiver. Im using an X310. I tried running the script directly from command line to make sure nothing was changed and I still got the same warning. It’s a bit strange that when I change the buffer size to what is

Re: [USRP-users] Trying to build v. 003.010 Win64

Hi Vladimir, You need to link with libusb. It seems to be needed regardless of whether you enable the sub module or not. Kind regards, Joshua Sendall On 25 Sep 2017 6:18 PM, Vladimir via USRP-users wrote:[The e-mail server of the sender could not be verified

[USRP-users] Trying to build v. 003.010 Win64

Hello USRP team! In our Linux application for quite a while we use some 3.10 version of UHD (which requires FPGA ver. 33) and it works fine. Now we want to use the same version in Windows app, to match the FPGA ver. But trying to build any of 3.10 versions in MS Visual Studio 2013 (Release x64

[USRP-users] uhd_usrp message return and Comms issues

When I run the “uhd_usrp_probe” command I receive an interesting message prior to getting all of the information returned. It is listed below. I am having communication issues with the USRP X310 when changing frequencies, as it is taking much longer to retask the X310 than I would assume and

Re: [USRP-users] E310 "subdev spec" equivalent in RFNoC?

Hi all, On further inspection, I've had no more luck using python RFNoC to record on channel 1 (channel B)... Sadly, manually editing the stream args in the rfnoc radio did not appear to have any effect (see below). And, editing the "connect" in python command still errors out as per Test 3 of

Re: [USRP-users] USRP's B210 sluggish start of transmission

Hi all, For comparison: screenshot of much more "civilized" behavior of USRP X310 in the same situation. Best Regards, Piotr Krysik ___ USRP-users mailing list USRP-users@lists.ettus.com

Re: [USRP-users] E310 "subdev spec" equivalent in RFNoC?

Thanks Tom, Quick update here... I've found a set of options that will control the E300 receive channel using rfnoc software: rfnoc_rx_to_file --freq --rate --ant TX/RX --radio-chan 0 rfnoc_rx_to_file --freq --rate --ant RX2 --radio-chan 0 rfnoc_rx_to_file --freq --rate --ant TX/RX

Re: [USRP-users] C674 fail on B210 rev 4

Matt, Thanks for the tips on the power supply. I was worried that the quality of the wall wart may have played a part in this – unfortunately I don’t have the equipment necessary to inspect its output closely. I’ve also seen incidents of tantalum capacitors that have almost seemingly

Re: [USRP-users] C674 fail on B210 rev 4

Robin, Thank you for the info and the link - I hadn’t realized that the EDA files were available publicly. -Billy From: Robin Coxe [mailto:robin.c...@ettus.com] Sent: Friday, September 22, 2017 3:43 PM To: Billy Jones Cc: usrp-users@lists.ettus.com Subject: Re: [USRP-users] C674 fail on B210