Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images

2018-01-30 Thread Derek Kozel via USRP-users
t; Tarik > > > > > > > > > > *From:* Derek Kozel [mailto:derek.ko...@ettus.com] > *Sent:* dinsdag 30 januari 2018 14:33 > > *To:* Tarik Kazaz > *Cc:* Martin Braun; USRP-users@lists.ettus.com > *Subject:* Re: [USRP-users] NI USRP / PCIe interface and RFNo

Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images

2018-01-30 Thread Tarik Kazaz via USRP-users
to bit stream as parameter in gnuradio-companion. Thank you agin, Tarik From: Derek Kozel [mailto:derek.ko...@ettus.com] Sent: dinsdag 30 januari 2018 14:33 To: Tarik Kazaz Cc: Martin Braun; USRP-users@lists.ettus.com Subject: Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images

Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images

2018-01-30 Thread Derek Kozel via USRP-users
> > *From:* Derek Kozel [mailto:derek.ko...@ettus.com] > *Sent:* dinsdag 30 januari 2018 11:50 > *To:* Tarik Kazaz > *Cc:* Martin Braun; USRP-users@lists.ettus.com > > *Subject:* Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images > > > > Hi Tarik, > > Your

Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images

2018-01-30 Thread Tarik Kazaz via USRP-users
Kozel [mailto:derek.ko...@ettus.com] Sent: dinsdag 30 januari 2018 11:50 To: Tarik Kazaz Cc: Martin Braun; USRP-users@lists.ettus.com Subject: Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images Hi Tarik, Your steps are based on the misunderstanding of how the image loading occurs

Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images

2018-01-30 Thread Derek Kozel via USRP-users
e args. > > -- M > > On 01/29/2018 09:56 PM, Tarik Kazaz wrote: > > Hello Martin, > > > > Could you provide me more detailed instruction, how to disable PCIe to > reload image. > > > > I think instead of .bit, I should flash it with .lvbit if I want to

Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images

2018-01-30 Thread Tarik Kazaz via USRP-users
_ From: Martin Braun [martin.br...@ettus.com] Sent: Tuesday, January 30, 2018 5:23 AM To: Tarik Kazaz; 'USRP-users@lists.ettus.com' Subject: Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images Tarik, please remember to keep responses on the mailing list, lest they get lost. Yeah,

Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images

2018-01-29 Thread Martin Braun via USRP-users
n Behalf Of > Martin Braun via USRP-users > Sent: maandag 29 januari 2018 20:46 > To: usrp-users@lists.ettus.com > Subject: Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images > > On 01/29/2018 07:37 PM, Tarik Kazaz via USRP-users wrote: >> Hello everyone, >

Re: [USRP-users] NI USRP / PCIe interface and RFNoC FPGA images

2018-01-29 Thread Martin Braun via USRP-users
On 01/29/2018 07:37 PM, Tarik Kazaz via USRP-users wrote: > Hello everyone, > >   > > I am just starting to use RFNoC and I am a bit confused with hardware > compatibility for RFNoC development. > > In order to describe my setup I will list items below: > >   > > 1.   I have NI USRP RIO

[USRP-users] NI USRP / PCIe interface and RFNoC FPGA images

2018-01-29 Thread Tarik Kazaz via USRP-users
Hello everyone, I am just starting to use RFNoC and I am a bit confused with hardware compatibility for RFNoC development. In order to describe my setup I will list items below: 1. I have NI USRP RIO (equivalent of X310 with integrated GPS module) 2. I am connecting it with PC