Re: [PATCH for-4.19 v3 2/3] xen: enable altp2m at create domain domctl

On 22.05.2024 18:21, Roger Pau Monné wrote: > On Wed, May 22, 2024 at 03:34:29PM +0200, Jan Beulich wrote: >> On 22.05.2024 15:16, Roger Pau Monné wrote: >>> On Tue, May 21, 2024 at 12:30:32PM +0200, Jan Beulich wrote: On 17.05.2024 15:33, Roger Pau Monne wrote: > Enabling it using an HVM

Re: [PATCH 5.10] x86/xen: Drop USERGS_SYSRET64 paravirt call

On Wed, May 22, 2024 at 06:20:15PM -0700, Pawan Gupta wrote: > From: Juergen Gross > > commit afd30525a659ac0ae0904f0cb4a2ca75522c3123 upstream. Now queued up, thanks. greg k-h

[linux-linus test] 186072: regressions - FAIL

flight 186072 linux-linus real [real] http://logs.test-lab.xenproject.org/osstest/logs/186072/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run: build-amd64-xsm 6 xen-buildfail REGR. vs. 186052 build-amd64

[xen-4.17-testing bisection] complete build-i386-xsm

branch xen-4.17-testing xenbranch xen-4.17-testing job build-i386-xsm testid xen-build Tree: ovmf git://xenbits.xen.org/osstest/ovmf.git Tree: qemu git://xenbits.xen.org/qemu-xen-traditional.git Tree: qemuu git://xenbits.xen.org/qemu-xen.git Tree: seabios git://xenbits.xen.org/osstest/seabios.git

[PATCH] docs/misra: rules for mass adoption

This patch adds a bunch of rules to rules.rst that are uncontroversial and have zero violations in Xen. As such, they have been approved for adoption. All the ones that regard the standard library have the link to the existing footnote in the notes. Signed-off-by: Stefano Stabellini diff --git

[PATCH 5.10] x86/xen: Drop USERGS_SYSRET64 paravirt call

*/ __visible void xen_iret(void); -__visible void xen_sysret32(void); -__visible void xen_sysret64(void); extern int xen_panic_handler_init(void); --- base-commit: ce3838dbefdccfb95a63f81fe6cf77592ae9138c change-id: 20240522-verw-xen-pv-fix-e638729ac3ca Best regards, -- Thanks, Pawan

Re: [PATCH v3 5/8] xen/arm/gic: Allow routing/removing interrupt to running VMs

Hi Julien, Stefano, On 5/22/2024 9:03 PM, Julien Grall wrote: Hi Henry, On 22/05/2024 02:22, Henry Wang wrote: Also, while looking at the locking, I noticed that we are not doing anything with GIC_IRQ_GUEST_MIGRATING. In gic_update_one_lr(), we seem to assume that if the flag is set, then p-

[xen-4.17-testing test] 186069: regressions - FAIL

flight 186069 xen-4.17-testing real [real] http://logs.test-lab.xenproject.org/osstest/logs/186069/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run: build-i386-xsm6 xen-buildfail REGR. vs. 185864 Tests which di

[libvirt test] 186070: tolerable all pass - PUSHED

flight 186070 libvirt real [real] http://logs.test-lab.xenproject.org/osstest/logs/186070/ Failures :-/ but no regressions. Tests which did not succeed, but are not blocking: test-armhf-armhf-libvirt 16 saverestore-support-checkfail like 186057 test-amd64-amd64-libvirt 15 migrate-s

Re: [PATCH v16 1/5] arm/vpci: honor access size when returning an error

On 5/22/24 18:59, Stewart Hildebrand wrote: > From: Volodymyr Babchuk > > Guest can try to read config space using different access sizes: 8, > 16, 32, 64 bits. We need to take this into account when we are > returning an error back to MMIO handler, otherwise it is possible to > provide more data

[PATCH v16 5/5] xen/arm: account IO handlers for emulated PCI MSI-X

From: Oleksandr Andrushchenko At the moment, we always allocate an extra 16 slots for IO handlers (see MAX_IO_HANDLER). So while adding IO trap handlers for the emulated MSI-X registers we need to explicitly tell that we have additional IO handlers, so those are accounted. Signed-off-by: Oleksan

[PATCH v16 4/5] xen/arm: translate virtual PCI bus topology for guests

From: Oleksandr Andrushchenko There are three originators for the PCI configuration space access: 1. The domain that owns physical host bridge: MMIO handlers are there so we can update vPCI register handlers with the values written by the hardware domain, e.g. physical view of the registers vs g

[PATCH v16 3/5] vpci: add initial support for virtual PCI bus topology

From: Oleksandr Andrushchenko Assign SBDF to the PCI devices being passed through with bus 0. The resulting topology is where PCIe devices reside on the bus 0 of the root complex itself (embedded endpoints). This implementation is limited to 32 devices which are allowed on a single PCI bus. Plea

[PATCH v16 2/5] vpci/header: emulate PCI_COMMAND register for guests

From: Oleksandr Andrushchenko Xen and/or Dom0 may have put values in PCI_COMMAND which they expect to remain unaltered. PCI_COMMAND_SERR bit is a good example: while the guest's (domU) view of this will want to be zero (for now), the host having set it to 1 should be preserved, or else we'd effec

[PATCH v16 1/5] arm/vpci: honor access size when returning an error

From: Volodymyr Babchuk Guest can try to read config space using different access sizes: 8, 16, 32, 64 bits. We need to take this into account when we are returning an error back to MMIO handler, otherwise it is possible to provide more data than requested: i.e. guest issues LDRB instruction to r

[PATCH v16 0/5] PCI devices passthrough on Arm, part 3

This is next version of vPCI rework. Aim of this series is to prepare ground for introducing PCI support on ARM platform. in v16: - minor updates - see individual patches in v15: - reorder so ("arm/vpci: honor access size when returning an error") comes first in v14: - drop first 9 patches

Re: [XEN PATCH v4 2/3] x86/MCE: add default switch case in init_nonfatal_mce_checker()

On Wed, 22 May 2024, Sergiy Kibrik wrote: > The default switch case block is wanted here, to handle situation > e.g. of unexpected c->x86_vendor value -- then no mcheck init is done, but > misleading message still gets logged anyway. > > Signed-off-by: Sergiy Kibrik > CC: Jan Beulich Reviewed-b

[for-4.19] Re: [XEN PATCH v3] arm/mem_access: add conditional build of mem_access.c

Hi, Adding Oleksii as the release manager. On 22/05/2024 19:27, Tamas K Lengyel wrote: On Fri, May 10, 2024 at 8:32 AM Alessandro Zucchelli wrote: In order to comply to MISRA C:2012 Rule 8.4 for ARM the following changes are done: revert preprocessor conditional changes to xen/mem_access.h w

Re: [PATCH v3 3/7] xen/p2m: put reference for level 2 superpage

On 22/05/2024 14:47, Luca Fancellu wrote: Hi Julien, Hi Luca, On 22 May 2024, at 14:25, Julien Grall wrote: diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c index 41fcca011cf4..b496266deef6 100644 --- a/xen/arch/arm/mmu/p2m.c +++ b/xen/arch/arm/mmu/p2m.c @@ -753,17 +753,9 @@

[xen-4.18-testing test] 186067: tolerable FAIL - PUSHED

flight 186067 xen-4.18-testing real [real] flight 186083 xen-4.18-testing real-retest [real] http://logs.test-lab.xenproject.org/osstest/logs/186067/ http://logs.test-lab.xenproject.org/osstest/logs/186083/ Failures :-/ but no regressions. Tests which are failing intermittently (not blocking): t

Re: [XEN PATCH v3] arm/mem_access: add conditional build of mem_access.c

On Fri, May 10, 2024 at 8:32 AM Alessandro Zucchelli wrote: > > In order to comply to MISRA C:2012 Rule 8.4 for ARM the following > changes are done: > revert preprocessor conditional changes to xen/mem_access.h which > had it build unconditionally, add conditional build for xen/mem_access.c > as

Re: [XEN PATCH v3] arm/mem_access: add conditional build of mem_access.c

On 2024-05-10 22:59, Julien Grall wrote: Hi, Hi, On 10/05/2024 13:32, Alessandro Zucchelli wrote: In order to comply to MISRA C:2012 Rule 8.4 for ARM the following changes are done: revert preprocessor conditional changes to xen/mem_access.h which had it build unconditionally, add condition

Re: [PATCH for-4.19 v3 2/3] xen: enable altp2m at create domain domctl

On Wed, May 22, 2024 at 03:34:29PM +0200, Jan Beulich wrote: > On 22.05.2024 15:16, Roger Pau Monné wrote: > > On Tue, May 21, 2024 at 12:30:32PM +0200, Jan Beulich wrote: > >> On 17.05.2024 15:33, Roger Pau Monne wrote: > >>> Enabling it using an HVM param is fragile, and complicates the logic whe

[PATCH v4 2/2] drivers/char: Use sub-page ro API to make just xhci dbc cap RO

Not the whole page, which may contain other registers too. The XHCI specification describes DbC as designed to be controlled by a different driver, but does not mandate placing registers on a separate page. In fact on Tiger Lake and newer (at least), this page do contain other registers that Linux

[PATCH v4 0/2] Add API for making parts of a MMIO page R/O and use it in XHCI console

On older systems, XHCI xcap had a layout that no other (interesting) registers were placed on the same page as the debug capability, so Linux was fine with making the whole page R/O. But at least on Tiger Lake and Alder Lake, Linux needs to write to some other registers on the same page too. Add a

[PATCH v4 1/2] x86/mm: add API for marking only part of a MMIO page read only

In some cases, only few registers on a page needs to be write-protected. Examples include USB3 console (64 bytes worth of registers) or MSI-X's PBA table (which doesn't need to span the whole table either), although in the latter case the spec forbids placing other registers on the same page. Curre

Re: [PATCH v2 0/3] Clean the policy manipulation path in domain creation

On 20/05/2024 13:45, Roger Pau Monné wrote: > On Fri, May 17, 2024 at 05:08:33PM +0100, Alejandro Vallejo wrote: >> v2: >> * Removed xc_cpu_policy from xenguest.h >> * Added accessors for xc_cpu_policy so the serialised form can be >> extracted. >> * Modified xen-cpuid to use accessors. >> >

Re: [PATCH v2 2/8] xen/x86: Simplify header dependencies in x86/hvm

On 22/05/2024 10:33, Jan Beulich wrote: > On 08.05.2024 14:39, Alejandro Vallejo wrote: >> Otherwise it's not possible to call functions described in hvm/vlapic.h from >> the >> inline functions of hvm/hvm.h. >> >> This is because a static inline in vlapic.h depends on hvm.h, and pulls it >> trans

Re: [PATCH v3 1/2] x86/mm: add API for marking only part of a MMIO page read only

On Wed, May 22, 2024 at 03:29:51PM +0200, Jan Beulich wrote: > On 22.05.2024 15:22, Marek Marczykowski-Górecki wrote: > > On Wed, May 22, 2024 at 09:52:44AM +0200, Jan Beulich wrote: > >> On 21.05.2024 04:54, Marek Marczykowski-Górecki wrote: > >>> +static void subpage_mmio_write_emulate( > >>> +

Re: [PATCH v2 1/2] tools/xg: Streamline cpu policy serialise/deserialise calls

On 20/05/2024 14:47, Roger Pau Monné wrote: >> @@ -917,17 +922,14 @@ int xc_cpu_policy_set_domain(xc_interface *xch, >> uint32_t domid, >> xc_cpu_policy_t *policy) >> { >> uint32_t err_leaf = -1, err_subleaf = -1, err_msr = -1; >> -unsigned int nr_leaves = A

Re: [PATCH v2 2/2] tools/xg: Clean up xend-style overrides for CPU policies

On 20/05/2024 16:02, Roger Pau Monné wrote: >> - >> static int xc_msr_policy(xc_interface *xch, domid_t domid, >> - const struct xc_msr *msr) >> + const struct xc_msr *msr, >> + xc_cpu_policy_t *host, >> +

Re: [PATCH v2 2/4] x86/shadow: Introduce sh_trace_gl1e_va()

On 22/05/2024 2:47 pm, Jan Beulich wrote: > On 22.05.2024 15:17, Andrew Cooper wrote: >> trace_shadow_fixup() and trace_not_shadow_fault() both write out identical >> trace records. Reimplement them in terms of a common sh_trace_gl1e_va(). >> >> There's no need to pack the trace record, even in th

Re: [PATCH v3 4/7] xen/arm: Parse xen,shared-mem when host phys address is not provided

Hi Michal, >> for ( i = 0; i < mem->nr_banks; i++ ) >> { >> /* >> * Meet the following check: >> - * 1) The shm ID matches and the region exactly match >> - * 2) The shm ID doesn't match and the region doesn't overlap >> - * with an existing one >>

Re: [PATCH v3 2/2] x86: detect PIT aliasing on ports other than 0x4[0-3]

On 22.05.2024 15:57, Jason Andryuk wrote: > On 2024-05-22 08:59, Jan Beulich wrote: >> --- a/xen/arch/x86/time.c >> +++ b/xen/arch/x86/time.c >> @@ -427,6 +427,74 @@ static struct platform_timesource __init >> .resume = resume_pit, >> }; >> >> +unsigned int __initdata pit_alias_mask; >>

Re: [PATCH v3 2/2] x86: detect PIT aliasing on ports other than 0x4[0-3]

On 2024-05-22 08:59, Jan Beulich wrote: ... in order to also deny Dom0 access through the alias ports (commonly observed on Intel chipsets). Without this it is only giving the impression of denying access to PIT. Unlike for CMOS/RTC, do detection pretty early, to avoid disturbing normal operation

Re: [PATCH v2 4/4] x86/shadow: Don't leave trace record field uninitialized

On 22.05.2024 15:17, Andrew Cooper wrote: > From: Jan Beulich > > The emulation_count field is set only conditionally right now. Convert > all field setting to an initializer, thus guaranteeing that field to be > set to 0 (default initialized) when GUEST_PAGING_LEVELS != 3. > > Rework trace_shad

Re: [PATCH v2 3/4] x86/shadow: Rework trace_shadow_emulate_other() as sh_trace_gfn_va()

On 22.05.2024 15:17, Andrew Cooper wrote: > sh_trace_gfn_va() is very similar to sh_trace_gl1e_va(), and a rather shorter > name than trace_shadow_emulate_other(). Like sh_trace_gl1e_va(), there is no > need to pack the trace record. Provided record size can freely change (here for the 3-level ca

Re: [PATCH v2 1/4] x86/shadow: Rework trace_shadow_gen() into sh_trace_va()

On 22.05.2024 15:47, Andrew Cooper wrote: > On 22/05/2024 2:40 pm, Jan Beulich wrote: >> On 22.05.2024 15:17, Andrew Cooper wrote: >>> --- a/xen/arch/x86/mm/shadow/multi.c >>> +++ b/xen/arch/x86/mm/shadow/multi.c >>> @@ -1974,13 +1974,17 @@ typedef u32 guest_va_t; >>> typedef u32 guest_pa_t; >>>

Re: [PATCH v3 4/7] xen/arm: Parse xen,shared-mem when host phys address is not provided

Hi Luca, On 22/05/2024 09:51, Luca Fancellu wrote: > > > Handle the parsing of the 'xen,shared-mem' property when the host physical > address is not provided, this commit is introducing the logic to parse it, > but the functionality is still not implemented and will be part of future > commits.

Re: New Defects reported by Coverity Scan for XenProject

On 22/05/2024 11:05 am, Jan Beulich wrote: > On 22.05.2024 11:56, scan-ad...@coverity.com wrote: >> ** CID 1598431: Memory - corruptions (OVERRUN) >> >> >> >> *** CID 1598431: Memory - corrup

Re: [PATCH v3 3/7] xen/p2m: put reference for level 2 superpage

Hi Julien, > On 22 May 2024, at 14:25, Julien Grall wrote: > >> diff --git a/xen/arch/arm/mmu/p2m.c b/xen/arch/arm/mmu/p2m.c >> index 41fcca011cf4..b496266deef6 100644 >> --- a/xen/arch/arm/mmu/p2m.c >> +++ b/xen/arch/arm/mmu/p2m.c >> @@ -753,17 +753,9 @@ static int p2m_mem_access_radix_set(stru

Re: [PATCH v2 1/4] x86/shadow: Rework trace_shadow_gen() into sh_trace_va()

On 22/05/2024 2:40 pm, Jan Beulich wrote: > On 22.05.2024 15:17, Andrew Cooper wrote: >> --- a/xen/arch/x86/mm/shadow/multi.c >> +++ b/xen/arch/x86/mm/shadow/multi.c >> @@ -1974,13 +1974,17 @@ typedef u32 guest_va_t; >> typedef u32 guest_pa_t; >> #endif >> >> -static inline void trace_shadow_ge

Re: [PATCH v2 2/4] x86/shadow: Introduce sh_trace_gl1e_va()

On 22.05.2024 15:17, Andrew Cooper wrote: > trace_shadow_fixup() and trace_not_shadow_fault() both write out identical > trace records. Reimplement them in terms of a common sh_trace_gl1e_va(). > > There's no need to pack the trace record, even in the case of PAE paging. Isn't this altering the

Re: [PATCH v3 1/2] x86/PIT: supply and use #define-s

On 2024-05-22 08:59, Jan Beulich wrote: Help reading of code programming the PIT by introducing constants for control word, read back and latch commands, as well as status. Requested-by: Jason Andryuk Signed-off-by: Jan Beulich Reviewed-by: Jason Andryuk Thanks for making the switch. Rega

Re: [PATCH v2 1/4] x86/shadow: Rework trace_shadow_gen() into sh_trace_va()

On 22.05.2024 15:17, Andrew Cooper wrote: > --- a/xen/arch/x86/mm/shadow/multi.c > +++ b/xen/arch/x86/mm/shadow/multi.c > @@ -1974,13 +1974,17 @@ typedef u32 guest_va_t; > typedef u32 guest_pa_t; > #endif > > -static inline void trace_shadow_gen(u32 event, guest_va_t va) > +/* Shadow trace even

Re: [PATCH for-4.19 v3 2/3] xen: enable altp2m at create domain domctl

On 22.05.2024 15:16, Roger Pau Monné wrote: > On Tue, May 21, 2024 at 12:30:32PM +0200, Jan Beulich wrote: >> On 17.05.2024 15:33, Roger Pau Monne wrote: >>> Enabling it using an HVM param is fragile, and complicates the logic when >>> deciding whether options that interact with altp2m can also be

Re: [PATCH v3 1/2] x86/mm: add API for marking only part of a MMIO page read only

On 22.05.2024 15:22, Marek Marczykowski-Górecki wrote: > On Wed, May 22, 2024 at 09:52:44AM +0200, Jan Beulich wrote: >> On 21.05.2024 04:54, Marek Marczykowski-Górecki wrote: >>> +static void subpage_mmio_write_emulate( >>> +mfn_t mfn, >>> +unsigned int offset, >>> +const void *data, >

Re: [PATCH] xen/livepatch: make .livepatch.funcs read-only for in-tree tests

On Fri, Dec 1, 2023 at 10:16 AM Roger Pau Monne wrote: > > This matches the flags of the .livepatch.funcs section when generated using > livepatch-build-tools, which only sets the SHT_ALLOC flag. > > Also constify the definitions of the livepatch_func variables in the tests > themselves, in order

Re: [PATCH v3 3/7] xen/p2m: put reference for level 2 superpage

Hi Luca, On 22/05/2024 08:51, Luca Fancellu wrote: From: Penny Zheng We are doing foreign memory mapping for static shared memory, and there is a great possibility that it could be super mapped. But today, p2m_put_l3_page could not handle superpages. This commits implements a new function p2m

Re: [PATCH v3 1/2] x86/mm: add API for marking only part of a MMIO page read only

On Wed, May 22, 2024 at 09:52:44AM +0200, Jan Beulich wrote: > On 21.05.2024 04:54, Marek Marczykowski-Górecki wrote: > > +static void subpage_mmio_write_emulate( > > +mfn_t mfn, > > +unsigned int offset, > > +const void *data, > > +unsigned int len) > > +{ > > +struct subpage_r

Re: [PATCH v3 6/7] xen/arm: Implement the logic for static shared memory from Xen heap

Hi Luca, On 22/05/2024 09:51, Luca Fancellu wrote: > > > This commit implements the logic to have the static shared memory banks > from the Xen heap instead of having the host physical address passed from > the user. > > When the host physical address is not supplied, the physical memory is > t

[PATCH v2 0/4] x86/shadow: Trace fixes and cleanup

Patches 1-3 new, following reivew of Jan's bugfix (patch 4) Andrew Cooper (3): x86/shadow: Rework trace_shadow_gen() into sh_trace_va() x86/shadow: Introduce sh_trace_gl1e_va() x86/shadow: Rework trace_shadow_emulate_other() as sh_trace_gfn_va() Jan Beulich (1): x86/shadow: Don't leave tr

[PATCH v2 1/4] x86/shadow: Rework trace_shadow_gen() into sh_trace_va()

The ((GUEST_PAGING_LEVELS - 2) << 8) expression in the event field is common to all shadow trace events, so introduce sh_trace() as a very thin wrapper around trace(). Then, rename trace_shadow_gen() to sh_trace_va() to better describe what it is doing, and to be more consistent with later cleanup

[PATCH v2 3/4] x86/shadow: Rework trace_shadow_emulate_other() as sh_trace_gfn_va()

sh_trace_gfn_va() is very similar to sh_trace_gl1e_va(), and a rather shorter name than trace_shadow_emulate_other(). Like sh_trace_gl1e_va(), there is no need to pack the trace record. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich CC: Roger Pau Monné CC: George Dunla

[PATCH v2 2/4] x86/shadow: Introduce sh_trace_gl1e_va()

trace_shadow_fixup() and trace_not_shadow_fault() both write out identical trace records. Reimplement them in terms of a common sh_trace_gl1e_va(). There's no need to pack the trace record, even in the case of PAE paging. No functional change. Signed-off-by: Andrew Cooper --- CC: Jan Beulich

[PATCH v2 4/4] x86/shadow: Don't leave trace record field uninitialized

From: Jan Beulich The emulation_count field is set only conditionally right now. Convert all field setting to an initializer, thus guaranteeing that field to be set to 0 (default initialized) when GUEST_PAGING_LEVELS != 3. Rework trace_shadow_emulate() to be consistent with the other trace helpe

Re: [PATCH v3 3/7] xen/p2m: put reference for level 2 superpage

Hi Luca, On 22/05/2024 09:51, Luca Fancellu wrote: > > > From: Penny Zheng > > We are doing foreign memory mapping for static shared memory, and > there is a great possibility that it could be super mapped. > But today, p2m_put_l3_page could not handle superpages. > > This commits implements

Re: [PATCH for-4.19 v3 2/3] xen: enable altp2m at create domain domctl

On Tue, May 21, 2024 at 12:30:32PM +0200, Jan Beulich wrote: > On 17.05.2024 15:33, Roger Pau Monne wrote: > > Enabling it using an HVM param is fragile, and complicates the logic when > > deciding whether options that interact with altp2m can also be enabled. > > > > Leave the HVM param value for

Re: [PATCH v3 5/8] xen/arm/gic: Allow routing/removing interrupt to running VMs

Hi Henry, On 22/05/2024 02:22, Henry Wang wrote: On 5/22/2024 9:16 AM, Stefano Stabellini wrote: On Wed, 22 May 2024, Henry Wang wrote: Hi Julien, On 5/21/2024 8:30 PM, Julien Grall wrote: Hi, On 21/05/2024 05:35, Henry Wang wrote: diff --git a/xen/arch/arm/gic-vgic.c b/xen/arch/arm/gic-vg

[PATCH v3 2/2] x86: detect PIT aliasing on ports other than 0x4[0-3]

... in order to also deny Dom0 access through the alias ports (commonly observed on Intel chipsets). Without this it is only giving the impression of denying access to PIT. Unlike for CMOS/RTC, do detection pretty early, to avoid disturbing normal operation later on (even if typically we won't use

[PATCH v3 1/2] x86/PIT: supply and use #define-s

Help reading of code programming the PIT by introducing constants for control word, read back and latch commands, as well as status. Requested-by: Jason Andryuk Signed-off-by: Jan Beulich --- v3: New. --- a/xen/arch/x86/apic.c +++ b/xen/arch/x86/apic.c @@ -983,7 +983,7 @@ static unsigned int __

[PATCH v3 0/2] x86: detect PIT aliasing on ports other than 0x4[0-3]

1: PIT: supply and use #define-s 2: detect PIT aliasing on ports other than 0x4[0-3] No functional change from v2, just the introduction of the new prereq patch to help overall readability. Jan

Re: [PATCH v3 1/2] x86/mm: add API for marking only part of a MMIO page read only

On 22.05.2024 12:36, Marek Marczykowski-Górecki wrote: > On Wed, May 22, 2024 at 09:52:44AM +0200, Jan Beulich wrote: >> On 21.05.2024 04:54, Marek Marczykowski-Górecki wrote: >>> --- a/xen/arch/x86/hvm/hvm.c >>> +++ b/xen/arch/x86/hvm/hvm.c >>> @@ -2009,6 +2009,14 @@ int hvm_hap_nested_page_fault(

[xen-unstable test] 186066: tolerable FAIL - PUSHED

flight 186066 xen-unstable real [real] flight 186075 xen-unstable real-retest [real] http://logs.test-lab.xenproject.org/osstest/logs/186066/ http://logs.test-lab.xenproject.org/osstest/logs/186075/ Failures :-/ but no regressions. Tests which are failing intermittently (not blocking): test-armh

Re: [PATCH] x86/shadow: don't leave trace record field uninitialized

On 22/05/2024 11:17 am, Jan Beulich wrote: > The emulation_count field is set only conditionally right now. Convert > all field setting to an initializer, thus guaranteeing that field to be > set to 0 (default initialized) when GUEST_PAGING_LEVELS != 3. > > While there also drop the "event" local v

Re: [PATCH] x86/shadow: don't leave trace record field uninitialized

On Wed, May 22, 2024 at 12:17:30PM +0200, Jan Beulich wrote: > The emulation_count field is set only conditionally right now. Convert > all field setting to an initializer, thus guaranteeing that field to be > set to 0 (default initialized) when GUEST_PAGING_LEVELS != 3. > > While there also drop

Re: [PATCH v3 2/2] drivers/char: Use sub-page ro API to make just xhci dbc cap RO

On Wed, May 22, 2024 at 10:05:05AM +0200, Jan Beulich wrote: > On 21.05.2024 04:54, Marek Marczykowski-Górecki wrote: > > --- a/xen/drivers/char/xhci-dbc.c > > +++ b/xen/drivers/char/xhci-dbc.c > > @@ -1216,20 +1216,19 @@ static void __init cf_check > > dbc_uart_init_postirq(struct serial_port *po

Re: [PATCH v3 1/2] x86/mm: add API for marking only part of a MMIO page read only

On Wed, May 22, 2024 at 09:52:44AM +0200, Jan Beulich wrote: > On 21.05.2024 04:54, Marek Marczykowski-Górecki wrote: > > --- a/xen/arch/x86/hvm/hvm.c > > +++ b/xen/arch/x86/hvm/hvm.c > > @@ -2009,6 +2009,14 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned > > long gla, > > goto out

Re: [PATCH v15 3/5] vpci: add initial support for virtual PCI bus topology

On Fri, May 17, 2024 at 01:06:13PM -0400, Stewart Hildebrand wrote: > From: Oleksandr Andrushchenko > > Assign SBDF to the PCI devices being passed through with bus 0. > The resulting topology is where PCIe devices reside on the bus 0 of the > root complex itself (embedded endpoints). > This impl

[PATCH] x86/shadow: don't leave trace record field uninitialized

The emulation_count field is set only conditionally right now. Convert all field setting to an initializer, thus guaranteeing that field to be set to 0 (default initialized) when GUEST_PAGING_LEVELS != 3. While there also drop the "event" local variable, thus eliminating an instance of the being p

Re: New Defects reported by Coverity Scan for XenProject

On 22.05.2024 11:56, scan-ad...@coverity.com wrote: > ** CID 1598431: Memory - corruptions (OVERRUN) > > > > *** CID 1598431: Memory - corruptions (OVERRUN) > /xen/common/trace.c: 798 in t

Virtual Xen Summit 2024

Hi all, To make sure we encourage as many people to attend Xen Summit 2024 , the community will be helping to host the event virtually via Jitsi. This will be free to join! I will send the links and instructions to join our event, early next

Re: [PATCH v15 2/5] vpci/header: emulate PCI_COMMAND register for guests

On 22.05.2024 11:28, Roger Pau Monné wrote: > On Fri, May 17, 2024 at 01:06:12PM -0400, Stewart Hildebrand wrote: >> @@ -754,9 +774,23 @@ static int cf_check init_header(struct pci_dev *pdev) >> return -EOPNOTSUPP; >> } >> >> -/* Setup a handler for the command register. */ >> -

Re: [PATCH v2 2/8] xen/x86: Simplify header dependencies in x86/hvm

On 08.05.2024 14:39, Alejandro Vallejo wrote: > Otherwise it's not possible to call functions described in hvm/vlapic.h from > the > inline functions of hvm/hvm.h. > > This is because a static inline in vlapic.h depends on hvm.h, and pulls it > transitively through vpt.h. The ultimate cause is ha

Re: [PATCH v15 2/5] vpci/header: emulate PCI_COMMAND register for guests

On Fri, May 17, 2024 at 01:06:12PM -0400, Stewart Hildebrand wrote: > From: Oleksandr Andrushchenko > > Xen and/or Dom0 may have put values in PCI_COMMAND which they expect > to remain unaltered. PCI_COMMAND_SERR bit is a good example: while the > guest's (domU) view of this will want to be zero

[XEN PATCH v4 3/3] x86/MCE: optional build of AMD/Intel MCE code

Separate Intel/AMD-specific MCE code using CONFIG_{INTEL,AMD} config options. Now we can avoid build of mcheck code if support for specific platform is intentionally disabled by configuration. Also global variables lmce_support & cmci_support from Intel-specific mce_intel.c have to moved to common

[XEN PATCH v4 2/3] x86/MCE: add default switch case in init_nonfatal_mce_checker()

The default switch case block is wanted here, to handle situation e.g. of unexpected c->x86_vendor value -- then no mcheck init is done, but misleading message still gets logged anyway. Signed-off-by: Sergiy Kibrik CC: Jan Beulich --- changes in v4: - return 0 instead of -ENODEV and put a comme

[XEN PATCH v4 1/3] x86/intel: move vmce_has_lmce() routine to header

Moving this function out of mce_intel.c will make it possible to disable build of Intel MCE code later on, because the function gets called from common x86 code. Also replace boilerplate code that checks for MCG_LMCE_P flag with vmce_has_lmce(), which might contribute to readability a bit. Signed

[XEN PATCH v4 0/3] x86: make Intel/AMD vPMU & MCE support configurable

Three remaining patches to separate support of Intel & AMD CPUs in Xen build. Most of related patches from previous series had already been merged. Specific changes since v3 are provided per-patch. v3 series here: https://lore.kernel.org/xen-devel/cover.1715673586.git.sergiy_kib...@epam.com/ -S

Re: [PATCH v10 03/14] xen/bitops: implement fls{l}() in common logic

On 22.05.2024 09:37, Oleksii K. wrote: > On Tue, 2024-05-21 at 13:18 +0200, Jan Beulich wrote: >> On 17.05.2024 15:54, Oleksii Kurochko wrote: >>> To avoid the compilation error below, it is needed to update to >>> places >>> in common/page_alloc.c where flsl() is used as now flsl() returns >>> uns

Re: [PATCH v3 0/2] Add API for making parts of a MMIO page R/O and use it in XHCI console

On 21.05.2024 04:54, Marek Marczykowski-Górecki wrote: > On older systems, XHCI xcap had a layout that no other (interesting) registers > were placed on the same page as the debug capability, so Linux was fine with > making the whole page R/O. But at least on Tiger Lake and Alder Lake, Linux > need

Re: [PATCH v3 2/2] drivers/char: Use sub-page ro API to make just xhci dbc cap RO

On 21.05.2024 04:54, Marek Marczykowski-Górecki wrote: > --- a/xen/drivers/char/xhci-dbc.c > +++ b/xen/drivers/char/xhci-dbc.c > @@ -1216,20 +1216,19 @@ static void __init cf_check > dbc_uart_init_postirq(struct serial_port *port) > break; > } > #ifdef CONFIG_X86 > -/* > - *

Re: [PATCH v3 1/2] x86/mm: add API for marking only part of a MMIO page read only

On 21.05.2024 04:54, Marek Marczykowski-Górecki wrote: > --- a/xen/arch/x86/hvm/hvm.c > +++ b/xen/arch/x86/hvm/hvm.c > @@ -2009,6 +2009,14 @@ int hvm_hap_nested_page_fault(paddr_t gpa, unsigned > long gla, > goto out_put_gfn; > } > > +if ( (p2mt == p2m_mmio_direct) && npfec.wri

[PATCH v3 6/7] xen/arm: Implement the logic for static shared memory from Xen heap

This commit implements the logic to have the static shared memory banks from the Xen heap instead of having the host physical address passed from the user. When the host physical address is not supplied, the physical memory is taken from the Xen heap using allocate_domheap_memory, the allocation n

[PATCH v3 5/7] xen/arm: Rework heap page allocation outside allocate_bank_memory

The function allocate_bank_memory allocates pages from the heap and maps them to the guest using guest_physmap_add_page. As a preparation work to support static shared memory bank when the host physical address is not provided, Xen needs to allocate memory from the heap, so rework allocate_bank_me

[PATCH v3 7/7] xen/docs: Describe static shared memory when host address is not provided

From: Penny Zheng This commit describe the new scenario where host address is not provided in "xen,shared-mem" property and a new example is added to the page to explain in details. Take the occasion to fix some typos in the page. Signed-off-by: Penny Zheng Signed-off-by: Luca Fancellu Review

[PATCH v3 0/7] Static shared memory followup v2 - pt2

This serie is a partial rework of this other serie: https://patchwork.kernel.org/project/xen-devel/cover/20231206090623.1932275-1-penny.zh...@arm.com/ The original serie is addressing an issue of the static shared memory feature that impacts the memory footprint of other component when the feature

[PATCH v3 4/7] xen/arm: Parse xen,shared-mem when host phys address is not provided

Handle the parsing of the 'xen,shared-mem' property when the host physical address is not provided, this commit is introducing the logic to parse it, but the functionality is still not implemented and will be part of future commits. Rework the logic inside process_shm_node to check the shm_id befo

[PATCH v3 2/7] xen/arm: Wrap shared memory mapping code in one function

Wrap the code and logic that is calling assign_shared_memory and map_regions_p2mt into a new function 'handle_shared_mem_bank', it will become useful later when the code will allow the user to don't pass the host physical address. Signed-off-by: Luca Fancellu Reviewed-by: Michal Orzel --- v3 cha

[PATCH v3 3/7] xen/p2m: put reference for level 2 superpage

From: Penny Zheng We are doing foreign memory mapping for static shared memory, and there is a great possibility that it could be super mapped. But today, p2m_put_l3_page could not handle superpages. This commits implements a new function p2m_put_l2_superpage to handle 2MB superpages, specifical

[PATCH v3 1/7] xen/arm: Lookup bootinfo shm bank during the mapping

The current static shared memory code is using bootinfo banks when it needs to find the number of borrowers, so every time assign_shared_memory is called, the bank is searched in the bootinfo.shmem structure. There is nothing wrong with it, however the bank can be used also to retrieve the start a

[linux-linus test] 186065: regressions - FAIL

flight 186065 linux-linus real [real] flight 186071 linux-linus real-retest [real] http://logs.test-lab.xenproject.org/osstest/logs/186065/ http://logs.test-lab.xenproject.org/osstest/logs/186071/ Regressions :-( Tests which did not succeed and are blocking, including tests which could not be run

Re: [PATCH v10 03/14] xen/bitops: implement fls{l}() in common logic

On Tue, 2024-05-21 at 13:18 +0200, Jan Beulich wrote: > On 17.05.2024 15:54, Oleksii Kurochko wrote: > > To avoid the compilation error below, it is needed to update to > > places > > in common/page_alloc.c where flsl() is used as now flsl() returns > > unsigned int: > > > > ./include/xen/kernel.h

Re: [PATCH for-4.19 0/3] xen: Misc MISRA changes

Hi Andrew, We can consider this patch series to be in Xen 4.19: Release-acked-by: Oleksii Kurochko ~ Oleksii On Tue, 2024-05-21 at 18:15 +0100, Andrew Cooper wrote: > Misc fixes collected during today's call. > > Andrew Cooper (3): >   xen/lzo: Implement COPY{4,8} using memcpy() >   xen/x86: D