On 08/13/2010 09:38 AM, Heinz-Jürgen Oertel wrote: > Am Freitag, 13. August 2010 09:27:16 schrieb Marc Kleine-Budde: >> Hello, >> >> Heinz-Jürgen Oertel wrote: >>> Am Mittwoch, 11. August 2010 17:59:17 schrieb Marc Kleine-Budde: >>>> Bit timing parameters for flexcan with 24.576000 MHz ref clock >>>> nominal real Bitrt nom real SampP >>>> Bitrate TQ[ns] PrS PhS1 PhS2 SJW BRP Bitrate Error SampP SampP >>>> Error CAN_CTRL 1000000 40 8 8 8 1 1 983040 1.7% >>>> 75.0% 68.0% 9.3% 0x003f0007 1000000 81 4 4 3 1 2 >>>> 1024000 2.4% 75.0% 75.0% 0.0% 0x011a0003 1000000 122 2 3 2 >>>> 1 3 1024000 2.4% 75.0% 75.0% 0.0% 0x02110001 >>> >>> I was not aware that the clock is 24.576000 MHz, always thought >>> 24.000000. >> >> The passage from the Datasheet you quoted said it's running at 24.576000 >> MHz > > :-( > >> >>> It is often the case that the crystal clock is chosen to get a perfect >>> bit rate for UARTS, not for CAN. But a UART frame, having only 10 bits, >>> can live with a much higher deviation from the nominal bit clock. >>> >>> I see that you typical use a sample point at 75%. >>> CANopen has a "Recommended location of sample point" at 87.5%. (CiA 301). >> >> I don't have access to the standard, but [1] lists a sample point of 75% >> for 1000 kbit/s and 80% for 800 kbit/s. All slower bitrates have the >> 87.5% sample point. >> >> cheers, Marc >> >> [1] www.can-cia.org/fileadmin/cia/files/icc/9/koppe.pdf > It's from 2003 > I hope the list will accept small pictures. > From CiA301 Version 4.1, 11. April 2007
Grrr, our current settings are based on the following mail: https://lists.berlios.de/pipermail/socketcan-core/2008-May/001231.html For backward compatibility, I'm not sure if I want to modify them silently? Wolfgang. _______________________________________________ Socketcan-users mailing list [email protected] https://lists.berlios.de/mailman/listinfo/socketcan-users
