Module Name: src
Committed By: matt
Date: Fri Mar 19 23:16:47 UTC 2010
Modified Files:
src/sys/arch/mips/mips [matt-nb5-mips64]: cpu_subr.c
Log Message:
When booting the secondary processors, try to make the cpu_counter is
close to cpu0's counter.
To generate a diff of this commit:
cvs rdiff -u -r1.1.2.4 -r1.1.2.5 src/sys/arch/mips/mips/cpu_subr.c
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/mips/mips/cpu_subr.c
diff -u src/sys/arch/mips/mips/cpu_subr.c:1.1.2.4 src/sys/arch/mips/mips/cpu_subr.c:1.1.2.5
--- src/sys/arch/mips/mips/cpu_subr.c:1.1.2.4 Thu Mar 11 08:19:01 2010
+++ src/sys/arch/mips/mips/cpu_subr.c Fri Mar 19 23:16:47 2010
@@ -32,7 +32,7 @@
#include "opt_multiprocessor.h"
#include "opt_sa.h"
-__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.1.2.4 2010/03/11 08:19:01 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu_subr.c,v 1.1.2.5 2010/03/19 23:16:47 matt Exp $");
#include <sys/param.h>
#include <sys/cpu.h>
@@ -628,6 +628,9 @@
while ((cpus_running & cpu_mask) == 0) {
/* spin, spin, spin */
}
+ mips3_cp0_count_write(ci->ci_data.cpu_cc_skew);
+ mips3_cp0_compare_write(ci->ci_data.cpu_cc_skew + ci->ci_cycles_per_hz);
+ ci->ci_data.cpu_cc_skew = 0;
/*
* Now turn on interrupts.
@@ -656,6 +659,7 @@
if ((cpus_hatched & cpu_mask) == 0)
continue;
+ ci->ci_data.cpu_cc_skew = mips3_cp0_count_read();
atomic_or_ulong(&ci->ci_flags, CPUF_RUNNING);
atomic_or_ulong(&cpus_running, cpu_mask);
}
