Module Name: src
Committed By: hans
Date: Sat Jul 14 12:59:55 UTC 2012
Modified Files:
src/sys/arch/arm/arm: cpufunc.c cpufunc_asm_sheeva.S
src/sys/arch/arm/include: cpufunc.h
Log Message:
Support cpu_sleep() on Sheeva CPUs.
To generate a diff of this commit:
cvs rdiff -u -r1.106 -r1.107 src/sys/arch/arm/arm/cpufunc.c
cvs rdiff -u -r1.1 -r1.2 src/sys/arch/arm/arm/cpufunc_asm_sheeva.S
cvs rdiff -u -r1.55 -r1.56 src/sys/arch/arm/include/cpufunc.h
Please note that diffs are not public domain; they are subject to the
copyright notices on the relevant files.
Modified files:
Index: src/sys/arch/arm/arm/cpufunc.c
diff -u src/sys/arch/arm/arm/cpufunc.c:1.106 src/sys/arch/arm/arm/cpufunc.c:1.107
--- src/sys/arch/arm/arm/cpufunc.c:1.106 Fri Jul 13 05:23:30 2012
+++ src/sys/arch/arm/arm/cpufunc.c Sat Jul 14 12:59:55 2012
@@ -1,4 +1,4 @@
-/* $NetBSD: cpufunc.c,v 1.106 2012/07/13 05:23:30 matt Exp $ */
+/* $NetBSD: cpufunc.c,v 1.107 2012/07/14 12:59:55 hans Exp $ */
/*
* arm7tdmi support code Copyright (c) 2001 John Fremlin
@@ -49,7 +49,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.106 2012/07/13 05:23:30 matt Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpufunc.c,v 1.107 2012/07/14 12:59:55 hans Exp $");
#include "opt_compat_netbsd.h"
#include "opt_cpuoptions.h"
@@ -1243,7 +1243,7 @@ struct cpu_functions sheeva_cpufuncs = {
.cf_flush_brnchtgt_C = cpufunc_nullop,
.cf_flush_brnchtgt_E = (void *)cpufunc_nullop,
- .cf_sleep = (void *)cpufunc_nullop,
+ .cf_sleep = (void *)sheeva_cpu_sleep,
/* Soft functions */
@@ -1598,6 +1598,7 @@ set_cpufuncs(void)
cpu_reset_needs_v4_MMU_disable = 1; /* V4 or higher */
get_cachetype_cp15();
pmap_pte_init_generic();
+ cpu_do_powersave = 1; /* Enable powersave */
return 0;
}
#endif /* CPU_SHEEVA */
Index: src/sys/arch/arm/arm/cpufunc_asm_sheeva.S
diff -u src/sys/arch/arm/arm/cpufunc_asm_sheeva.S:1.1 src/sys/arch/arm/arm/cpufunc_asm_sheeva.S:1.2
--- src/sys/arch/arm/arm/cpufunc_asm_sheeva.S:1.1 Sat Oct 2 05:37:58 2010
+++ src/sys/arch/arm/arm/cpufunc_asm_sheeva.S Sat Jul 14 12:59:55 2012
@@ -214,3 +214,11 @@ ENTRY(sheeva_idcache_wbinv_range)
mcr p15, 0, r0, c7, c10, 4 /* drain the write buffer */
ldr lr, [sp], #4
RET
+
+/*
+ * CPU sleep
+ */
+ENTRY_NP(sheeva_cpu_sleep)
+ mov r0, #0
+ mcr p15, 0, r0, c7, c0, 4 /* wait for interrupt */
+ RET
Index: src/sys/arch/arm/include/cpufunc.h
diff -u src/sys/arch/arm/include/cpufunc.h:1.55 src/sys/arch/arm/include/cpufunc.h:1.56
--- src/sys/arch/arm/include/cpufunc.h:1.55 Thu Feb 16 02:29:25 2012
+++ src/sys/arch/arm/include/cpufunc.h Sat Jul 14 12:59:55 2012
@@ -554,6 +554,7 @@ void sheeva_dcache_inv_range (vaddr_t, v
void sheeva_dcache_wb_range (vaddr_t, vsize_t);
void sheeva_idcache_wbinv_range (vaddr_t, vsize_t);
void sheeva_setup(char *);
+void sheeva_cpu_sleep(int);
#endif
#define tlb_flush cpu_tlb_flushID
