Dear Kumar Gala, In message <[EMAIL PROTECTED]> you wrote: > The MPC8544 RM incorrect shows the SEC_CFG bit in PORDEVSR2 as being > bit 26, instead it should be bit 28. This caused in incorrect > interpretation of the i2c_clk which is the same as the SEC clk on > MPC8544. The SEC clk is controlled by cfg_sec_freq that is reported > in PORDEVSR2. > > Signed-off-by: Kumar Gala <[EMAIL PROTECTED]> > --- > include/asm-ppc/immap_85xx.h | 2 +- > 1 files changed, 1 insertions(+), 1 deletions(-)
Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: [EMAIL PROTECTED] The explanation requiring the fewest assumptions is the most likely to be correct. -- William of Occam _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
