> Subject: [PATCH v1 06/11] DTS: imx: Add display5 board (imx6q based) device
> tree description (v5.1)
>
> This commit ports from Linux kernel - tag: v5.1 - the device tree description
> for display5 board.
>
> Signed-off-by: Lukasz Majewski <lu...@denx.de>
> ---
>
> arch/arm/dts/imx6q-display5.dts | 352
> ++++++++++++++++++++++++++++++++++++++++
> 1 file changed, 352 insertions(+)
>
> diff --git a/arch/arm/dts/imx6q-display5.dts
> b/arch/arm/dts/imx6q-display5.dts index 50347ff26b..4e2aa363ed 100644
> --- a/arch/arm/dts/imx6q-display5.dts
> +++ b/arch/arm/dts/imx6q-display5.dts
> @@ -10,9 +10,361 @@
>
> /dts-v1/;
>
> +#include <dt-bindings/gpio/gpio.h>
> #include "imx6q.dtsi"
>
> / {
> model = "Liebherr (LWN) display5 i.MX6 Quad Board";
> compatible = "lwn,display5", "fsl,imx6q";
> +
> + memory@10000000 {
> + device_type = "memory";
> + reg = <0x10000000 0x40000000>;
> + };
> +};
> +
> +&ecspi2 {
> + cs-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_ecspi2_cs &pinctrl_ecspi2_flwp>;
> + status = "okay";
> +
> + s25fl256s: flash@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "jedec,spi-nor";
> + spi-max-frequency = <40000000>;
> + reg = <0>;
> +
> + partition@0 {
> + label = "SPL (spi)";
> + reg = <0x0 0x20000>;
> + read-only;
> + };
> + partition@1 {
> + label = "u-boot (spi)";
> + reg = <0x20000 0x100000>;
> + read-only;
> + };
> + partition@2 {
> + label = "uboot-env (spi)";
> + reg = <0x120000 0x10000>;
> + };
> + partition@3 {
> + label = "uboot-envr (spi)";
> + reg = <0x130000 0x10000>;
> + };
> + partition@4 {
> + label = "linux-recovery (spi)";
> + reg = <0x140000 0x800000>;
> + };
> + partition@5 {
> + label = "swupdate-fitImg (spi)";
> + reg = <0x940000 0x400000>;
> + };
> + partition@6 {
> + label = "swupdate-initramfs (spi)";
> + reg = <0xD40000 0x800000>;
> + };
> + };
> +};
> +
> +&ecspi3 {
> + cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_ecspi3 &pinctrl_ecspi3_cs &pinctrl_ecspi3_flwp>;
> + status = "okay";
> +};
> +
> +&fec {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_enet>;
> + phy-handle = <ðernet_phy0>;
> + phy-mode = "rgmii-id";
> + status = "okay";
> +
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + ethernet_phy0: ethernet-phy@0 {
> + compatible = "marvell,88E1510";
> + device_type = "ethernet-phy";
> + /* Set LED0 control: */
> + /* On - Link, Blink - Activity, Off - No Link */
> + marvell,reg-init = <3 0x10 0 0x1011>;
> + max-speed = <100>;
> + reg = <0>;
> + };
> + };
> +};
> +
> +&i2c1 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c1>;
> + status = "okay";
> +
> + codec: tfa9879@6c {
> + #sound-dai-cells = <0>;
> + compatible = "nxp,tfa9879";
> + reg = <0x6C>;
> + };
> +};
> +
> +&i2c2 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c2>;
> + status = "okay";
> +};
> +
> +&i2c3 {
> + clock-frequency = <400000>;
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_i2c3>;
> + status = "okay";
> +
> + at24@50 {
> + compatible = "atmel,24c256";
> + pagesize = <64>;
> + reg = <0x50>;
> + };
> +
> + pfuze100: pmic@8 {
> + compatible = "fsl,pfuze100";
> + reg = <0x08>;
> +
> + regulators {
> + sw1a_reg: sw1ab {
> + regulator-min-microvolt = <300000>;
> + regulator-max-microvolt = <1875000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-ramp-delay = <6250>;
> + };
> +
> + sw1c_reg: sw1c {
> + regulator-min-microvolt = <300000>;
> + regulator-max-microvolt = <1875000>;
> + regulator-boot-on;
> + regulator-always-on;
> + regulator-ramp-delay = <6250>;
> + };
> +
> + sw2_reg: sw2 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3950000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + sw3a_reg: sw3a {
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1975000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + sw3b_reg: sw3b {
> + regulator-min-microvolt = <400000>;
> + regulator-max-microvolt = <1975000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + sw4_reg: sw4 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + swbst_reg: swbst {
> + regulator-min-microvolt = <5000000>;
> + regulator-max-microvolt = <5150000>;
> + };
> +
> + snvs_reg: vsnvs {
> + regulator-min-microvolt = <1000000>;
> + regulator-max-microvolt = <3000000>;
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vref_reg: vrefddr {
> + regulator-boot-on;
> + regulator-always-on;
> + };
> +
> + vgen1_reg: vgen1 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1550000>;
> + };
> +
> + vgen2_reg: vgen2 {
> + regulator-min-microvolt = <800000>;
> + regulator-max-microvolt = <1550000>;
> + };
> +
> + vgen3_reg: vgen3 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + };
> +
> + vgen4_reg: vgen4 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + vgen5_reg: vgen5 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> +
> + vgen6_reg: vgen6 {
> + regulator-min-microvolt = <1800000>;
> + regulator-max-microvolt = <3300000>;
> + regulator-always-on;
> + };
> + };
> + };
> +};
> +
> +&uart4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart4>;
> + uart-has-rtscts;
> + status = "okay";
> +};
> +
> +&uart5 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_uart5>;
> + status = "okay";
> +};
> +
> +&usdhc4 {
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_usdhc4>;
> + bus-width = <8>;
> + non-removable;
> + status = "okay";
> +};
> +
> +&iomuxc {
> + pinctrl_ecspi2: ecspi2grp {
> + fsl,pins = <
> + MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x100b1
> + MX6QDL_PAD_CSI0_DAT9__ECSPI2_MOSI 0x100b1
> + MX6QDL_PAD_CSI0_DAT8__ECSPI2_SCLK 0x100b1
> + >;
> + };
> +
> + pinctrl_ecspi2_cs: ecspi2csgrp {
> + fsl,pins = <
> + MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x100b1
> + >;
> + };
> +
> + pinctrl_ecspi2_flwp: ecspi2flwpgrp {
> + fsl,pins = <
> + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0
> + >;
> + };
> +
> + pinctrl_ecspi3: ecspi3grp {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT2__ECSPI3_MISO 0x100b1
> + MX6QDL_PAD_DISP0_DAT1__ECSPI3_MOSI 0x100b1
> + MX6QDL_PAD_DISP0_DAT0__ECSPI3_SCLK 0x100b1
> + >;
> + };
> +
> + pinctrl_ecspi3_cs: ecspi3csgrp {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT3__GPIO4_IO24 0x1b0b0
> + >;
> + };
> +
> + pinctrl_ecspi3_flwp: ecspi3flwpgrp {
> + fsl,pins = <
> + MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x1b0b0
> + >;
> + };
> +
> + pinctrl_enet: enetgrp {
> + fsl,pins = <
> + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
> + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
> + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
> + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
> + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
> + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
> + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
> + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
> + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
> + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
> + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
> + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
> + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
> + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
> + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
> + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
> + MX6QDL_PAD_GPIO_6__ENET_IRQ 0x000b1
> + MX6QDL_PAD_ENET_RXD0__GPIO1_IO27 0x1b0b0
> + >;
> + };
> +
> + pinctrl_i2c1: i2c1grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D21__I2C1_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D28__I2C1_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c2: i2c2grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_i2c3: i2c3grp {
> + fsl,pins = <
> + MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
> + MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
> + >;
> + };
> +
> + pinctrl_uart4: uart4grp {
> + fsl,pins = <
> + MX6QDL_PAD_CSI0_DAT12__UART4_TX_DATA 0x1b0b1
> + MX6QDL_PAD_CSI0_DAT13__UART4_RX_DATA 0x1b0b1
> + MX6QDL_PAD_CSI0_DAT16__UART4_RTS_B 0x1b0b1
> + MX6QDL_PAD_CSI0_DAT17__UART4_CTS_B 0x1b0b1
> + >;
> + };
> +
> + pinctrl_uart5: uart5grp {
> + fsl,pins = <
> + MX6QDL_PAD_CSI0_DAT14__UART5_TX_DATA 0x1b0b1
> + MX6QDL_PAD_CSI0_DAT15__UART5_RX_DATA 0x1b0b1
> + >;
> + };
> +
> + pinctrl_usdhc4: usdhc4grp {
> + fsl,pins = <
> + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059
> + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059
> + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059
> + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059
> + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059
> + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059
> + MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17059
> + MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17059
> + MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17059
> + MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17059
> + MX6QDL_PAD_NANDF_ALE__SD4_RESET 0x17059
> + >;
> + };
Reviewed-by: Peng Fan <peng....@nxp.com>
> };
> --
> 2.11.0
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