Running u-boot without caches is slow, especially if using rsa
signatures. This series turns the caches in u-boot spl and proper on
early.
Measured on an MT8370 module (Beckhoff SM0101, not upstream yet) with TF-A
BL2 as DDR loader and SPL loading a 2.7 MB FIT (BL31, OP-TEE, U-Boot,
SHA-256 hashes) from SPI NOR:
SPL, from its banner and from selecting the FIT to the first BL31
output:
caches signature SPL total FIT -> BL31
off - 864.0 / 864.3 ms 808.1 / 808.3 ms
on - 95.8 / 95.8 ms 95.8 / 95.8 ms
off RSA-3072 1903.3 / 1903.8 ms 1836.7 / 1836.8 ms
on RSA-3072 142.0 / 142.0 ms 142.0 / 142.0 ms
U-Boot proper, from bootstage marks before each initcall:
initcall caches off caches on
initf_dm 349.8 / 349.7 4.6 / 4.6 ms
serial_init 204.7 / 204.7 3.0 / 3.0 ms
dram_init 162.2 / 162.1 2.3 / 2.3 ms
relocation copy 22.0 / 22.0 0.4 / 0.4 ms
board_init_f() to main_loop()
819 / 819 87 / 87 ms
Autoboot prompt after power-on, which includes a 5 s USB download wait
in the BootROM:
unsigned FIT RSA-3072 signed FIT
without series 8412 / 8411 ms 9436 / 9437 ms
patch 1 7650 / 7651 ms 7660 / 7657 ms
both patches 6902 / 6906 / 6894 ms 6928 / 6924 ms
The module tests used a v2026.10 based tree with the Genio SPL support
cherry picked.
On v2027.01-rc1 the Genio 510 and 700 EVK configurations build with both
patches, but I didn't test on the evk.
I used an LLM to help write and test the patches.
---
Steffen Dirkwinkel (2):
arm: mediatek: mt8188: enable the caches in SPL
arm: mediatek: mt8188: run board_init_f() with the caches on
arch/arm/mach-mediatek/cpu.c | 14 ++++++++++++++
arch/arm/mach-mediatek/mt8188/init.c | 31 +++++++++++++++++++++++++++++++
arch/arm/mach-mediatek/spl.c | 7 +++++++
3 files changed, 52 insertions(+)
---
base-commit: dfcfc4c9f78d1743f490a497082a4ec8e058aae8
change-id: 20261027-std-upstream-mt8188-spl-caches-2f4271625329
Best regards,
--
Steffen Dirkwinkel <[email protected]>
