Sure, glad to help! Most of magic variables come from the Makefile workflow in uhd-fpga (suggest doing some greps in both uhd-fpga/usrp3/tools/make and uhd-fpga/usrp3/top).
The OOT_DIR is a magic variable that's passed to the OOT directory, and it lets the Makefiles resolve relative pathing issues. The uhd_image_builder.py tools should wrap this correctly when generating FPGA images. It's not exactly the cleanest interface, since it requires a ":=" operation in the OOT Makefile. I'm definitely open to other suggestions, but it's worked well for me so far. Hope to see your OOT FPGA blocks :D EJ On Tue, Feb 27, 2018 at 2:23 PM, Brian Padalino <bpadal...@gmail.com> wrote: > Hey EJ, > > On Tue, Feb 27, 2018 at 6:27 AM, EJ Kreinar <ejkrei...@gmail.com> wrote: > >> Hi Brian, >> >> There's a supported method to include OOT repos that can build and >> include xilinx IP (or basically any other IP that you need, including HLS. >> I've yet to try it with sysgen blocks, but that would probably work too). >> Basically you can use uhd_image_builder.py or uhd_image_builder_gui.py to >> include a Makefile.inc from an OOT repo, rather than copying the text from >> the Makefile.srcs. >> >> See my repo here for a minimal basic example: https://github.com/ej >> k43/rfnoc-ootexample >> >> There's also an open source FPGA polyphase channelizer OOT module that >> uses this approach: https://github.com/e33b1711/rfnoc-ppchan >> >> Good luck! Let me know if this helps >> > > This is exactly what I was looking for. Now, is there anything that > defines these magic variables used in the Makefile.inc? Things like > OOT_DIR, LIB_IP_XCI_SRCS, TOOLS_DIR, etc? There's a lot of magic going > on in those Makefiles and the environment in general it seems. > > For now, though, this looks like it will work perfectly. > > Thanks, > Brian >
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