> > What role, then, would the N310 play? The N310 will be the front end, and the ZCU102 the backbone of the receiver. Having a very large implementation in hardware to track signals from all satellite constellations at various frequency bands. I doubt that the N310's FPGA could accommodate all the hardware designs.
On Wed, 4 Jan 2023 at 19:26, Marcus D. Leech <patchvonbr...@gmail.com> wrote: > On 04/01/2023 14:06, Pedro Pereira wrote: > > If you're asking "can you make your ZCU102 code run on the N310?" >> possibly. There's a dual-core ARM CPU running Linux, and >> a large FPGA fabric. >> > > Is there any documentation for doing this? My receiver is implemented in > c++, I think I would have to implement device drivers to read data from the > hardware to the software application. > I only found documentation for importing standard/custom hardware IP > blocks to gnuradio. > > I'm still confused. You still want to use the ZCU102 hardware? What > role, then, would the N310 play? This is a use-case that > nobody at Ettus/NI has addressed, and, indeed, it's unlikely that anyone > on this list has tried to address this (confusing) > use case. > > > > On Tue, 3 Jan 2023 at 16:36, Marcus D. Leech <patchvonbr...@gmail.com> > wrote: > >> On 03/01/2023 10:54, Pedro Pereira wrote: >> >> Thanks for the response. >> >> I don´t want to run the software component of the GNSS receiver on my >> computer, while connected to the N310 for heterogeneous processing - if >> that's what you're saying. >> I want an edge device running embedded linux, like I already have on my >> zcu102, to run both sw and hw components. >> >> The first stages of the processing chain are in hardware so I don´t want >> to read samples from the front-end at the application level. I want to read >> samples directly from my hardware block design, do some heavy processing >> and deliver the results to the software application. >> I can do all of this using AD front-ends and their HDL reference designs. >> Is there any support to do this using N210 or N310? >> >> Thanks again. >> >> It's still not entirely clear what it is you're asking. >> >> The N310 has a Zynq FPGA + 2 AD9371 radios + 2 SFP+ network ports. >> >> This makes it somewhat similar to your ZCU102, but with radios already >> built-in. >> >> If you're asking "can you make your ZCU102 code run on the N310?" >> possibly. There's a dual-core ARM CPU running Linux, and >> a large FPGA fabric. >> >> If you're asking "can I make my ZCU102 acquire samples from either N310 >> or N210?" -- given that your ZCU102 has some SFP+ >> ports that could be configured for 1GiGe (or even 10GiGe in the case of >> N310) -- it seems likely that you could port UHD to >> the Linux ARM CPU on the ZCU102, and then you could talk to either the >> N210 or N310 via the network ports from your ZCU102. >> >> >> On Tue, 3 Jan 2023 at 15:15, Marcus Müller <marcus.muel...@ettus.com> >> wrote: >> >>> Note that the N310's FPGA might actually be large enough to fit in >>> (parts of) a GNSS receiver, especially if you remove the DUC chain of the >>> TX path, in case you don't need that. RFNoC is Ettus' framework for >>> extending the FPGA functionality, especially made for such use cases. >>> >>> Note that even in RFNoC you get a stream of samples from the radio >>> frontend, which you basically paid NI/Ettus for to design it for you, so >>> that you don't have to worry about how to talk to the physical hardware and >>> can care about signal processing :) >>> >>> Cheers, >>> Marcus >>> >>> On 03.01.23 16:11, Marcus Müller wrote: >>> >>> Hi Mr Pereira, >>> >>> the directest access you get to samples in the N210 is the ethernet >>> connection – and that has no downside for GNSS applications, as the VITA49 >>> samples fully represent the RF signal, thanks to Shannon-Nyquist. >>> >>> That is, of course, unless you start modifying the FPGA image of the >>> N210, and make it a completely different product. It's kind of unlikely you >>> want to do that. >>> >>> Greetings, >>> Marcus >>> >>> On 03.01.23 14:25, Pedro Pereira wrote: >>> >>> Greetings, >>> >>> I have 2 USRP front-ends - N210 and N310. I want to develop a GNSS >>> Receiver inside my FGPA - xilinx ZCU102 - and use one of the USRP devices >>> only as the front-end. The receiver is quite large so I need an external >>> board for all the signal processing chain. The receiver has two >>> implementations - software-only & hybrid. In hybrid mode some tasks of the >>> processing chain are accelerated in hardware. >>> >>> The software-only version of the receiver running on my ZCU102 is able >>> to configure the N210 and read packets over ethernet correctly. However, >>> with the hybrid version of the receiver, I want to read the digital IQ >>> samples from the front end directly in hardware. >>> >>> For example, I am able to do this with the ZCU102 connected to FMComm2/3 >>> using the FMC connection on the FPGA. AD provides HDL reference designs to >>> support communication between multiple front-ends and multiple FPGAs. >>> >>> Is there a similar way to read the digital samples directly in hardware >>> using the N210? The N210 only has the ethernet and a MIMO port. >>> >>> Thanks in advance. >>> >>> >>> >>> _______________________________________________ >>> USRP-users mailing list -- usrp-users@lists.ettus.com >>> To unsubscribe send an email to usrp-users-le...@lists.ettus.com >>> >>> _______________________________________________ >>> USRP-users mailing list -- usrp-users@lists.ettus.com >>> To unsubscribe send an email to usrp-users-le...@lists.ettus.com >>> >> >> _______________________________________________ >> USRP-users mailing list -- usrp-users@lists.ettus.com >> To unsubscribe send an email to usrp-users-le...@lists.ettus.com >> >> >> _______________________________________________ >> USRP-users mailing list -- usrp-users@lists.ettus.com >> To unsubscribe send an email to usrp-users-le...@lists.ettus.com >> > >
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