On Monday, September 5, 2016, Mark Wielaard <m...@redhat.com> wrote:

> On Fri, 2016-09-02 at 00:05 +0000, Knapp, Rashawn L wrote:
> > With many new platforms hitting the market which include  AVX-512
> > instruction extensions, and as a valgrind user, I want to inquire
> > about Valgrind’s development underway to support these instructions.
> > I will appreciate any information available regarding this.
>
> As far as I know nobody is currently working on AVX-512 instruction and
> the new larger register support in valgrind. I don't even see a bug
> report requesting it. If someone does have hardware that supports
> AVX-512 it would be great if they could work on support for it.


There is a good chance we can arrange remote access to hardware within
Intel. Otherwise I can ask one of the DOE labs that has test hardware if
they can help. (A lab that doesn't have onerous remote access
limitations...). If all else fails, we loan out development boxes for
certain purposes.


>
> But
> wikipedia claims there is not much hardware out there (yet?) that has
> support for it: https://en.wikipedia.org/wiki/AVX-512#CPUs_with_AVX-512
>
>
Intel Xeon Phi 72xx aka Knights Landing is the only generally available
product that supports it.

Numerous unofficial sources and slides on GCC AVX-512 support by
Intel describe another implementation.


> Given your email address you might also want to ask people at Intel if
> they think AVX-512 support for valgrind would be useful and whether they
> could help with implementing support for it.
>
>
It would be really valuable to a number of HPC programmers. Many DOE labs
use it heavily. I wish I could help implement but I don't have the relevant
skills.

Jeff, who also works for Intel


> Thanks,
>
> Mark
>
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-- 
Jeff Hammond
jeff.scie...@gmail.com
http://jeffhammond.github.io/
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