Thanks for the technique. I'm not sure that I like the NILL instruction at this point. It could change an "invalid" (as in "not planned for") RC into a "valid" RC. Looks like maybe I could use TMLL to just test. (TMLL R15,X'000C')
-- John McKown Systems Engineer IV IT Administrative Services Group HealthMarkets(r) 9151 Boulevard 26 * N. Richland Hills * TX 76010 (817) 255-3225 phone * john.mck...@healthmarkets.com * www.HealthMarkets.com Confidentiality Notice: This e-mail message may contain confidential or proprietary information. If you are not the intended recipient, please contact the sender by reply e-mail and destroy all copies of the original message. HealthMarkets(r) is the brand name for products underwritten and issued by the insurance subsidiaries of HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), Mid-West National Life Insurance Company of TennesseeSM and The MEGA Life and Health Insurance Company.SM > -----Original Message----- > From: IBM Mainframe Assembler List [mailto:ASSEMBLER- > l...@listserv.uga.edu] On Behalf Of Martin Truebner > Sent: Monday, August 27, 2012 8:15 AM > To: ASSEMBLER-LIST@LISTSERV.UGA.EDU > Subject: Re: which instructions should I use? > > John, > > >> you still need base+displacement .... desire for an index register; > > They come in most cases when there is space in the nibbles for it. But > for the case you cited there is no need to cover code in > "procedure division" with a base. (Dynamic storage and literalpool > do have a base!) -Here is how: > > CALL PROGRAM,(PARM1,PARM2),VL > CHI R15,=Y(MAXENTRIES) > JH INVALID_RC > L R15,=A(RC0,RC4,RC8,RCC)(R15) > BR R15 > > Your addon (check for a valid rc) could also be done with this > > NILL R15,X'000C' > > as a result you only have valid combinations left over (Yes I cheated > and added an entry for C). > > -- > Martin > > Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE > more at http://www.picapcpu.de
