The PrOfOps says that the condition code is set to zero if the result of any of the AND instructions is zero and to 1 if the result is non-zero, so your LTR is unnecessary.
LA R0,3 NR R1,R15 BNZ BAD_RC And in 3 or 4 years, IBM will have implemented all of this logic in a single instruction with an opcode something like this: LANRBNZ. And the processors will have over 4K different opcodes by then. Bill Fairchild Programmer Rocket Software 408 Chamberlain Park Lane * Franklin, TN 37069-2526 * USA t: +1.617.614.4503 * e: bfairch...@rocketsoftware.com * w: www.rocketsoftware.com -----Original Message----- From: IBM Mainframe Assembler List [mailto:ASSEMBLER-LIST@LISTSERV.UGA.EDU] On Behalf Of Tony Thigpen Sent: Monday, August 27, 2012 12:19 PM To: ASSEMBLER-LIST@LISTSERV.UGA.EDU Subject: Re: which instructions should I use? Your code requires 2 scratch registers. The following uses just 1 scratch register and does not require literal storage: LA R0,3 NR R0,R15 LTR R0,R0 BNZ BAD_RC (I still have to use code that works on boxes without the jump instructions.) Tony Thigpen -----Original Message ----- From: McKown, John Sent: 08/27/2012 11:34 AM > Destroys the contents of R15, so I guess I would load R15 into, say, R0 and > do the OR operation on R0. However, I'm on a z9 and will likely never be on > anything more advanced. So I'll need to load the mask into another register, > say R1. That would either require an L R1,variable or literal (=X'FFFFFFFC'), > or do an: AHI R1,X'04' followed by an LCR R1,R1. I don't know which of those > is "better". I guess the Load would be more easily understood by even a > novice. > > LR R0,R15 > L R1,=A(-4) > OR R0,R1 > CR R0,R1 > JNE BAD_RC > > -- > John McKown > Systems Engineer IV > IT > > Administrative Services Group > > HealthMarkets(r) > > 9151 Boulevard 26 * N. Richland Hills * TX 76010 > (817) 255-3225 phone * > john.mck...@healthmarkets.com * www.HealthMarkets.com > > Confidentiality Notice: This e-mail message may contain confidential > or proprietary information. If you are not the intended recipient, > please contact the sender by reply e-mail and destroy all copies of > the original message. HealthMarkets(r) is the brand name for products > underwritten and issued by the insurance subsidiaries of > HealthMarkets, Inc. -The Chesapeake Life Insurance Company(r), > Mid-West National Life Insurance Company of TennesseeSM and The MEGA > Life and Health Insurance Company.SM > > >> -----Original Message----- >> From: IBM Mainframe Assembler List [mailto:ASSEMBLER- >> l...@listserv.uga.edu] On Behalf Of John Gilmore >> Sent: Monday, August 27, 2012 10:20 AM >> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU >> Subject: Re: which instructions should I use? >> >> Register contents that are a multiple of 4 are all of the form >> >> xxxxx...xx00 >> >> Inclusive ORing such a value with the mask >> >> 11111...1100 >> >> and testing the result for equality with this same mask then yields a >> simple, low-overhead test for a multiple-of-four value. >> >> --jg >> >> On 8/27/12, McKown, John <john.mck...@healthmarkets.com> wrote: >>> Thanks for the technique. I'm not sure that I like the NILL >> instruction at >>> this point. It could change an "invalid" (as in "not planned for") >>> RC >> into a >>> "valid" RC. Looks like maybe I could use TMLL to just test. (TMLL >>> R15,X'000C') >>> >>> -- >>> John McKown >>> Systems Engineer IV >>> IT >>> >>> Administrative Services Group >>> >>> HealthMarkets(r) >>> >>> 9151 Boulevard 26 * N. Richland Hills * TX 76010 >>> (817) 255-3225 phone * >>> john.mck...@healthmarkets.com * www.HealthMarkets.com >>> >>> Confidentiality Notice: This e-mail message may contain confidential >> or >>> proprietary information. If you are not the intended recipient, >> please >>> contact the sender by reply e-mail and destroy all copies of the >> original >>> message. HealthMarkets(r) is the brand name for products >>> underwritten >> and >>> issued by the insurance subsidiaries of HealthMarkets, Inc. -The >> Chesapeake >>> Life Insurance Company(r), Mid-West National Life Insurance Company >> of >>> TennesseeSM and The MEGA Life and Health Insurance Company.SM >>> >>> >>>> -----Original Message----- >>>> From: IBM Mainframe Assembler List [mailto:ASSEMBLER- >>>> l...@listserv.uga.edu] On Behalf Of Martin Truebner >>>> Sent: Monday, August 27, 2012 8:15 AM >>>> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU >>>> Subject: Re: which instructions should I use? >>>> >>>> John, >>>> >>>>>> you still need base+displacement .... desire for an index >> register; >>>> >>>> They come in most cases when there is space in the nibbles for it. >> But >>>> for the case you cited there is no need to cover code in "procedure >>>> division" with a base. (Dynamic storage and literalpool do have a >>>> base!) -Here is how: >>>> >>>> CALL PROGRAM,(PARM1,PARM2),VL >>>> CHI R15,=Y(MAXENTRIES) >>>> JH INVALID_RC >>>> L R15,=A(RC0,RC4,RC8,RCC)(R15) >>>> BR R15 >>>> >>>> Your addon (check for a valid rc) could also be done with this >>>> >>>> NILL R15,X'000C' >>>> >>>> as a result you only have valid combinations left over (Yes I >> cheated >>>> and added an entry for C). >>>> >>>> -- >>>> Martin >>>> >>>> Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE more >>>> at http://www.picapcpu.de >>> > >
