Register contents that are a multiple of 4 are all of the form

xxxxx...xx00

Inclusive ORing such a value with the mask

11111...1100

and testing the result for equality with this same mask then yields a
simple, low-overhead test for a multiple-of-four value.

--jg

On 8/27/12, McKown, John <john.mck...@healthmarkets.com> wrote:
> Thanks for the technique. I'm not sure that I like the NILL instruction at
> this point. It could change an "invalid" (as in "not planned for") RC into a
> "valid" RC. Looks like maybe I could use TMLL to just test. (TMLL
> R15,X'000C')
>
> --
> John McKown
> Systems Engineer IV
> IT
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>> -----Original Message-----
>> From: IBM Mainframe Assembler List [mailto:ASSEMBLER-
>> l...@listserv.uga.edu] On Behalf Of Martin Truebner
>> Sent: Monday, August 27, 2012 8:15 AM
>> To: ASSEMBLER-LIST@LISTSERV.UGA.EDU
>> Subject: Re: which instructions should I use?
>>
>> John,
>>
>> >> you still need base+displacement .... desire for an index register;
>>
>> They come in most cases when there is space in the nibbles for it. But
>> for the case you cited there is no need to cover code in
>> "procedure division" with a base. (Dynamic storage and literalpool
>> do have a base!) -Here is how:
>>
>>         CALL PROGRAM,(PARM1,PARM2),VL
>>         CHI  R15,=Y(MAXENTRIES)
>>         JH   INVALID_RC
>>         L    R15,=A(RC0,RC4,RC8,RCC)(R15)
>>         BR   R15
>>
>> Your addon (check for a valid rc) could also be done with this
>>
>>         NILL R15,X'000C'
>>
>> as a result you only have valid combinations left over (Yes I cheated
>> and added an entry for C).
>>
>> --
>> Martin
>>
>> Pi_cap_CPU - all you ever need around MWLC/SCRT/CMT in z/VSE
>> more at http://www.picapcpu.de
>

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