Brian Padalino wrote:
I am not 100% positive, but I am reasonably the FPGA does all the required interpolation using the interpolating CIC filter before sending samples to the converter. The part itself might do another 2x interpolation to 128MSPS, but a 3x cost increase for not a heck of a lot to pay for that feature.
Here is the USRP block diagram: http://gnuradio.org/trac/wiki/UsrpRfxDiagrams They confirm Brian's comments. Philip
