Hi Karl,
>> If you had a file of samples from the Wenzel or one of your other sources >> you are willing to share, I would like to take a look. I've been doing some DAC tests this week, but I'll get the ADC setup in the next week or so and grab some samples. >> How are you clocking the TI ADC in your tests? On the custom hardware design we have a reference clock (synth or Wenzel) feeding the LMX synthesizer which generates 5400MHz, one output clocks the DAC and the other to the LMK, the LMK divides-by-2 (a space part feature) and then distributes that clock to the ADC and to dividers that are used to make the REFCLK and CORECLK. So the two test setups I can grab data for easily will be synth vs Wenzel. I'll get Rhode&Swartz phase-noise results for the DAC output, and loop that DAC output into the ADC input (probably through an analog filter), and look at that data. I'll use a relatively-prime tone, so that I can exercise as many DAC and ADC codes as I can. And I'm sure I'll decide that I did something wrong, and will need to take more data 😊 Regards, Dave -----Original Message----- From: casper@lists.berkeley.edu <casper@lists.berkeley.edu> On Behalf Of Karl Warnick Sent: Tuesday, August 20, 2024 2:10 PM To: 'Hawkins, David W (US 334B)' via casper@lists.berkeley.edu <casper@lists.berkeley.edu> Subject: Re: [EXTERNAL] [casper] Low cost phase noise analysis Hi Dave, thanks for responding. I looked into the Wenzel reference just now and found -170 dBc/Hz at 100 kHz for one of their 100-200 MHz products. That's pretty close to the spec for a 25 MHz low phase noise circuit I bought on ebay for $100, and just above the thermal noise floor for a clock with a few dBm or so of power. If you had a file of samples from the Wenzel or one of your other sources you are willing to share, I would like to take a look. My basic question is fairly simple. Are modern samplers low cost with a good reference clock stable enough to measure phase noise that low with real samples only and without the need for two channels or cross correlations? I could answer that question I think with a file of samples from a decently stable setup. How are you clocking the TI ADC in your tests? Best, Karl On 8/20/2024 2:49 PM, 'Hawkins, David W (US 334B)' via casper@lists.berkeley.edu<mailto:casper@lists.berkeley.edu> wrote: > Hi Karl, > >>> Thanks in advance to anyone whose interest is piqued enough to respond. > My interest in piqued ... > > I'm in the process of measuring phase noise using a Rhode&Swartz on some EVMs > and custom designs: > > 1. Texas Instruments DAC39RF10 DAC (I have rev1 and rev2 of their > space parts) 2. Texas Instruments ADC12DJ3200 ADC (QMLV part) 3. > LMX2615-SP synthesizer 4. LMK04832-SP clock distribution 5. Wenzel > low-phase-noise 108MHz and 2700MHz reference (5400MHz and 10800MHz > also options) 6. Keysight N5183B synthesizer > > The DAC and ADC are JESD204C devices. The application is radars (space-based). > > The ADC EVM plugs into the FMC site on a KCU105, so could fill the DDR on > that. > > I'm playing with these toys to determine what we don't link. So far the LMX > device is the weakest-link (largest source of phase noise). My original plan > had been to take 108MHz to make 5400MHz for the DAC, 2700MHz for the ADC, and > 168.75MHz for the FPGA REFCLK/CORE clock. But the phase noise of the LMX may > change my mind to bring the 5400MHz directly from the Wenzel. The Wenzel > phase noise is nicer as they use doubler to get to higher frequency rather > than a PLL. > > So my "toys" might just have the low-phase-noise and higher-phase-noise that > you are looking for to provide your algorithms. We would have the > Rhode&Swartz analyzer for comparison. > > Regards, > Dave > > > Dr David Hawkins > Technical Group Supervisor > Radar Science & Engineering Section > Radar Digital Systems Group (334B) > Jet Propulsion Laboratory > 4800 Oak Grove Dr > Pasadena, CA 91109 > Office: 300-235R > Phone: 818-354-2252 > Cell: 626-720-7079 > https://radar.jpl.nasa.gov/ > > > -----Original Message----- > From: casper@lists.berkeley.edu<mailto:casper@lists.berkeley.edu> > <casper@lists.berkeley.edu<mailto:casper@lists.berkeley.edu>> On Behalf > Of Karl Warnick > Sent: Tuesday, August 20, 2024 1:38 PM > To: casper@lists.berkeley.edu<mailto:casper@lists.berkeley.edu> > Subject: [EXTERNAL] [casper] Low cost phase noise analysis > > Hi all, > > I've spent some time this summer as part of a radar project digging into > calculating phase noise for highly stable tones. I have implemented what I > think is a decent algorithm. My next steps are to look for test data sets and > tips for the hardware. > > Do you have a file of samples of a stable tone? If anyone has a test data set > consisting of samples of a pure tone that they would like to share as a test > data set, I'd like to apply my codes to that and check the phase noise. Both > the tone generator and the ADC sample clock should be phase stable to the > order of a Keysight signal generator, or ideally better. The data set length > should be a reasonable fraction of a second for ~1 Hz phase noise resolution. > The frequency of the tone and the sample rate are fairly arbitrary as I'm > mainly looking to benchmark the algorithm. > > How cheaply can stable samples be acquired? I'm looking for low cost hardware > (a few $100s up to a few $k) that is stable enough to measure phase noise > comparable to a Keysight source or better. Phase noise can be measured with > an expensive phase noise analyzer, but I believe it should be possible to do > this with a low cost digitizer with a suitably stable sample clock. The > sample clock could (or perhaps must) be external. The sample rate should be > around 80-100 Msps or higher and the platform should be able to store a burst > of samples of length on the order of 1 sec. We have done this using a ZCU 216 > and it seems to work, but that isn't really a low cost board. I've looked > into Picoscope products, which might be ideal, but their support people don't > know anything about the phase noise properties of their samplers. > > Thanks in advance to anyone whose interest is piqued enough to respond. > > Best, > Karl > > -- > Karl F. Warnick > Parkinson Engineering Research Professor Department of Electrical and > Computer Engineering Brigham Young University > 450 Engineering Building > Provo, UT 84602 > (801) 422-1732 > > > > > -- Karl F. Warnick Parkinson Engineering Research Professor Department of Electrical and Computer Engineering Brigham Young University 450 Engineering Building Provo, UT 84602 (801) 422-1732 -- You received this message because you are subscribed to the Google Groups "casper@lists.berkeley.edu<mailto:casper@lists.berkeley.edu>" group. To unsubscribe from this group and stop receiving emails from it, send an email to casper+unsubscr...@lists.berkeley.edu<mailto:casper+unsubscr...@lists.berkeley.edu>. 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