On Sun, Jul 20, 2025 at 05:46:04PM +0530, Akhil P Oommen wrote: > Bitfield definition for REG_A6XX_GMU_SPTPRAC_PWR_CLK_STATUS register is > different in A7XX family. Check the correct bits to see if GX is > collapsed on A7XX series. > > Signed-off-by: Akhil P Oommen <akhi...@oss.qualcomm.com>
Missing Fixes tag > --- > drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 7 +++++++ > 1 file changed, 7 insertions(+) > -- With best wishes Dmitry
