On Tuesday 09 Jul 2002 12:11 am, Michel Dänzer scribed numinously:"
> On Mon, 2002-07-08 at 20:17, Tim Smith wrote:
> > On Monday 08 Jul 2002 12:49 am, Michel Dänzer scribed numinously:"
> >
> > > The scratch register values need to be read with DRM_READ32(), which
> > > accounts both for endianness and memory barriers. So it would be
> > >
> > > u32 done_age = DRM_READ32(&dev_priv->scratch[1]);
> >
> > That's good to know; I'll file that a little closer to my forebrain.
> > I'd noticed the macros before but not taken enough notice. I thought
> > the card took care of that when it wrote the value back (I believe it
> > can) but maybe not.
>
> It can, but that would mean extra code to set the control registers
> according to endianness and wouldn't really buy us anything as reading
> little endian data is free with a decent big endian CPU and the memory
> barriers would still have to be dealt with.
Yes that makes sense. Like I said, I wasn't paying enough attention :-/
Still I live and learn; or at least live :-)
Here's a newer patch, against the latest CVS, that incorporates that change
and also falls back to MMIO if the ioctl fails. If this is OK (no other
mucking around required to make it work on the mac &c) then I'll commit it.
--
Tim Smith ([EMAIL PROTECTED])
England Prevails.
Index: xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c
===================================================================
RCS file: /cvsroot/dri/xc/xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c,v
retrieving revision 1.18
diff -u -3 -p -r1.18 radeon_ioctl.c
--- xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c 5 Jul 2002 10:32:30 -0000 1.18
+++ xc/lib/GL/mesa/src/drv/radeon/radeon_ioctl.c 11 Jul 2002 15:59:52 -0000
@@ -614,7 +614,18 @@ static int radeonWaitForFrameCompletion(
int i;
while ( 1 ) {
- frame = INREG( RADEON_LAST_FRAME_REG );
+ drmRadeonGetParam gp;
+ int ret;
+
+ gp.param = RADEON_PARAM_LAST_FRAME;
+ gp.value = &frame;
+ if ((ret=drmCommandWriteRead( rmesa->dri.fd,DRM_RADEON_GETPARAM,&gp, sizeof(gp)))) {
+ frame = INREG( RADEON_LAST_FRAME_REG );
+ }
+ if ( RADEON_DEBUG & DEBUG_IOCTL ) {
+ fprintf( stderr, "%s( %d )\n", __FUNCTION__, frame );
+ }
+
if ( sarea->last_frame - frame <= RADEON_MAX_OUTSTANDING ) {
break;
}
@@ -805,12 +816,24 @@ static void radeonClear( GLcontext *ctx,
/* Throttle the number of clear ioctls we do.
*/
while ( 1 ) {
- clear = INREG( RADEON_LAST_CLEAR_REG );
+ drmRadeonGetParam gp;
+ int ret;
+
+ gp.param = RADEON_PARAM_LAST_CLEAR;
+ gp.value = &clear;
+ if ((ret=drmCommandWriteRead( rmesa->dri.fd,DRM_RADEON_GETPARAM,&gp, sizeof(gp)))) {
+ clear = INREG( RADEON_LAST_CLEAR_REG );
+ }
+ if ( RADEON_DEBUG & DEBUG_IOCTL ) {
+ fprintf( stderr, "%s( %d )\n", __FUNCTION__, clear );
+ }
+
if ( sarea->last_clear - clear <= RADEON_MAX_CLEARS ) {
break;
}
/* Spin in place a bit so we aren't hammering the bus */
for ( i = 0 ; i < 1024 ; i++ ) {
+ delay();
}
}
Index: xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h
===================================================================
RCS file: /cvsroot/dri/xc/xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h,v
retrieving revision 1.3
diff -u -3 -p -r1.3 radeon_common.h
--- xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h 12 Jun 2002 15:50:27 -0000 1.3
+++ xc/programs/Xserver/hw/xfree86/drivers/ati/radeon_common.h 11 Jul 2002 15:59:58 -0000
@@ -336,5 +336,8 @@ typedef struct drm_radeon_getparam {
} drmRadeonGetParam;
#define RADEON_PARAM_AGP_BUFFER_OFFSET 0x1
+#define RADEON_PARAM_LAST_FRAME 0x2
+#define RADEON_PARAM_LAST_DISPATCH 0x3
+#define RADEON_PARAM_LAST_CLEAR 0x4
#endif
Index: xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_cp.c
===================================================================
RCS file: /cvsroot/dri/xc/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_cp.c,v
retrieving revision 1.2
diff -u -3 -p -r1.2 radeon_cp.c
--- xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_cp.c 5 Jul 2002 08:31:11 -0000 1.2
+++ xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_cp.c 11 Jul 2002 16:00:10 -0000
@@ -900,10 +900,10 @@ static int radeon_do_init_cp( drm_device
* FIXME: This doesn't quite work yet, so we're disabling it
* for the release.
*/
+#endif
RADEON_WRITE( RADEON_SCRATCH_ADDR, (dev_priv->ring_rptr->offset +
RADEON_SCRATCH_REG_OFFSET) );
RADEON_WRITE( RADEON_SCRATCH_UMSK, 0x7 );
-#endif
dev_priv->scratch = ((__volatile__ u32 *)
dev_priv->ring_rptr->handle +
@@ -1168,7 +1168,7 @@ drm_buf_t *radeon_freelist_get( drm_devi
start = dev_priv->last_buf;
for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) {
- u32 done_age = RADEON_READ( RADEON_LAST_DISPATCH_REG );
+ u32 done_age = DRM_READ32( &dev_priv->scratch[1] );
for ( i = start ; i < dma->buf_count ; i++ ) {
buf = dma->buflist[i];
buf_priv = buf->dev_private;
Index: xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_drm.h
===================================================================
RCS file: /cvsroot/dri/xc/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_drm.h,v
retrieving revision 1.2
diff -u -3 -p -r1.2 radeon_drm.h
--- xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_drm.h 5 Jul 2002 08:31:11 -0000 1.2
+++ xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_drm.h 11 Jul 2002 16:00:10 -0000
@@ -458,6 +458,9 @@ typedef struct drm_radeon_indirect {
* client any other way.
*/
#define RADEON_PARAM_AGP_BUFFER_OFFSET 0x1
+#define RADEON_PARAM_LAST_FRAME 0x2
+#define RADEON_PARAM_LAST_DISPATCH 0x3
+#define RADEON_PARAM_LAST_CLEAR 0x4
typedef struct drm_radeon_getparam {
int param;
Index: xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_state.c
===================================================================
RCS file: /cvsroot/dri/xc/xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_state.c,v
retrieving revision 1.2
diff -u -3 -p -r1.2 radeon_state.c
--- xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_state.c 5 Jul 2002 08:31:11 -0000 1.2
+++ xc/programs/Xserver/hw/xfree86/os-support/shared/drm/kernel/radeon_state.c 11 Jul 2002 16:00:11 -0000
@@ -1843,6 +1843,15 @@ int radeon_cp_getparam( DRM_IOCTL_ARGS )
case RADEON_PARAM_AGP_BUFFER_OFFSET:
value = dev_priv->agp_buffers_offset;
break;
+ case RADEON_PARAM_LAST_FRAME:
+ value = DRM_READ32(&dev_priv->scratch[0]);
+ break;
+ case RADEON_PARAM_LAST_DISPATCH:
+ value = DRM_READ32(&dev_priv->scratch[1]);
+ break;
+ case RADEON_PARAM_LAST_CLEAR:
+ value = DRM_READ32(&dev_priv->scratch[2]);
+ break;
default:
return DRM_ERR(EINVAL);
}
