On Feb 6 2013 5:43 AM, Charles Steinkuehler wrote:
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> On 2/6/2013 1:27 AM, Gene Heskett wrote:
>> On Wednesday 06 February 2013 02:26:59 Gregory Perry did opine:
>> Message additions Copyright Wednesday 06 February 2013 by Gene
>> Heskett
>>
>>> There are two (2) 200MHz RISC cores that constitute the PRUSS
>>> subsystem on the BeagleBone.  Each can address eight (8) pins on
>>> the expansion headers, for a total of 16 pins.
>>
>> Insufficient.  Nice thought while it lasted though.
>
> Those are just the PRU I/O pins, which can be used for high-speed
> signals (ie: step/dir).  The BeagleBone has 44 I/O on P8, and another
> 32 on P9 (those numbers include the PRU I/O pins).  And 7 of those 
> I/O
> can be analog inputs.
>
> There are a *LOT* of I/O on the BeagleBone vs. a parallel port.

What are the max switching speed of both PRU and GPIO pins?

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